CN104079177B - A voltage regulator circuit - Google Patents

Abstract

The embodiment of the invention discloses a kind of circuit of voltage adjuster, including voltage input end, voltage transformation unit, feedback control unit, pressure release unit and voltage output end, wherein, the feedback control unit is used to accordingly reduce or raise when the output voltage of the positive pole of the voltage output end is higher or lower than predetermined threshold value the pressure drop of the voltage transformation unit, the pressure release unit includes switching tube, the feedback control unit is additionally operable to turn on the switching tube in the output voltage saltus step of the positive pole of the voltage output end, clutter of the switching tube for the positive pole of the voltage output end of being released in conducting.Using the present invention, it is possible to reduce the noise of the output voltage of voltage adjuster, the stability of voltage adjuster is improved.

Description

A voltage regulator circuit

technical field

The invention relates to the field of electronic technology, in particular to a circuit of a voltage regulator.

Background technique

A voltage regulator is a linear voltage regulator that adjusts the output voltage through transistors or MOSFETs operating in the linear operating area to maintain the difference between the input voltage and the output voltage within the rated value. The voltage regulator has the characteristics of low loss, small quiescent current and simple structure, so it is widely used in various electronic equipment.

In the application process, it is inevitable that the output voltage of the voltage regulator may generate noise due to temperature changes, voltage drift, or increased integration of process nodes, such as spike pulses, etc., which directly burden the load, such as affecting the load. The response speed and the energy loss of increasing the load, etc.

Contents of the invention

The embodiment of the present invention provides a voltage regulator circuit, which can reduce the noise of the output voltage of the voltage regulator and improve the stability of the voltage regulator.

The first aspect of the embodiments of the present invention provides a voltage regulator circuit, including a voltage input terminal, a voltage transformation unit, a feedback control unit, a pressure relief unit, and a voltage output terminal, wherein:

The first terminal of the transformation unit is connected to the positive pole of the voltage input terminal, the second terminal of the transformation unit is connected to the positive pole of the voltage output terminal, and the input terminal of the feedback control unit is connected to the positive pole of the voltage output terminal. The positive pole is connected, the output end of the feedback control unit is connected to the controlled end of the voltage transformation unit, the first end of the pressure relief unit is connected to the positive pole of the voltage output end, and the second end of the pressure relief unit connected to the negative pole of the voltage output terminal, and the third terminal of the pressure relief unit is connected to the output terminal of the feedback control unit;

The feedback control unit is used to correspondingly reduce or increase the voltage drop of the transformation unit to stabilize the output of the positive pole of the voltage output terminal when the output voltage of the positive pole of the voltage output terminal is higher or lower than a preset threshold voltage, the pressure relief unit includes a switch tube, and the feedback control unit is also used to turn on the switch tube when the output voltage of the positive pole of the voltage output terminal jumps, and the switch tube is used to discharge the switch tube when it is turned on the positive pole of the voltage output to clutter.

In a first possible implementation manner of the first aspect, the pressure relief unit further includes a first filter capacitor and an equivalent resistor, and the switch tube is an NMOS (Negative channel Metal Oxide Semiconductor, N-channel MOS) tube, wherein :

The drain of the switch tube is connected to the anode of the voltage output terminal, the source of the switch tube is respectively connected to the first end of the first filter capacitor and the first end of the equivalent resistor, and the switch The gate of the tube is connected to the output terminal of the feedback control unit, and the negative pole of the voltage output terminal is respectively connected to the second terminal of the first filter capacitor and the second terminal of the equivalent resistor.

With reference to the first possible implementation of the first aspect, in the second possible implementation, when the output voltage of the positive pole of the voltage output terminal jumps, the output voltage of the output terminal of the feedback control unit increases, so The voltage of the gate of the switch tube will be greater than the turn-on voltage of the switch tube, and then the switch tube will be turned on, and the filter network formed by the first filter capacitor and the equivalent resistance will filter out the Positive clutter.

With reference to the possible implementation manner of the first aspect, in a third possible implementation manner, the circuit further includes a filtering unit, the first end of the filtering unit is connected to the positive pole of the voltage output end, and the second end of the filtering unit The terminal is connected to the negative pole of the voltage output terminal;

The filter unit is used to filter out the positive clutter of the voltage output terminal.

With reference to the first aspect and the third possible implementation manner of the first aspect, in a fourth possible implementation manner, the filter unit includes a second filter capacitor, the first terminal of the second filter capacitor is connected to the voltage output The positive pole of the terminal is connected, and the second terminal of the second filter capacitor is connected with the negative pole of the voltage output terminal.

With reference to the possible implementation of the first aspect, in a fifth possible implementation, the feedback control unit includes a first voltage dividing resistor, a second voltage dividing resistor, and an error amplifier, where:

The first end of the first voltage dividing resistor is connected to the positive pole of the voltage output terminal, the second end of the first voltage dividing resistor is connected to the first end of the second voltage dividing resistor, and the second voltage dividing resistor The second terminal of the piezoresistor is connected to the negative pole of the voltage output terminal, the positive input terminal of the error amplifier is connected to the second terminal of the first voltage dividing resistor, and the negative input terminal of the error amplifier is connected to the first reference voltage, the output terminal of the error amplifier is respectively connected to the controlled terminal of the transformation unit and the third terminal of the pressure relief unit.

In combination with the first aspect and the fifth possible implementation of the first aspect, in the sixth possible implementation, the voltage transformation unit includes a P-Power-MOSFET (Positive channel-Power-Metal Oxide Semiconductor Field Effect Transistor, P-channel Power MOS Field Effect Transistor), wherein the source of the P-Power-MOSFET is connected to the positive pole of the voltage input end, and the drain of the P-Power-MOSFET is connected to the positive pole of the voltage output end , the gate of the P-Power-MOSFET is connected to the output terminal of the error amplifier.

In combination with the first aspect and the sixth possible implementation manner of the first aspect, in a seventh possible implementation manner, when the output voltage of the positive pole of the voltage output terminal is higher than a preset threshold, the positive input terminal of the error amplifier The difference between the voltage and the first reference voltage increases, and then the output current of the output terminal of the error amplifier decreases, and the voltage drop between the source and the drain of the P-Power-MOSFET tube increases, and then the The output voltage of the positive pole of the voltage output terminal decreases;

When the output voltage of the positive terminal of the voltage output terminal is lower than the preset threshold, the difference between the voltage of the positive input terminal of the error amplifier and the first reference voltage decreases, and the output current of the output terminal of the error amplifier increases. is large, the voltage drop between the source and drain of the P-Power-MOSFET decreases, and the output voltage of the positive pole of the voltage output terminal increases.

With reference to the possible implementation manner of the first aspect, in an eighth possible implementation manner, the output terminal of the feedback control unit includes a first output terminal and a second output terminal, and the first output terminal of the feedback control unit is connected to the The controlled end of the voltage transformation unit is connected, the second output end of the feedback control unit is connected with the third end of the pressure relief unit,

The feedback control unit includes a first voltage dividing resistor, a second voltage dividing resistor, a digital comparator and a digital controller, wherein:

The first end of the first voltage dividing resistor is connected to the positive pole of the voltage output terminal, the second end of the first voltage dividing resistor is connected to the first end of the second voltage dividing resistor, and the second voltage dividing resistor The second terminal of the piezoresistor is connected to the negative pole of the voltage output terminal, the positive input terminal of the digital comparator is connected to the second terminal of the first voltage dividing resistor, and the negative input terminal of the digital comparator is connected to the first Two reference voltages, the output end of the digital comparator is respectively connected to the input end of the digital controller and the third end of the pressure relief unit, the output end of the digital controller is connected to the receiving end of the voltage transformation unit connected to the control terminal.

In combination with the first aspect and the eighth possible implementation manner of the first aspect, in a ninth possible implementation manner, the voltage transformation unit includes at least three PMOS (Positive channel Metal Oxide Semiconductor, P-channel MOS) transistors, so The number of ports at the output end of the digital controller is not less than the number of the PMOS transistors, wherein the source of each PMOS transistor is connected to the positive pole of the voltage input and output end, and the drain of each PMOS transistor The poles are all connected to the positive pole of the voltage output terminal, and the gate of each PMOS transistor is connected to the corresponding port of the output terminal of the digital controller.

In combination with the first aspect and the ninth possible implementation of the first aspect, in the tenth possible implementation, when the output voltage of the positive pole of the voltage output terminal is higher than a preset threshold, the positive input of the digital comparator The difference between the voltage at the terminal and the second reference voltage increases, and then the output voltage at the output terminal of the error amplifier increases, and the digital controller will reduce the number of the PMOS transistors that are turned on. The total resistance of the PMOS transistor increases, the total voltage drop of the source and drain of the turned-on PMOS transistor increases, and then the output voltage of the positive pole of the voltage output terminal decreases;

When the output voltage of the positive pole of the voltage output terminal is lower than the preset threshold value, the difference between the voltage of the positive input terminal of the digital comparator and the second reference voltage decreases, and then the output voltage of the output terminal of the error amplifier decrease, the digital controller will increase the number of the turned-on PMOS transistors, the total resistance of the turned-on PMOS transistors will decrease, and the total voltage of the source and drain of the turned-on PMOS transistors The drop decreases, and the output voltage of the positive pole of the voltage output terminal increases.

It can be seen from the above that the feedback control unit in the embodiment of the present invention changes the voltage drop of the transformer unit according to the voltage at the voltage output terminal, thereby maintaining the difference between the input voltage and output voltage of the voltage regulator within the rated value, and the filter unit can filter out The clutter in the output voltage of the voltage output terminal, furthermore, when the voltage at the voltage output terminal jumps, the switching tube in the response filter unit is turned on, and the switched on switch tube can release the clutter at the voltage output terminal.

Description of drawings

In order to illustrate the embodiments of the present invention more clearly, the following will briefly introduce the accompanying drawings that are required in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

FIG. 1 is a schematic structural diagram of a circuit of a voltage regulator provided by an embodiment of the present invention;

FIG. 2 is a schematic diagram of a circuit of a voltage regulator provided by an embodiment of the present invention;

FIG. 3 is a schematic diagram of another voltage regulator circuit provided by an embodiment of the present invention.

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

The circuit of the voltage regulator in the embodiment of the present invention can be applied to electronic devices such as smart phones, personal computers, tablet computers, digital music players, and e-readers, and can realize "DC (Direct Current, direct current)-DC" voltage regulation effect.

FIG. 1 is a schematic structural diagram of a circuit of a voltage regulator provided by an embodiment of the present invention. As shown in the figure, the circuit of the voltage regulator in this embodiment may include a voltage input terminal V _i , a voltage transformation unit 110 , a feedback control unit 120 , a pressure relief unit 130 and a voltage output terminal V _o , wherein:

The first terminal of the transformation unit 110 is connected to the positive pole of the voltage input terminal V _i , the second terminal of the transformation unit 110 is connected to the positive pole of the voltage output terminal V _o , the input terminal of the feedback control unit 120 is connected to the positive pole of the voltage output terminal V _o The positive pole is connected, the output end of the feedback control unit 120 is connected with the controlled end of the voltage transformation unit 110, the first end of the pressure relief unit 130 is connected with the positive pole of the voltage output terminal V _o , the second end of the pressure relief unit 130 is connected with the voltage output The negative pole of the terminal V _o is connected, and the third terminal of the pressure relief unit 130 is connected with the output terminal of the feedback control unit 120 .

The feedback control unit 120 is used to correspondingly reduce or increase the voltage drop of the transformation unit 110 to stabilize the output of the positive pole of the voltage output terminal V _o when the output voltage of the positive pole of the voltage output terminal V _o is higher or lower than a preset threshold value voltage, the pressure relief unit 130 includes a switch tube, and the feedback control unit 120 is also used to turn on the switch tube when the output voltage of the positive pole of the voltage output terminal V _o jumps, and the switch tube is used to discharge the voltage of the voltage output terminal when it is turned on Positive clutter.

Optionally, the circuit of the voltage regulator may further include a filter unit 140, the first terminal of the filter unit 140 is connected to the positive pole of the voltage output terminal V _o , and the second terminal of the filter unit 140 is connected to the negative pole of the voltage output terminal V _o . The filter unit 140 is used to filter out the positive clutter of the voltage output terminal V _o .

FIG. 2 is a schematic diagram of an optional voltage regulator circuit in an embodiment of the present invention.

As an optional embodiment, the voltage transformation unit 110 includes a P-Power-MOSFET (Positive channel-Power-Metal Oxide Semiconductor Field Effect Transistor, P-channel power MOS field effect transistor) transistor, and the P-Power-MOSFET transistor is such as MOSFET is shown in the figure; the feedback control unit 120 includes a first voltage dividing resistor R1, a second voltage dividing resistor R2 and an error amplifier A1; the switch tube is an NMOS (Negative channel Metal Oxide Semiconductor, N-channel MOS) tube, as shown in the figure NMOS As shown, the pressure relief unit 130 further includes a first filter capacitor C1 and an equivalent resistor R3; the filter unit 140 includes a second filter capacitor C2.

Wherein, the drain of the switching tube NMOS is connected to the positive pole of the voltage output terminal V _o , the source of the switching tube NMOS is respectively connected to the first end of the first filter capacitor C1 and the first end of the equivalent resistance R3, and the voltage output terminal V The negative electrode of _o is respectively connected to the second end of the first filter capacitor C1 and the second end of the equivalent resistor R3, the gate of the switching transistor NMOS is connected to the output end of the error amplifier A1, and the first end of the first voltage dividing resistor R1 It is connected to the positive pole of the voltage output terminal V _o , the second terminal of the first voltage dividing resistor R1 is connected to the first terminal of the second voltage dividing resistor R2, and the second terminal of the second voltage dividing resistor R2 is connected to the voltage output terminal V _o The negative pole is connected, the positive input terminal of the error amplifier A1 is connected to the second terminal of the first voltage dividing resistor R1, the negative input terminal of the error amplifier A1 is connected to the first reference voltage Vref1, and the output terminal of the error amplifier A1 is also connected to the power tube MOSFET. The gate is connected, the source of the power MOSFET is connected to the positive pole of the voltage input terminal V _i , the drain of the power transistor MOSFET is connected to the positive pole of the voltage output terminal V _o , the first terminal of the second filter capacitor C2 is connected to the voltage output terminal V The positive pole of _o is connected, and the second terminal of the second filter capacitor C2 is connected with the negative pole of the voltage output terminal V _o .

The working principle of the voltage regulator will be specifically described below in conjunction with Figure 2:

After the voltage input terminal V _i is powered on and the voltage output terminal V _o is connected to an external load, the circuit of the voltage regulator is in a working state. Let the voltage of the positive pole of the voltage input terminal V _i be V _in , the voltage of the positive pole of the voltage output terminal V _o be V _out , and the voltage drop between the voltage input terminal V _i and the voltage output terminal V _o be V _drop , then V _out = V _in -V _drop . Among them, traditional voltage regulators (such as 78xx series chips) require V _drop to be greater than 2V, otherwise they cannot work normally. In some cases where V _drop is less than 2V (such as V _in =5V, V _out =3.3V, this When V _drop =1.7V<2V), the traditional voltage regulator cannot meet the requirements. In view of the above situation, the embodiment of the present invention selects the P-Power-MOSFET tube as the transformer part to realize the voltage regulator with low drop. Specifically, the resistance R _ds between the source and the drain of the P-Power-MOSFET is very small, so The voltage drop between the source and drain of the P-Power-MOSFET in the linear operating region can be less than 2V, which can achieve low drop voltage.

Further, the loop "1→2→3→4" constitutes a feedback loop. When the output voltage of the positive pole of the voltage output terminal V _o is higher than the preset threshold, the voltage of the positive input terminal of the error amplifier A1 and the voltage of the first reference voltage Vref1 As the difference increases, it can be seen from the "input-output" characteristic of the error amplifier that the output current at the output terminal of the error amplifier A1 decreases according to the increase of the above difference. Since the P-Power-MOSFET works in the linear working area at this time, the voltage drop of the source and drain of the P-Power-MOSFET increases as the output current of the error amplifier A1 decreases (for specific principles, please refer to P- The characteristic curve of the Power-MOSFET tube will not be repeated here). According to V _out =V _in -V _drop , if V _drop increases, V _out decreases, so the output voltage of the positive pole of the voltage output terminal V _o decreases until it returns to the preset threshold. For example: suppose V _in =5V, the preset threshold value of V _out is 3.3V, V _ref1 =1V, and R1=R2, the sampling voltage V _reg of the positive input terminal of error amplifier A1 =1.65V, namely (V _reg -V _ref1 )=0.65V, when V _out jumps from 3.3V to 4V, V _reg increases to 2V, at this time (V _reg -V _ref1 )=1V>0.65V, and then the output current of error amplifier A1 according to (Vreg- The increased value of Vref1) decreases correspondingly, so that the voltage drop of the source and drain of the P-Power-MOSFET increases until it increases by 0.7V, so that V _out =4V-0.7V=3.3V, and again Restore preset thresholds. Similarly, it can be seen that, conversely, when the output voltage of the positive pole of the voltage output terminal V _o is lower than the preset threshold, the output voltage of the positive pole of the voltage output terminal V _o increases until it returns to the preset threshold. The embodiment of the present invention realizes the function of stabilizing the output voltage of the voltage regulator.

In addition, the capacitor C2 constitutes a simple filter unit 140 to filter out the non-DC current mixed in the voltage output terminal V _o , that is, clutter. The filtering unit 140 is not limited to only include the capacitor C2.

It should be pointed out that, firstly, although the aforementioned feedback loop (i.e., the feedback control unit 120) can stabilize the output voltage of the voltage output terminal V _o , the delay of the entire feedback process is relatively long, and the jitter delay of clutter is relatively long. Short, can not respond quickly, second, the larger the capacitance value of C1 in the above-mentioned capacitor C2 (that is, the filter unit 140), the stronger the filtering ability, but the delay of the output voltage change will also increase, and the difficulty factor of making the capacitor also increased. It can be seen that the voltage regulator including only the feedback control unit 120 and the RC filter unit 140 is not perfect. Therefore, the circuit of the voltage regulator also includes a pressure relief unit 130, specifically, when the output voltage of the voltage output terminal V _o jumps (that is, the output voltage value changes greatly in a short time), the positive voltage of the error amplifier A1 The difference between the voltage at the input terminal and the first reference voltage Vref1 increases, and the output voltage at the output terminal of the error amplifier A1 increases according to the increase in the above-mentioned difference, and the voltage of the gate of the switching tube will be greater than the opening of the switching tube. voltage, the switching tube NMOS is turned on, and then the filter network composed of the first filter capacitor C1 and the equivalent resistor R3 filters out the clutter of the positive pole of the voltage output terminal V _o , thereby reducing the spike pulse and improving the performance of the voltage regulator. anti-noise performance.

Fig. 3 is a schematic diagram of another optional voltage regulator circuit in the embodiment of the present invention. The difference between the circuits in FIG. 3 and FIG. 2 lies in the voltage transformation unit 110 and the feedback control unit 120. FIG. 2 is a circuit diagram in an analog feedback mode, and FIG. 3 is a circuit diagram in a digital feedback mode. It should be pointed out that the working principles of the pressure relief unit 130 and the filtering unit 140 will not be repeated in this implementation.

As an optional embodiment, the voltage transformation unit 110 includes at least three PMOS (Positive channel Metal Oxide Semiconductor, P-channel MOS) transistors, as shown in the figure PMOS; the output terminal of the feedback control unit 120 includes a first output terminal and the second output terminal, respectively as shown in terminal 5 and terminal 6 in the figure, the feedback control unit 120 includes a first voltage dividing resistor R1, a second voltage dividing resistor R2, a digital comparator A2 and a digital controller A3, the digital controller The number of ports at the output end of A3 is not less than the number of PMOS tubes.

Wherein, the first end of the first voltage dividing resistor R1 is connected to the positive pole of the voltage output terminal V _o , the second end of the first voltage dividing resistor R1 is connected to the first end of the second voltage dividing resistor R2, and the second voltage dividing resistor The second terminal of R2 is connected to the negative pole of the voltage output terminal V _o , the positive input terminal of the digital comparator A2 is connected to the second terminal of the first voltage dividing resistor R1, and the negative input terminal of the digital comparator A2 is connected to the second reference voltage Vref2, the output terminal of the digital comparator A2 is respectively connected with the input terminal of the digital controller A3 and the gate of the switching transistor NMOS, and each output terminal of the digital controller A3 is respectively connected with the gate of the corresponding PMOS transistor.

Specifically, the working principles of the voltage transformation unit 110 and the feedback control unit 120 will be described below with reference to FIG. 3 :

After the voltage input terminal V _i is powered on and the voltage output terminal V _o is connected to an external load, the circuit of the voltage regulator is in a working state. The loop "1→2→3→4→5" constitutes a feedback loop. When the output voltage of the positive pole of the voltage output terminal V _o is higher than the preset threshold, the voltage of the positive input terminal of the digital comparator A2 and the second reference voltage Vref2 The difference increases, and the output voltage of the digital comparator A2 increases according to the increase of the difference, that is, the voltage at the input terminal of the digital controller A3 increases. Among them, the digital controller (DC, Digital Controller) is a common electronic controller, which is generally connected to the feedback part of the circuit, including A/D conversion or D/A conversion, and is usually completed by computer software programming or logic circuits. specific control algorithm. The digital controller A3 correspondingly reduces the number of turned-on PMOS transistors according to the increased value of the output voltage of the digital comparator A2. Since there is a resistance R _ds between the drain and the source of the turned-on PMOS transistors, if the parallel resistance If R _ds decreases, the total resistance of the turned-on PMOS tube will increase, and its voltage drop will also increase. According to V _out =V _in -V _drop , it can be known that V _drop increases and V _out decreases, so the voltage output terminal The output voltage at the positive pole of V _o decreases. For example: suppose there are 4 PMOS transistors in the circuit, the output byte of the output terminal of the digital controller A3 is "0011", that is, the PMOS transistors M1 and M2 are turned on, M3 and M4 are not turned on, and V _in = 5V, V _out The preset threshold is 3.3V, V _ref1 = 1V, and R1 = R2, the sampling voltage V _reg of the positive input terminal of digital comparator A2 = 1.65V, then, when V _out jumps from 3.3V to 4V, V _reg increase to 2V, at this time (V _reg -V _ref1 )=1V>0.65V, the output voltage at the output terminal of digital comparator A2 increases correspondingly according to the increase value of (V _reg -V _ref1 ), digital controller A3 analyzes After the output voltage of the digital comparator A2, the byte "0111" is output, that is, only the PMOS transistor M1 is controlled to be turned on, and the resistance of M1 is increased compared to the resistance of the parallel connected M1 and M2, so that the total of the turned-on PMOS transistors The voltage drop is increased by 0.7, so that V _out =4V-0.7V=3.3V, and the preset threshold value is restored again. Similarly, it can be seen that, conversely, when the output voltage of the positive pole of the voltage output terminal V _o is lower than the preset threshold, the output voltage of the positive pole of the voltage output terminal V _o increases. The embodiment of the present invention realizes the function of stabilizing the output voltage of the voltage regulator. It should be pointed out that the more the number of PMOS transistors is, the higher the precision of the voltage transformation by the voltage transformation unit 110 is.

The feedback control unit in the embodiment of the present invention changes the voltage drop of the transformer unit according to the voltage at the voltage output terminal, so as to maintain the difference between the input voltage and output voltage of the voltage regulator within the rated value, and the filter unit can filter out the voltage output at the voltage output terminal. The clutter in the voltage, further, when the voltage at the voltage output terminal jumps, the switch tube in the response filter unit is turned on, and the switched switch tube can release the clutter at the voltage output terminal.

The circuit of the voltage regulator provided by the embodiment of the present invention has been introduced in detail above. In this paper, specific examples are used to illustrate the principle and implementation of the present invention. The description of the above embodiment is only used to help understand the method of the present invention. and its core idea; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation and scope of application. limits.

Claims (9)

1. a kind of circuit of voltage adjuster, it is characterised in that the circuit includes voltage input end, voltage transformation unit, feedback control Unit processed, pressure release unit and voltage output end, wherein：

The voltage transformation unit includes at least three PMOSs, the source electrode of each PMOS with the voltage input end just Extremely be connected, the positive pole of the drain electrode with the voltage output end of each PMOS is connected, the feedback control unit it is defeated Enter end to be connected with the positive pole of the voltage output end, the feedback control unit includes digitial controller, the digitial controller Output end be connected with the controlled end of the voltage transformation unit, the port number of the output end of the digitial controller is no less than described The number of PMOS, the grid of each PMOS is connected with the corresponding ports of the output end of the digitial controller, described The first end of pressure release unit is connected with the positive pole of the voltage output end, the second end and the voltage output of the pressure release unit The negative pole at end is connected, and the 3rd end of the pressure release unit is connected with the output end of the feedback control unit；

The feedback control unit is used for when the output voltage of the positive pole of the voltage output end is higher or lower than predetermined threshold value The pressure drop of the voltage transformation unit is accordingly reduced or raised to stablize the output voltage of the positive pole of the voltage output end, it is described to let out Pressure unit includes switching tube, the first filter capacitor and equivalent resistance, and the feedback control unit is additionally operable in the voltage output During the output voltage saltus step of the positive pole at end, the output voltage increase of the output end of the feedback control unit, the switching tube The voltage of grid will be greater than the cut-in voltage of the switching tube, and then turn on the switching tube, in switching tube conducting when institute Stating the filter network that the first filter capacitor and the equivalent resistance constitute is used for the clutter of the positive pole for filtering the voltage output end.

2. the circuit of voltage adjuster as claimed in claim 1, it is characterised in that the switching tube is NMOS (Negative Channel Metal Oxide Semiconductor, N-channel MOS) pipe, wherein：

The drain electrode of the switching tube is connected with the positive pole of the voltage output end, and the source electrode of the switching tube is respectively with described first The first end of filter capacitor is connected with the first end of the equivalent resistance, the grid of the switching tube and the feedback control unit Output end be connected, the negative pole of the voltage output end the second end respectively with first filter capacitor and the equivalent resistance The second end be connected.

3. the circuit of voltage adjuster as claimed in claim 1, it is characterised in that the circuit also includes filter unit, institute The first end for stating filter unit is connected with the positive pole of the voltage output end, and the second end of the filter unit is defeated with the voltage The negative pole for going out end is connected；

The filter unit is used for the clutter of the positive pole for filtering the voltage output end.

4. the circuit of voltage adjuster as claimed in claim 3, it is characterised in that the filter unit includes the second filtered electrical Hold, the first end of second filter capacitor is connected with the positive pole of the voltage output end, the second of second filter capacitor End is connected with the negative pole of the voltage output end.

5. the circuit of voltage adjuster as claimed in claim 1, it is characterised in that the feedback control unit includes first point Piezoresistance, the second divider resistance and error amplifier, wherein：

The first end of first divider resistance is connected with the positive pole of the voltage output end, and the second of first divider resistance End is connected with the first end of second divider resistance, and the second end of second divider resistance is negative with the voltage output end Extremely it is connected, the positive input terminal of the error amplifier is connected with the second end of first divider resistance, the error amplifier Negative input end access the first reference voltage, the output end of the error amplifier respectively with the controlled end of the voltage transformation unit and 3rd end of the pressure release unit is connected.

6. the circuit of voltage adjuster as claimed in claim 5, it is characterised in that the voltage transformation unit includes P-Power- MOSFET(Positive channel-Power-Metal Oxide Semiconductor Field Effect Transistor, P-channel power MOS field effect crystal) pipe, wherein, source electrode and the electricity of the P-Power-MOSFET pipes The positive pole of input is pressed to be connected, the drain electrode of the P-Power-MOSFET pipes is connected with the positive pole of the voltage output end, described The grid of P-Power-MOSFET pipes is connected with the output end of the error amplifier.

7. the circuit of voltage adjuster as claimed in claim 6, it is characterised in that

When the output voltage of the positive pole of the voltage output end is higher than predetermined threshold value, the positive input terminal of the error amplifier The difference of voltage and first reference voltage increases, and then the output current of the output end of the error amplifier reduces, institute The source electrode of P-Power-MOSFET pipes and the pressure drop increase of drain electrode are stated, and then the output voltage of the positive pole of the voltage output end subtracts It is small；

When the output voltage of the positive pole of the voltage output end is less than predetermined threshold value, the positive input terminal of the error amplifier The difference of voltage and first reference voltage reduces, and then the output current of the output end of the error amplifier increases, institute The pressure drop of the source electrode and drain electrode of stating P-Power-MOSFET pipes reduces, and then the output voltage of the positive pole of the voltage output end increases Greatly.

8. the circuit of voltage adjuster as claimed in claim 1, it is characterised in that the output end bag of the feedback control unit Include the first output end and the second output end, the first output end of the feedback control unit and the controlled end phase of the voltage transformation unit Even, the second output end of the feedback control unit is connected with the 3rd end of the pressure release unit,

The feedback control unit also includes the first divider resistance, the second divider resistance and digital comparator, wherein：

The first end of first divider resistance is connected with the positive pole of the voltage output end, and the second of first divider resistance End is connected with the first end of second divider resistance, and the second end of second divider resistance is negative with the voltage output end Extremely it is connected, the positive input terminal of the digital comparator is connected with the second end of first divider resistance, the digital comparator Negative input end access the second reference voltage, the output end of the digital comparator respectively with the input of the digitial controller The 3rd end with the pressure release unit is connected, and the output end of the digitial controller is connected with the controlled end of the voltage transformation unit.

9. the circuit of voltage adjuster as claimed in claim 8, it is characterised in that

When the output voltage of the positive pole of the voltage output end is higher than predetermined threshold value, the positive input terminal of the digital comparator The difference of voltage and second reference voltage increases, and then the output voltage of the output end of the digital comparator increases, institute Stating digitial controller will reduce the number of the PMOS of conducting, and total resistance increase of the PMOS of the conducting is described to lead The source electrode of logical PMOS and the overall presure drop of drain electrode increase, and then the output voltage of the positive pole of the voltage output end reduces；

When the output voltage of the positive pole of the voltage output end is less than predetermined threshold value, the positive input terminal of the digital comparator The difference of voltage and second reference voltage reduces, and then the output voltage of the output end of the digital comparator reduces, institute Stating digitial controller will increase the number of the PMOS of conducting, and total resistance of the PMOS of the conducting is reduced, described to lead The source electrode of logical PMOS and the overall presure drop of drain electrode reduce, and then the output voltage of the positive pole of the voltage output end increases.