CN107465418A - A kind of 14443Type A transmitting coding circuits for supporting 4 kinds of communication speeds - Google Patents

A kind of 14443Type A transmitting coding circuits for supporting 4 kinds of communication speeds Download PDF

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Publication number
CN107465418A
CN107465418A CN201710877765.7A CN201710877765A CN107465418A CN 107465418 A CN107465418 A CN 107465418A CN 201710877765 A CN201710877765 A CN 201710877765A CN 107465418 A CN107465418 A CN 107465418A
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CN
China
Prior art keywords
kinds
frame sequence
register
sent
bit
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710877765.7A
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Chinese (zh)
Inventor
孙缵
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Wuhan Xinchang Technology Co Ltd
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Wuhan Xinchang Technology Co Ltd
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Priority to CN201710877765.7A priority Critical patent/CN107465418A/en
Publication of CN107465418A publication Critical patent/CN107465418A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/40Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
    • H04B5/48Transceivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B5/00Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/70Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
    • H04B5/77Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for interrogation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/26Special purpose or proprietary protocols or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/38Universal adapter
    • G06F2213/3852Converter between protocols

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

The invention discloses a kind of 14443 Type A for supporting 4 kinds of communication speeds to launch coding circuit, including:One programmable clock counter, for 4 kinds of communication speed patterns, 4 kinds of clock counts are realized accordingly;One frame sequence maker, add frame head SOC and postamble EOC, Serial output frame sequence respectively in the front and back of parallel data to be sent;One bit digit counters, the bit positions of the frame sequence of transmission are counted, for redirecting for the state machine inside control frame sequence generator;One modified Miller code encoder, according to the coded format of regulation, selection uses coded sequence, produces coding output.The present invention supports 4 kinds of communication speeds, improves the compatibility of system, reduces cost of investment.

Description

A kind of 14443Type-A transmitting coding circuits for supporting 4 kinds of communication speeds
Technical field
The present invention relates to a kind of circuit, especially a kind of 14443 Type-A transmitting coding circuits for supporting 4 kinds of communication speeds.
Background technology
With the development of social economy and the continuous improvement of the level of informatization, the contactless smart IC in near-field communication field Card obtains more and more extensive application.Support Type-A types as defined in the agreements of ISO/IEC 14443 of near-field communication are should With a widest type, while in view of a variety of application scenarios have different requirements to communication speed, agreement is also advised The different communication speed patterns of 4 kinds of 106Kbps, 212Kbps, 424Kbps and 848Kbps etc. are determined.
Non-contact reader-writer as part important near field communication system, it is necessary to support 14443 Type-A and 4 kinds of communication speeds.The compatibility of system can be thus improved, reduces the cost of investment of system.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of transmitting coding circuit for supporting 14443 Type-A agreements, energy It is enough that write operation is carried out to Non-contact Intelligent IC Card with 4 kinds of communication speeds, so as to adapt to different application scenarios, effectively improve and be The compatibility of system, reduce the cost of investment of system.
In order to solve the above technical problems, the 14443 Type-A transmitting codings proposed by the present invention for supporting 4 kinds of rate modes Circuit(As shown in Figure 1)Including following submodule:
Programmable clock counter, it is real respectively for 4 kinds of rate modes such as 106Kbps, 212Kbps, 424Kbps and 848Kbps Existing 128 clock counts, 64 clock counts, 32 clock counts and 16 clock counts, produce clock count signal clk_ Cnt and count completion signal etu_done.
Frame sequence maker, inside include state machine and parallel-to-serial converter.According to as defined in 14443 Type-A agreements Send data frame format(As shown in Figure 2), frame head is added respectively in parallel data tx_data to be sent front and back SOC and postamble EOC, Serial output frame sequence frm_seq.
Bit digit counters, the frame sequence frm_seq of transmission bit positions are counted, produce bit positions count signal Bit_cnt, for the displacement Serial output redirected with parallel-to-serial converter of the state machine inside control frame sequence generator.
Modified Miller code encoder, according to modified Miller code(Modified Miller)Coded format(Such as Fig. 3 institutes Show), produce Encoded output signal tx_code.
Circuit structure of the present invention is simple, and it is easy to realize.Wherein, one etu length of programmable clock counter indoor design Register is spent, the value of the register can be configured as 127,63,31 and 15 according to 4 kinds of rate modes, realize clock count It is programmable.Modified Miller code decoder internal devises two registers, i.e. groove starts register and groove end register, For carving at the beginning of to groove and finish time is controlled, the adjustable of recess width is realized;Also increase inside it in addition A register is added, for recording the value of a upper bit position for bit positions to be sent, to determine current logic to be sent The coding of " 0 " is using Sequency Y or using Sequency Z.
Brief description of the drawings
The present invention is further detailed explanation with embodiment below in conjunction with the accompanying drawings:
Fig. 1 is the structure chart of the transmitting coding circuit of supporting rate pattern proposed by the present invention;
Fig. 2 is the transmission data frame format schematic diagram of the agreement Type-A type stateds of ISO/IEC 14443;
Fig. 3 is the amendment miller coding form schematic diagram of the agreement Type-A type stateds of ISO/IEC 14443.
In figure:1st, programmable clock counter;2nd, bit digit counters;3rd, frame sequence maker;4th, modified Miller code encodes Device.
Embodiment
With reference to shown in Fig. 1,14443 Type-A for supporting 4 kinds of communication speeds launch coding circuit in following implementation In example, including:
One programmable clock counter 1, one etu length register of indoor design.Its input has clock signal of system clk (System operating frequency as defined in the agreements of ISO/IEC 14443 is 13.56MHz)With rate mode signal speed_mode [1:0], Output has clock count signal clk_cnt and count completion signal etu_done.Rate mode believes speed_mode [1:0] encode For 00,01,10 and 11,4 kinds of rate modes such as 106Kbps, 212Kbps, 424Kbps and 848Kbps are correspond to respectively.Therefore, The value of etu length registers can be configured to 127,63,31 and 15 accordingly.Clock counter according to the value of this register, Can realizes 128 clock counts or 64 clock counts or 32 clock counts, or 16 clock counts, from And realize the support to 4 kinds of communication speeds.Count completion signal etu_done when counter counts have expired an etu length, Logical one is exported, otherwise exports logical zero.
One frame sequence maker 3, inside include state machine and parallel-to-serial converter.It, which is inputted, has clock signal clk, counts Complete signal etu_done, position count signal bit_cnt, and data-signal tx_data [8 to be sent:0];Output has frame Sequence signal frm_seq and state control signal.
Data frame format is sent as defined in the 14443 Type-A agreements according to Fig. 2, frame sequence is by frame head SOC(1 bit), postamble EOC(2 bit)And n data cell to be sent(8bit data bit adds 1bit parity bits, 9 altogether bit)Composition.Therefore, the function of frame sequence maker realization is:Controlled by internal state machine, in n data cell to be sent Front and back add frame head SOC and postamble EOC respectively, complete framing operation, while frame sequence is completed by parallel-to-serial converter Arrange frm_seq Serial output.
One bit digit counters 2, its input signal are the state control letter that clk, etu_done and frame sequence maker export Number.It realize function be:The frame sequence frm_seq of transmission bit positions are counted, produce position count signal bit_cnt, For the displacement Serial output redirected with parallel-to-serial converter of the state machine inside control frame sequence generator.
One modified Miller code encoder 4, its input signal are that clk, clk_cnt, frm_seq and frame sequence maker export State control signal, output signal tx_code.
As shown in figure 3, modified Miller code defines 3 kinds of coded sequences, i.e. Sequency X, Sequency Y and Sequency Z, wherein X and Z have modulation " groove "(Width is t1).Therefore, decoder internal devises two registers, i.e., Groove starts register and groove end register, for carving at the beginning of to groove(tx)And finish time(tx+t1)Carry out Control, realize the adjustable of recess width.
Frame head SOC only has a bit, is encoded to Sequency Z.Postamble EOC has 2 bit, first bit to be fixed as " 0 ", second bit are encoded to Sequency Y.Other bit coded system is in frame sequence:Logical one is encoded to Sequency X;The coding of logical zero is divided into two kinds of situations, if a upper bit of current " 0 " is " 1 ", then this " 0 " Just it is encoded to Sequency Y;A upper bit of current if " 0 " is also " 0 ", then current this " 0 " is just encoded to Sequency Z.Therefore, a register tx_lastbit is also add in decoder internal, for recording bit positions to be sent A upper bit position value, to determine that the coding of current " 0 " to be sent is to use Sequency Y or use Sequency Z。
The present invention is described in detail above by embodiment, but these are not formed to the present invention's Limitation.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these It should be regarded as protection scope of the present invention.

Claims (3)

  1. A kind of 1. 14443Type-A transmitting coding circuits for supporting 4 kinds of communication speeds, it is characterised in that including:
    One programmable clock counter, for 4 kinds of rate modes such as 106Kbps, 212Kbps, 424Kbps and 848Kbps, difference Realize 4 kinds of corresponding clock counts;
    One frame sequence maker, inside include state machine and parallel-to-serial converter, the hair according to as defined in 14443 Type-A agreements Data frame format is sent, frame head SOC and postamble EOC, Serial output are added respectively in the front and back of parallel data to be sent Frame sequence;
    One bit digit counters, the bit positions of the frame sequence of transmission are counted, bit positions count signal is produced, for control frame The displacement Serial output redirected with parallel-to-serial converter of state machine inside sequence generator;
    One modified Miller code encoder, according to the coded format of modified Miller code, produce Encoded output signal tx_code.
  2. 2. transmitting coding circuit as claimed in claim 1, it is characterised in that:The programmable clock counter, indoor design One etu length register, according to 4 kinds of rate modes such as 106Kbps, 212Kbps, 424Kbps and 848Kbps, etu length The value of register can be configured to 127,63,31 and 15 accordingly, when can thus realize 128 clock counts or 64 Clock counts or 32 clock counts, or 16 clock counts, it is achieved thereby that the support to 4 kinds of communication speeds.
  3. 3. transmitting coding circuit as claimed in claim 1, it is characterised in that:The modified Miller code encoder, indoor design Two registers, i.e. groove start register and groove end register, for carving at the beginning of to coded sequence further groove It is controlled with finish time, realizes the adjustable of recess width, in addition, decoder internal also add a register, For recording the value of a upper bit position for bit positions to be sent, to determine that the coding of current logical zero to be sent is to use Sequency Y still use Sequency Z.
CN201710877765.7A 2017-09-26 2017-09-26 A kind of 14443Type A transmitting coding circuits for supporting 4 kinds of communication speeds Pending CN107465418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710877765.7A CN107465418A (en) 2017-09-26 2017-09-26 A kind of 14443Type A transmitting coding circuits for supporting 4 kinds of communication speeds

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710877765.7A CN107465418A (en) 2017-09-26 2017-09-26 A kind of 14443Type A transmitting coding circuits for supporting 4 kinds of communication speeds

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112291170A (en) * 2020-11-17 2021-01-29 四川科道芯国智能技术股份有限公司 Improved Miller code decoding method, device and equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112291170A (en) * 2020-11-17 2021-01-29 四川科道芯国智能技术股份有限公司 Improved Miller code decoding method, device and equipment

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Application publication date: 20171212

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