CN101201805A - Serial transmission controller and serial transmission decoder as well as serial transmission method thereof - Google Patents
Serial transmission controller and serial transmission decoder as well as serial transmission method thereof Download PDFInfo
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- CN101201805A CN101201805A CNA2006101674312A CN200610167431A CN101201805A CN 101201805 A CN101201805 A CN 101201805A CN A2006101674312 A CNA2006101674312 A CN A2006101674312A CN 200610167431 A CN200610167431 A CN 200610167431A CN 101201805 A CN101201805 A CN 101201805A
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Abstract
The invention provides a serial transmission controller and a serial transmission decoder as well as a method of serial transmission thereof. Firstly, a current address is compared with an access address, an access address mode is selected from a plurality of transfer address modes and address information is produced, wherein, each transfer address mode is used for transferring the address information by using different bit long; then access order is selected from a serial order set according to the access address mode; finally, the access order and the address information are transferred on a serial interface by a serial transmission mode. The invention can conduct command coding with different bit long for the access order and transfers the coded access order on the serial interface, thus reducing the required bits when in transmission and further improving the transmission efficiency.
Description
Technical field
The invention relates to a kind of Data Transmission Control Unit and demoder and data transmission method thereof, and particularly relevant for a kind of serial transmission controller and demoder and serial transmission method thereof.
Background technology
Traditionally, as the access interface of memory devices such as flash memory, employing be parallel (parallel) transmission interface of address and data bus, but such interface need use a large amount of pins, causes the Chip Packaging cost too high.Therefore in order to reduce the number of chip pin, serial (serial) transmission interface is widely adopted, for example serial peripheral interface (Serial Peripheral Interface, SPI).
Fig. 1 is the data transfer path figure of the general serial peripheral interface of explanation.Please refer to Fig. 1, pass through the mutual Data transmission of serial peripheral interface between main control end 150 and the SPI flash memory 100 (being controlled end), this serial peripheral interface comprises the SPI controller 160 of main control end 150 and the SPI controller 110 of SPI flash memory, communicates with each other by serial time clock line SCK, enable line CE_B and external data each other.The SPI controller 110 of SPI flash memory 100 inside and flash memory 120 then are by address date, internal data, enable line CE_B, write-enable line WE_B and read enable line OE_B and communicate with each other.
Fig. 2 is data transfer clock figure among Fig. 1.SPI interface among Fig. 1 uses 4 pins (being DI, DO, SCK and CE pin), is used for carrying out synchronous serial communication.The CE pin transmits the enable signal CE_B whether control signal enables, and DI and DO pin are used for transmitting data respectively and write and read this flash memory, and the SCK pin then is used for transmitting a clock signal, so that the data transfer operation of this flash memory is synchronous.In the rising edge of serial clock signal (SCK), data will be latched in this flash memory, and in the drop edge of SCK signal, data then are moved out of this flash memory.Transmit because data are the modes with serial, reduced so have the needed pin number of the flash memory of this SPI interface.
Yet present serial peripheral interface (SPI) uses fixing field length to transmit different control commands and address information, and transmits relevant data bit according to different control commands.In case when data read address is discontinuous, must repeat to send order and address bit always, cause the inefficiency of transmission, can't meet the frequency range demand of present High Speed System.
Summary of the invention
Purpose of the present invention just provides a kind of serial transmission controller, it can be according to different access address patterns, select suitable access instruction, wherein, different transfer addresses pattern uses that different positions is long comes transfer address information, so can reduce position required when transmitting, the present invention more can carry out variable length code with access instruction, and then improve transfer efficiency.
A further object of the present invention provides a kind of serial transmission demoder, it can be according to the access instruction that receives, decode corresponding access address pattern, wherein, different transfer addresses pattern uses that different positions is long comes transfer address information, so can shorten the time that transmission spends, the present invention more can decode the access instruction after the variable length code, improves transfer efficiency.
A further object of the present invention provides a kind of method of serial transmission, its suitable access instruction is to select according to different access address patterns, wherein, different transfer addresses pattern uses that different positions is long comes transfer address information, so can reduce position required when transmitting, the present invention more can carry out variable length code with access instruction, the order that frequency of utilization is high more, with short more position long codes,, meet the frequency range demand of High Speed System with the elevator system reading efficiency.
Based on above-mentioned and other purpose, the present invention proposes a kind of serial transmission controller, in order to the foundation access address corresponding access instruction is transmitted on the serial line interface, this serial transmission controller comprises present address register, address scrambler and serial line interface scrambler.Wherein the present address register is in order to store present address; Address scrambler is coupled to the present address register, in order to comparison present address and access address, and selects the access address pattern from the pattern of a plurality of transfer addresses, and produces corresponding address information.The serial line interface scrambler then is coupled to address scrambler, in order to access instruction and address information are transmitted on the serial line interface in the serial transmission mode.Wherein, serial transmission controller is according to the access address pattern, concentrate the selection access instruction in serial command, the serial command collection comprises a plurality of instruction forms, in these instruction forms at least one can be used in these transfer address patterns, aforementioned each transfer address pattern uses that different positions is long comes transfer address information.
According to the described serial transmission controller of embodiments of the invention, more comprise and to change the length coding device, after can changing the length coding device and access instruction being had the long order number of coordination, the side sees through the serial line interface scrambler, and the access instruction behind the coding is transmitted on the serial line interface in the serial transmission mode.
According to the described serial transmission controller of embodiments of the invention, above-mentioned changed length coding device is the frequency of utilization statistical value according to the various access instructions that use different transfer address patterns, and frequency of utilization heals, and the little position of healing is long comes the coded access instruction to high person to have.
According to the described serial transmission controller of embodiments of the invention, wherein, after the address scrambler was chosen the access address pattern, serial transmission controller more was stored to the access address present address register, to upgrade present address.
From another viewpoint, the present invention proposes a kind of method of serial transmission, in order to the foundation access address corresponding access instruction is transmitted on the serial line interface, the method comprises the following steps: at first relatively present address and access address, from the pattern of a plurality of transfer addresses, select the access address pattern, and produce corresponding address information; Then according to the access address pattern, concentrate the selection access instruction in serial command, the serial command collection comprises a plurality of instruction forms, in these instruction forms at least one can be used in these transfer address patterns, aforementioned each transfer address pattern uses that different positions is long comes transfer address information; At last access instruction and address information are transmitted on the serial line interface in the serial transmission mode.
According to the method for the described serial transmission of embodiments of the invention, wherein more comprise and deposit present address, and after selecting the access address pattern, upgrade present address with the access address.
According to the method for the described serial transmission of embodiments of the invention, more comprise access instruction had the long order number of coordination after, the access instruction after will encoding in the side is transmitted on the serial line interface in the serial transmission mode.
According to the method for the described serial transmission of embodiments of the invention, wherein according to the frequency of utilization statistical value of the various access instructions that use different transfer address patterns, frequency of utilization heals high person with little long this access instruction of encoding of healing.
From another viewpoint, the present invention proposes a kind of serial transmission demoder again, in order to receive access instruction from serial line interface, to obtain corresponding access address, the serial transmission demoder comprises serial line interface demoder, present address register and address decoder.Wherein the serial line interface demoder is coupled to serial line interface, in order to the serial signal on the decoding serial line interface, to obtain access instruction and address information.The present address register is then in order to store present address.Address decoder is coupled to serial line interface demoder and present address register, in order to according to an access address pattern, address information and present address in the pattern of a plurality of transfer addresses, produces the access address, and upgrades present address with the access address.Wherein, the serial transmission demoder is according to access instruction, to judge and acquisition access address pattern, access instruction belongs to the serial command collection, the serial command collection comprises a plurality of instruction forms, in these instruction forms at least one can be used in these transfer address patterns, aforementioned each transfer address pattern uses that different positions is long comes transfer address information.
According to the described serial transmission demoder of embodiments of the invention, wherein more comprise and to change length decoder, after the long access instruction of coordination do not decode to having of being received on the serial line interface, and then judge and obtain the access address pattern by the serial transmission demoder.
According to the described serial transmission demoder of embodiments of the invention, wherein can change length decoder is the frequency of utilization statistical value that foundation is used the various access instructions of different transfer address patterns, the access instruction of decoding.
From another viewpoint, the present invention proposes a kind of method of serial transmission again, in order to receive access instruction from serial line interface, to obtain corresponding access address, this method is: at first receive and the serial line interface of decoding on serial signal, to obtain access instruction and address information; Then according to access instruction, to obtain the access address pattern in the pattern of a plurality of transfer addresses, wherein access instruction belongs to the serial command collection, this serial command collection comprises a plurality of instruction forms, at least one of them can be used in these transfer address patterns in forms in these instructions, and aforementioned each transfer address pattern uses that different positions is long comes transfer address information; At last according to access address pattern, address information and present address, produce the access address after, upgrade present address with the access address.
According to the method for the described serial transmission of embodiments of the invention, comprise more that wherein decoding has the not long access instruction of coordination from the serial line interface reception, and then obtain the access address pattern.
According to the method for the described serial transmission of embodiments of the invention, wherein more comprise frequency of utilization statistical value according to the various access instructions that use different transfer address patterns, decode to having not the long access instruction of coordination.
After the present invention compares present address and access address, select an access address pattern from the pattern of a plurality of transfer addresses, wherein, different transfer addresses pattern uses that different positions is long comes transfer address information, so can reduce position required when transmitting, and shorten the time that transmission spends.The present invention more can use the fix command field of serial transmission interface instead the long mode of variable bit and encode, all orders are according to the frequency of utilization ordering, and the order of normal more use gives the position long short more coding, and reduce the overall transfer time, have the effect that improves transfer efficiency.
Description of drawings
Fig. 1 is the data transfer path figure of general serial peripheral interface;
Fig. 2 is the data transfer clock figure of Fig. 1;
Fig. 3 A is the serial peripheral interface transmission end block diagram according to a preferred embodiment of the present invention;
Fig. 3 B is the serial peripheral interface transmission end block diagram according to another preferred embodiment of the present invention;
Fig. 4 A is the serial peripheral interface receiving end block diagram according to a preferred embodiment of the present invention;
Fig. 4 B is the serial peripheral interface receiving end block diagram according to another preferred embodiment of the present invention;
Fig. 5 A is the transfer approach process flow diagram according to the serial transmission of a preferred embodiment of the present invention;
Fig. 5 B is the method for reseptance process flow diagram according to the serial transmission of another preferred embodiment of the present invention;
Fig. 6 is a usage ratio statistical graph of concentrating instructions according to the serial command of one embodiment of the invention.
Embodiment
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Fig. 3 A is the serial peripheral interface transmission end block diagram according to one embodiment of the invention, please refer to Fig. 3 A, and transmission end 310 comprises serial transmission controller 320 and micro-control unit 330 among this embodiment.Wherein, serial transmission controller 320 comprises present address register 322, address scrambler 324 and serial line interface scrambler 326, data register 327, order register 328.
When micro-control unit 330 desires during, must send access address 332 and data 334 earlier to receiving end (not shown) access data.The data 334 that data register 327 reception micro-control units 330 transmit are also deposited.324 of address scramblers are made comparisons with the present address that stores in the present address register 322 after receiving the access address 332 that micro-control unit 330 transmits, and selecting the access address pattern from the pattern of a plurality of transfer addresses, and produce address information 325.Select the mode of access address pattern, can provide a plurality of preset values for instance, these preset values are used for distinguishing a plurality of intervals, and each interval corresponds to a specific transfer address pattern.Therefore, after the present address that stores in access address 332 and the present address register 322 made comparisons, just the interval that can be come to by its difference obtained corresponding access address pattern.By the time after address scrambler 324 is selected the access address pattern, serial transmission controller 320 is according to the access address pattern of selecting, concentrate in serial command and to select access instruction 329 and deposit to order register 328, in this embodiment, be to be responsible for concentrating by serial transmission controller 320 selecting access instruction 329 and depositing to order register 328 from serial command, but those skilled in the art should know might not be non-limiting in serial transmission controller 320, also can finish through other steering logics in the address scrambler 324.Serial line interface scrambler 326 via SCK pin, CE_B pin and the data bus DI/DO of serial line interface, is transmitted in access instruction 329 and address information 325 on the serial line interface in the serial transmission mode again.Wherein the data bus on the serial line interface (DI/DO) is used for transmitting this serial data.The SCK pin transmits serial clock signal (SCK), and the CE_B pin transmits enabled instruction (CE_B), is used for log-on data to transmit.
And serial transmission controller 320 is access address patterns of selecting according to address scrambler 324, in the concentrated access instruction 329 of selecting of serial command, this serial command collection comprises a plurality of instruction forms, one of them can be used in these transfer address patterns at least in these instruction forms, and each transfer address pattern is used different long this address informations that transmits in position.For instance, instruction form wherein for example is reading command or writes instruction, and the transfer address pattern for example is to use 4,8,12,16 or 20 to come transfer address information 325.
In addition, after address scrambler 324 was selected the access address pattern, serial transmission controller 320 just was stored to access address 332 in the present address register 322, to upgrade present address.Data register 327 is in order to deposit access data 334, and order register 328 is in order to deposit access instruction 329.In addition, the transmission interface in the present embodiment is compatible in serial peripheral interface (SPI) standard.
Fig. 3 B illustrates and is the serial peripheral interface transmission end block diagram according to another embodiment of the present invention, see also Fig. 3 B, the difference of Fig. 3 B and Fig. 3 A is that serial transmission controller 320 has more comprised and can changes length coding device 321 (for example for huffman encoder), after can changing 321 pairs of access instructions 329 of length coding device and having the long order number of coordination, just see through serial line interface scrambler 326, the access instruction behind the coding is transmitted on the serial line interface in the serial transmission mode.
Can change length coding device 321 and be according to serial command and concentrate different instruction forms to use frequency of utilization statistical value of each instruction of different transfer address patterns, come access instruction 329 is done coding, the frequency of utilization high person of healing is encoded into that to have a little position of healing long.In the present embodiment, all the other members except that can changing length coding device 321, embodiment is identical with Fig. 3 A, so do not give unnecessary details at this.
Fig. 4 A illustrates and is the serial peripheral interface receiving end block diagram according to one embodiment of the invention, please refer to Fig. 4 A, receiving end comprises serial transmission demoder 400 and flash memory 470 in this embodiment, and serial transmission demoder 400 comprises serial line interface demoder 410, present address register 420, address decoder 430, data register 440 and order register 450.
In the present embodiment, present address register 420 is in order to the storage present address, and serial line interface demoder 410 is coupled to serial line interface, in order to the serial signal on the decoding serial line interface, to obtain access instruction and address information; The access instruction that serial transmission demoder 400 and foundation obtain, judge and obtain the access address pattern, this access instruction belongs to a serial command collection that comprises multiple instruction form, these instruction forms can be used one of them of a plurality of transfer addresses pattern, and each transfer address pattern is to use different positions long (for example using 4,8,12,16 and 20) to come transfer address information.
In addition, order register 450 is used for depositing access instruction, and data register 440 is in order to store the data that serial line interface transmitted.Address decoder 430 is coupled between serial line interface demoder 410 and the present address register 420, according to an access address pattern, address information and the present address in the pattern of a plurality of transfer addresses, produce the access address, and upgrade the stored present address of present address register 420 with this access address.
Serial transmission demoder 400 exportable these access addresses are to every peripherals, be to be example in the present embodiment with flash memory 470, right non-in order to limit the present invention, these peripherals also can for example be DRAM (Dynamic Random Access Memory) and non-programmable, disposable programmable, or the Nonvolatile memory devices that can repeatedly programme or the like, or other peripheral controllers that need the merchandiser chip system to link up, as universal input/output controller (GPIO), parallel interface controller (PARALLEL PORT Controller) or the like, those skilled in the art are when adhering to spirit of the present invention and class is pushed into other peripherals.Serial line interface in the present embodiment is compatible in serial peripheral interface (SPI) standard.
Fig. 4 B illustrates and is the serial peripheral interface receiving end block diagram according to another preferred embodiment of the present invention.See also Fig. 4 B, the difference of Fig. 4 B and Fig. 4 A is that serial transmission demoder 400 has also comprised and can changes length decoder 460 (for example for huffman decoder) to receive access instruction, the long access instruction of coordination that has not that can change that 460 pairs of length decoders are received from the serial line interface instructs after the decoding, is just judged by serial transmission demoder 400 and obtains the access address pattern.Wherein, can change length decoder 460 and be according to serial command and concentrate different instruction forms to use frequency of utilization statistical value of each instruction of different transfer address patterns, come the access instruction decoding, to have a little position of healing long for high person promptly to use frequency to heal.In the present embodiment, all the other members except that can changing length decoder 460, embodiment is identical with Fig. 4 A, so do not give unnecessary details at this.
Fig. 5 A illustrates and is the transfer approach process flow diagram according to the serial transmission of one embodiment of the invention, this method is according to the access address, access instruction is transmitted on the serial line interface, see also Fig. 5 A, at first, relatively suitable access address pattern is selected in present address and access address from the pattern of a plurality of transfer addresses, and produces address information (step S501); According to the selected access address of step S501, upgrade present address, and the present address after will upgrading is deposited (step S502) again; Then according to access address model selection access instruction (step S503), encoding in the position that access instruction is had different length, for example is huffman coding (step S504); At last, access instruction and address information are transmitted on the serial line interface in the serial transmission mode.
Among the step S503, access instruction is to belong to a serial command collection, this serial command collection comprises multiple instruction form, in these instruction forms at least one can be used in above-mentioned a plurality of transfer addresses pattern, and each transfer address pattern is used, and different positions is long comes transfer address information.
Among the step S504, the principle that access instruction is carried out order number is to concentrate different instruction form (for example be reading command or write instruction) at serial command, utilize the frequency statistics value according to each instruction in the different transfer address patterns, come coded access instruction, just frequency of utilization heals high person with the position long codes that heals little.In addition, this step is by access instruction being had different position long codes, required position during with further minimizing transmission.If there is not this step, the present invention can be by the purpose of selecting different transfer address pattern (uses different positions long) to come transfer address information, reach to reduce long and reduction transmission time of transmission position.Serial line interface among the step S505 is compatible in serial peripheral interface (serialperipheral interface, SPI) standard.
Fig. 5 B illustrates and is the method for reseptance process flow diagram according to the serial transmission of one embodiment of the invention, this method is for to receive access instruction from serial line interface, to obtain the access address, see also Fig. 5 B, at first, serial signal on reception and the decoding serial line interface is to obtain access instruction and address information (step S507); Instruct decoding to having the long access instruction of coordination not again, for example carry out Hofmann decoding (step S508); Then according to the access instruction that is obtained, judge and obtain access address pattern (step S509); At last,, produce the access address, and upgrade present address (step S511) with the access address according to access address pattern, address information and present address.
In the present embodiment, step S508 concentrates different instruction forms to use frequency of utilization statistical value of each instruction of different transfer address patterns according to serial command, and decoding has the not long access instruction of coordination, and frequency of utilization heals, and to have a little position of healing long for high person.If the access instruction that step S507 received not is through the access instruction of coordination long codes not, but the access instruction of fixed field length, then certainly need be through the instruction decoding action of this step.
Fig. 6 is a usage ratio statistical graph of concentrating instructions according to the serial command of one embodiment of the invention, and each instruction in the instruction hurdle has different transfer address patterns for the commonly used command in the general transport process.With present serial transmission interface (SPI), transmit serial command owing to use fixing command field length (8) and fixing address field length (24), therefore transmit a reading command or one when writing instruction no matter be, the required cycle all is 32, sees also the field of cycle (1).Yet, in the present embodiment, be that present address and access address are compared, again according to comparative result from these different transfer address patterns, select the access address pattern.For example when present address and access address are 7, only need just can reach the access purpose to read the access address pattern of 8 side-play amounts in the mode of full blast.Therefore, when using the transfer address pattern read 8 side-play amounts, the required cycle is that command field length (8) and address field length (8) sum are 16, compared with original fixing field length mode (32), has saved the cycle of half.In like manner, remaining transfer address pattern also can both reduce required transmission position (seeing also the field of cycle (2)) compared with prior art.In the present embodiment, suppose to send altogether 10000 serial command, when using the serial command of original field length of fixing, the required cycle of move instruction is 294440.If when using adjustably location field length mode, then the required cycle of move instruction is 162592, by statistics as can be known, in the present embodiment, required period ratio prior art has significantly reduced by 44.7%.
Serial command is concentrated and has been comprised different instruction form (for example read or write), and comprised in the different instruction forms that different transfer address patterns (for example reads next position side-play amount or reads 4,8,12,16,20 side-play amounts), we take statistics at the frequency of utilization of each instruction, and after being sorted, draw frequency of utilization the highest be to read the instruction of 8 side-play amounts, what frequency of utilization was time high is to read 16 side-play amounts instructions, use a kind of coding method (for example being huffman coding) of variable-length to encode in the present embodiment, institute's basis principle is the frequency of utilization high instruction of healing, and the position behind its coding is long littler.For instance, 8 side-play amounts that read that frequency of utilization is the highest are instructed, its huffman coding position is long to be minimum 2, the cycle of reading 8 side-play amount instructions is command field length (2) and address field length (8) sum, therefore use variable length code to make that the required position of transfer instruction is long and drop to 10 from 32, in like manner, remaining transfer address pattern also can both reduce required transmission position (seeing also the field of cycle (3)) greatly compared with prior art.
At this is that example is added up to send 10000 serial command equally, use original fixing field length serial command method, command field and address field have accounted for 294440 cycles, if the present invention uses location field and command field length mode adjustably, then the required cycle of command field and address field is 132945, and the period ratio prior art required as can be known by statistics more significantly reduced by 54.8%.
It should be noted that the serial command statistical graph of Fig. 6, only is an embodiment, mainly is to be used for illustrating obvious effect of the present invention, but non-in order to limit the present invention, instruction form that serial command is concentrated or various transfer addresses pattern are when can optionally adjusting.
In sum, the method of serial transmission controller provided by the present invention and serial transmission, because it selects a preferable transfer address pattern according to the access address, again because different transfer addresses pattern uses different positions to come transfer address information, so can reduce position required when transmitting, and shorten the time that transmission spends.In addition, the method of serial transmission controller provided by the present invention and serial transmission thereof more can be used the fix command field of serial transmission interface instead the long mode of variable bit and be encoded, all orders are sorted according to frequency of utilization, the order of normal more use, give the coding of less bits, so can further reduce the overall transfer time, length is heavily sent in minimizing needed order when the address is discontinuous, improves transmission usefulness.
The method of serial transmission demoder provided by the present invention and serial transmission, because it is according to the access instruction that is received, judge and obtain the access address pattern, this access address pattern is to select from the pattern of a plurality of transfer addresses, according to access address pattern, address information and present address, produce the access address again, different positions is long comes transfer address information because different transfer addresses patterns is used again, so can reduce position required when transmitting, and shorten the time that transmission spends.In addition, the method of serial transmission demoder provided by the present invention and serial transmission thereof more can receive through the access instruction of coordination long codes not, this kind coded system is that all orders are sorted according to frequency of utilization, the order of normal more use, give few coding more, thereby can further reduce the overall transfer time, have the effect that improves transmission usefulness.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is when being as the criterion with defining of accompanying Claim scope.
Claims (19)
1. a serial transmission controller is transmitted in a corresponding access instruction on one serial line interface in order to foundation one access address, and this serial transmission controller comprises:
One present address register is in order to store a present address;
One address scrambler is coupled to this present address register, in order to relatively this present address and this access address, and selects an access address pattern from the pattern of a plurality of transfer addresses, and produces a corresponding address information; And
One serial line interface scrambler is coupled to this address scrambler, in order to this access instruction and this address information are transmitted on this serial line interface in the serial transmission mode,
Wherein, this serial transmission controller is according to this access address pattern, in a serial instruction set, select this access instruction, this serial command collection comprises a plurality of instruction forms, one of them can be used in those transfer address patterns at least in those instruction forms, and aforementioned each transfer address pattern is used different long this address informations that transmits in position.
2. serial transmission controller as claimed in claim 1, comprise that more one can change the length coding device, after this can change the length coding device this access instruction is had the long order number of coordination, see through this serial line interface scrambler again, this access instruction behind the coding is transmitted on this serial line interface in the serial transmission mode.
3. serial transmission controller as claimed in claim 2, wherein, this can change the length coding device is the frequency of utilization statistical value that foundation is used those access instructions of different transfer address patterns, and frequency of utilization heals high person to have long this access instruction of encoding in position of healing little.
4. serial transmission controller as claimed in claim 1, wherein, this serial line interface is compatible to a serial peripheral interface standard.
5. serial transmission controller as claimed in claim 1 more comprises:
One order register is in order to deposit this access instruction; And
One data register is in order to deposit an access data of corresponding this access address.
6. serial transmission controller as claimed in claim 1, wherein, after this address scrambler was chosen this access address pattern, this serial transmission controller more was stored to this access address this present address register, to upgrade this present address.
7. the method for a serial transmission is transmitted in a corresponding access instruction on one serial line interface in order to foundation one access address, and this method comprises the following steps:
Compare a present address and this access address, and from the pattern of a plurality of transfer addresses, select an access address pattern, and produce a corresponding address information;
According to this access address pattern, in a serial instruction set, select this access instruction, this serial command collection comprises a plurality of instruction forms, one of them can be used in those transfer address patterns at least in those instruction forms, and aforementioned each transfer address pattern is used different long this address informations that transmits in position; And
This access instruction and this address information are transmitted on this serial line interface in the serial transmission mode.
8. the method for serial transmission as claimed in claim 7 more comprises the following steps:
Deposit this present address; And
After selecting this access address pattern, more upgrade this present address with this access address.
9. the method for serial transmission as claimed in claim 7 more comprises the following steps:
After this access instruction had the long order number of coordination, this access instruction behind the coding is transmitted on this serial line interface in the serial transmission mode.
10. the method for serial transmission as claimed in claim 9, wherein, according to the frequency of utilization statistical value of those access instructions that use different transfer address patterns, frequency of utilization heals high person to have long this access instruction of encoding in position of healing little.
11. the method for serial transmission as claimed in claim 9 wherein, has the long order number of coordination not for carrying out a huffman coding.
12. a serial transmission demoder, in order to receive an access instruction from a serial line interface, to obtain a corresponding access address, this serial transmission demoder comprises:
One serial line interface demoder is coupled to this serial line interface, in order to the serial signal on this serial line interface of decoding, to obtain this access instruction and an address information;
One present address register is in order to store a present address; And
One address decoder, be coupled to this serial line interface demoder and this present address register, in order to according to an access address pattern, this address information and this present address in a plurality of transfer addresses patterns, produce this access address after, and upgrade this present address with this access address
Wherein, this serial transmission demoder is according to this access instruction, to judge and to obtain this access address pattern, this access instruction belongs to a serial instruction set, this serial command collection comprises a plurality of instruction forms, one of them can be used in those transfer address patterns at least in those instruction forms, and aforementioned each transfer address pattern is used different long this address informations that transmits in position.
13. serial transmission demoder as claimed in claim 12, comprise that more one can change length decoder, after this long access instruction of coordination do not decode to having of being received on this serial line interface, and then judge and obtain this access address pattern by this serial transmission demoder.
14. serial transmission demoder as claimed in claim 13, wherein, this can change length decoder is the frequency of utilization statistical value that foundation is used those access instructions of different transfer address patterns, this access instruction of decoding.
15. serial transmission demoder as claimed in claim 12, wherein, this serial line interface is compatible to a serial peripheral interface standard.
16. serial transmission demoder as claimed in claim 12 more comprises:
One order register is in order to deposit this access instruction; And
One data register is in order to deposit the corresponding access data in this access address.
17. the method for a serial transmission, in order to receive an access instruction from a serial line interface, to obtain a corresponding access address, this method comprises the following steps:
Serial signal on reception and this serial line interface of decoding is to obtain this access instruction and an address information;
According to this access instruction, to obtain the access address pattern in the pattern of a plurality of transfer addresses, this access instruction is to belong to a serial instruction set, this serial command collection comprises a plurality of instruction forms, one of them can be used in those transfer address patterns at least in those instruction forms, and aforementioned each transfer address pattern is used different long this address informations that transmits in position; And
According to this access address pattern, this address information and a present address, produce this access address after, and upgrade this present address with this access address.
18. the method for serial transmission as claimed in claim 17 more comprises the following steps:
Decoding receives from this serial line interface has not this long access instruction of coordination, and then obtains this access address pattern.
19. the method for serial transmission as claimed in claim 18 wherein more comprises the frequency of utilization statistical value according to the various access instructions that use different transfer address patterns, decodes to having not this long access instruction of coordination.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101674312A CN100573491C (en) | 2006-12-15 | 2006-12-15 | Serial transmission controller and serial transmission demoder and serial transmission method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101674312A CN100573491C (en) | 2006-12-15 | 2006-12-15 | Serial transmission controller and serial transmission demoder and serial transmission method thereof |
Publications (2)
| Publication Number | Publication Date |
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| CN101201805A true CN101201805A (en) | 2008-06-18 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102231141A (en) * | 2011-06-21 | 2011-11-02 | 中兴通讯股份有限公司 | Method and system for reading and writing data |
| CN102411490A (en) * | 2011-08-09 | 2012-04-11 | 清华大学 | Instruction set optimization method for dynamically reconfigurable processors |
| CN109634883A (en) * | 2017-10-05 | 2019-04-16 | 印芯科技股份有限公司 | Master-slave system, instruction executing method and data access method |
| CN112291101A (en) * | 2020-11-06 | 2021-01-29 | 珠海格力电器股份有限公司 | Communication node and communication framing optimization method of upper computer to lower computer |
| CN115586923A (en) * | 2022-11-29 | 2023-01-10 | 摩尔线程智能科技(北京)有限责任公司 | Opcode encoding method, apparatus and computer readable medium for instruction set |
-
2006
- 2006-12-15 CN CNB2006101674312A patent/CN100573491C/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102231141A (en) * | 2011-06-21 | 2011-11-02 | 中兴通讯股份有限公司 | Method and system for reading and writing data |
| CN102231141B (en) * | 2011-06-21 | 2017-04-05 | 深圳市中兴微电子技术有限公司 | A kind of data read-write method and system |
| CN102411490A (en) * | 2011-08-09 | 2012-04-11 | 清华大学 | Instruction set optimization method for dynamically reconfigurable processors |
| CN102411490B (en) * | 2011-08-09 | 2014-04-16 | 清华大学 | Instruction set optimization method for dynamically reconfigurable processors |
| CN109634883A (en) * | 2017-10-05 | 2019-04-16 | 印芯科技股份有限公司 | Master-slave system, instruction executing method and data access method |
| CN112291101A (en) * | 2020-11-06 | 2021-01-29 | 珠海格力电器股份有限公司 | Communication node and communication framing optimization method of upper computer to lower computer |
| CN115586923A (en) * | 2022-11-29 | 2023-01-10 | 摩尔线程智能科技(北京)有限责任公司 | Opcode encoding method, apparatus and computer readable medium for instruction set |
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| CN100573491C (en) | 2009-12-23 |
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