CN107452701A - 用于改进接合的接合焊盘结构 - Google Patents

用于改进接合的接合焊盘结构 Download PDF

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Publication number
CN107452701A
CN107452701A CN201710255926.9A CN201710255926A CN107452701A CN 107452701 A CN107452701 A CN 107452701A CN 201710255926 A CN201710255926 A CN 201710255926A CN 107452701 A CN107452701 A CN 107452701A
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China
Prior art keywords
hole
layer
bond pad
narrow
long
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CN201710255926.9A
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Inventor
陈嘉展
李岳川
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of CN107452701A publication Critical patent/CN107452701A/zh
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Abstract

本发明的一些实施例涉及集成电路(IC)的一种接合焊盘结构。在一个实施例中，接合结构包括接合焊盘和设置在接合焊盘下面的中间金属层。中间金属层具有第一面和第二面。第一通孔层与中间金属层的第一面接触。第一通孔层具有第一通孔图案。接合结构还包括与中间金属层的第二面接触的第二通孔层。第二通孔层具有不同于第一通孔图案的第二通孔图案。本发明实施例涉及用于改进接合的接合焊盘结构。

Description

用于改进接合的接合焊盘结构
技术领域
本发明实施例涉及用于改进接合的接合焊盘结构。
背景技术
许多现代电子器件包括使用图像传感器的光学成像器件(例如，数码相机)。图像传感器可以设置在包括光电探测器和逻辑支撑件阵列的集成电路(IC)上。对应于单独的像素的光电探测器可以测量对应于光学图像的入射辐射(例如，光)，并且逻辑支撑件有助于读取来自IC的数字数据。来自IC的数字数据输出对应于光学图像的数字化编码表示。
标准的IC制造工艺可以生产具有基于或至少部分基于IC功能的诸如厚度的尺寸的层的IC。例如，IC包括诸如后段制程(BEOL)金属层的堆叠的电互连结构。在一些实施例中，诸如使用前照式(FSI)技术，金属层具有位于单独的光电探测器上方的开口(孔)。在背照式(BSI)技术中，不是具有穿过BEOL金属层中的开口的光，而是从背侧(即，与BEOL金属层的堆叠相对的面)照射传感器。对BSI的光学限制类似于FSI，除了在BSI中，光电探测器通常设置在更靠近微透镜(设置在衬底的背侧上)之外。在BSI中，削薄衬底以优化能够到达光电探测器的光的数量；而在FSI中，可减小BEOL金属层的厚度。因此，基于IC的期望的功能，可减小诸如互连结构的金属层和/或衬底的特定层的厚度。
发明内容
根据本发明的一个实施例，提供了一种集成电路(IC)的接合结构，包括：接合焊盘；中间金属层，具有第一面和第二面，其中，所述中间金属层设置在所述接合焊盘下面；第一通孔层，与所述中间金属层的所述第一面接触，其中，所述第一通孔层具有第一通孔图案；以及第二通孔层，与所述中间金属层的所述第二面接触，其中，所述第二通孔层具有第二通孔图案，以及其中，所述第一通孔图案不同于所述第二通孔图案。
根据本发明的另一实施例，还提供了一种互补金属氧化物半导体图像传感器(CIS)，包括：图像传感器衬底，具有第一表面和与所述第一表面相对的第二表面，其中，光电探测器的阵列布置在所述图像传感器衬底中、所述第一表面和所述第二表面之间；图像传感器互连结构，邻接所述第一表面；以及接合焊盘结构，与所述光电探测器的阵列横向隔开，并且所述接合焊盘结构包括：接合焊盘层，具有底面；单个通孔层，与所述接合焊盘层的所述底面接触；中间金属层，设置在所述单个通孔层下面；以及通孔阵列层，设置在所述中间金属层下面并且与所述图像传感器互连结构接触，其中，所述通孔阵列层具有多个通孔。
根据本发明的又一实施例，还提供了一种用于形成接合焊盘结构的方法，所述方法包括：接收衬底；在具有最上部金属互连层的所述衬底上方形成互连结构；在所述金属互连层上方形成第一介电层；图案化和蚀刻所述第一介电层以形成通孔开口的阵列；用导电材料填充所述通孔开口的阵列以形成第一通孔层；在所述第一通孔层上方形成中间金属层；在所述中间金属层上方形成第二介电层；图案化和蚀刻所述第二介电层以在位于所述第一通孔层中的所述通孔开口的阵列上方形成单个通孔开口；用所述导电材料填充所述单个通孔开口以形成第二通孔层；以及在所述第二通孔层上方形成接合焊盘，其中，所述接合焊盘的底面与所述第二通孔层的顶面接触。
附图说明
当结合附图进行阅读时，从以下详细描述可最佳地理解本发明的各个方面。应该注意，根据工业中的标准实践，各个部件未按比例绘制。实际上，为了清楚的讨论，各种部件的尺寸可以被任意增大或减小。
图1示出与具有改进的接合焊盘结构的集成电路(IC)相关联的器件的实施例的透视图。
图2A示出具有改进的接合焊盘结构的IC的实施例的截面图。
图2B示出在改进的接合焊盘结构中的通孔层的实施例的顶视图。
图2C示出在改进的接合焊盘结构中的通孔层的另一实施例的顶视图。
图3A示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图3B示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图4A示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图4B示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图5A示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图5B示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图6A示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图6B示出改进的接合焊盘结构的通孔层的另一实施例的顶视图。
图6C示出在改进的接合焊盘结构中的通孔层的另一实施例的顶视图。
图6D示出在改进的接合焊盘结构中的通孔层的另一实施例的顶视图。
图6E示出在改进的接合焊盘结构中的通孔层的另一实施例的顶视图。
图7示出具有改进的接合焊盘结构的IC的另一实施例的截面图。
图8示出以具有改进的接合焊盘结构的背照式(BSI)传感器的形式的集成电路(IC)的实施例的截面图。
图9示出用于制造具有改进的接合焊盘结构的IC的方法的一些实施例的流程图。
图10至图22示出一系列截面图，截面图共同地示出与图9的方法一致的示例性制造流程。
具体实施方式
以下公开内容提供了许多用于实现所提供主题的不同特征的不同实施例或实例。下面描述了组件和布置的具体实例以简化本发明。当然，这些仅仅是实例，而不旨在限制本发明。例如，在以下描述中，在第二部件上方或者上形成第一部件可以包括第一部件和第二部件以直接接触的方式形成的实施例，并且也可以包括在第一部件和第二部件之间可以形成额外的部件，从而使得第一部件和第二部件可以不直接接触的实施例。此外，本发明可在各个实例中重复参考标号和/或字符。该重复是为了简单和清楚的目的，并且其本身不指示所讨论的各个实施例和/或配置之间的关系。
而且，为了便于描述，在此可以使用诸如“在…下方”、“在…下面”、“下部”、“在…之上”、“上部”等空间相对术语以描述如图所示的一个元件或部件与另一个(或另一些)元件或部件的关系。除了图中所示的方位外，空间相对术语旨在包括器件在使用或操作中的不同方位。装置可以以其他方式定向(旋转90度或在其他方位上)，并且在此使用的空间相对描述符可以同样地作出相应的解释。
图1示出器件100的实例，这里集成电路102通过环氧树脂、胶或一些其他粘合剂104物理地粘接至印刷电路板110。集成电路102具有若干IC接合焊盘106，其通过若干引线接合112电连接至对应的位于印刷电路板110上的若干连接焊盘108。如上文中讨论的，IC102可包括衬底和设置在衬底上方的互连结构，其中可以削薄衬底和互连结构的一个或全部以最优化IC 102，从而用于特定功能。然而，通过削薄这些层的一个或全部，当引线接合112按压至IC接合焊盘106时，传统的IC更易受到产生的应力的影响。应力可导致在形成中的缺陷，诸如翘曲、弯曲、破裂、IC接合焊盘106或IC接合焊盘106的下面的层的剥离，这将不利地影响IC 102的运行。这些缺陷的结果通常是不可用的IC，从而导致在制造工艺期间浪费资源。
可以理解，尽管图1示出IC 102通过若干引线接合112电连接至印刷电路板110的实例，在其他实施例中，集成电路(以从处理的半导体晶圆切割的管芯的形式)可以是接合至引线框架的引线并且然后被环氧树脂或陶瓷外壳包装。仍在其他实施例中，集成电路和/或管芯可以是引线接合至另一集成电路或管芯以形成3D IC，而不是引线接合至印刷电路板110。此外，尽管图1示出球型引线接合，但是也可以使用诸如焊料凸块和楔形接合件等的其他接合类型。
本发明涉及改进的接合焊盘结构，其包括减少放在接合焊盘结构下方的下面的层上的应力的多个通孔，并且因此改进了接合焊盘结构和IC上的它们的下表面之间的接合。改进的接合焊盘结构可抵抗如从IC剥离金属接合焊盘的缺陷并且有助于提高产量和器件的可靠性。此外，改进的接合焊盘结构补偿削薄的下面的层，使得具有改进的接合焊盘结构的IC更适合于诸如互补金属氧化物半导体(CMOS)图像传感器的图像传感器。
图2A示出根据本发明的一些实施例的集成电路(IC)200的一部分的实例。与传感器一起使用的诸如FSI IC或BSI IC的IC可具有未在此示出的额外的组件(诸如二极管、光电探测器、孔等)。这些组件可以用于具有改进的接合焊盘结构的其他实施例中。IC 200是广义的实例。IC 200包括具有位于其上的互连结构204的衬底202。接合焊盘结构206可对应于例如图1中的接合焊盘106，位于互连结构上方。具有球根状的足部区域112a的引线接合112可接合至接合焊盘结构206的上表面。
如上文中所讨论的，可削薄衬底202或互连结构204以最优化IC 200，从而用于特定目的。互连结构204可包括以交替的方式彼此堆叠的多个金属层和绝缘层。例如，互连结构204包括第一层间介电(ILD)层208、第一金属层210、第二ILD层212、第二金属层214、第三ILD层216和第三金属层218。为了简明，在这个实例中，第三金属层218示出为互连结构204中的最上部金属层，但是通常可以存在任何数量的金属层和ILD层。第一ILD层208、第二ILD层212和第三ILD层216可以由诸如低介电材料的介电材料制成。第一金属层210、第二金属层214和第三金属层218可由铜、铝或铝铜化合物制成。由于衬底202变薄和/或金属层(210、214、218)变薄，衬底202和/或金属层可以是微米或更小的数量级并且可以被相对脆弱的ILD层(208、212和216)围绕，因此，如果引线接合112直接接合至金属互连结构204的上表面，金属互连结构204和/或衬底202将不能承受引线接合112施加的应力。
因此，接合焊盘结构206位于互连结构204上方并且配置为可靠地接收引线接合112并且以保护下面的衬底202和金属互连结构204的方式分布引线接合应力。接合焊盘结构206包括上部接合焊盘层234，其具有与引线接合112的足部区域112a直接接触的最上表面206a。第一通孔层228和第二通孔层232位于上部接合焊盘层234下面并且为上部接合焊盘层234提供支撑。中间金属层230位于第二通孔层232下面并且将第二通孔层232与第一通孔层228分离。中间金属层230结合第一通孔层228和第二通孔层232可帮助分布通过引线接合112施加的向下的力以限制对衬底202和/或互连结构204的损坏。特别地，第一通孔层228和第二通孔层232提供了结构刚性，该结构刚性不是由周围的ILD层220提供。为了提供这个结构刚性，第一通孔层228和第二通孔层232由诸如铜或铜铝合金的金属制成，并且通常比互连结构204的最上部金属层218更厚。当引线接合112向下压至上部接合焊盘层234时，位于上部接合焊盘层234下面的第一通孔层228和第二通孔层232基本垂直对准抵消了垂直的力。
第一通孔层228具有限定第一通孔层228上的至少一个通孔的布局的第一通孔图案242。同样地，第二通孔层232具有限定第二通孔层232上的至少一个通孔的布局的第二通孔图案242。第一通孔层228和第二通孔层232通常垂直地对准以提供从上部接合焊盘层234至下面的互连结构204的电连接。第一通孔图案242和第二通孔图案240通常彼此不同。下文中参照图2B至图2C、图3A至图3B、图4A至图4B、图5A至图5B和图6A至图6E更详细地描述特定通孔图案的实施例。
图2B示出具有第二通孔图案240的第二通孔层232的一个实例。在一个实施例中，第二通孔图案240可包括被介电材料220环绕的通孔部分244。介电材料220可以由诸如二氧化硅或包括SiNx、SiON、磷硅酸盐玻璃(PSG)、硼磷硅酸盐玻璃(BPSG)等的低к介电材料的介电材料制成。通孔部分244可以是由铜、铜合金或其他导电材料的金属层制成的单个通孔。尽管示出的通孔部分244是具有长度相等的边缘的正方形，在其他实施例中，通孔部分244可以是圆形、矩形、椭圆形或具有其他形状。
通孔部分244是环绕上部接合焊盘层234的区域的大部分的单个通孔。例如，通孔部分244可具有覆盖组成上部接合焊盘层234的导电材料的区域的50％或更多的区域。在另一实例中，通孔部分244的长度可以比上部接合焊盘层234的长度的一半更大。同样地，通孔部分244的宽度可以比上部接合焊盘层234的宽度的一半更大。通孔部分244可具有中心轴240c，中心轴240c与足部区域(112C，图2A)的中心轴同轴并且可位于上部接合焊盘层234下面的中心。因为通孔部分244由诸如金属的导电材料制成，第二通孔图案240提供了屏蔽下面的层免受引线接合的力的强度。因此，第二通孔图案240可在上部接合焊盘层234下面的IC的中心区处提供支撑。在一些实施例中，上部接合焊盘层234是连续的材料片，在其表面没有任何开口并且其具有外边界234p。上部接合焊盘的外边界234p可围绕第二通孔图案的外边界240p并且比第二通孔图案的外边界240p更大。
图2C示出第一通孔图案242的一个实例，第一通孔图案242具有位于通孔的多组中的多个通孔，诸如介电材料220中的第一组通孔236和第二组通孔238。与第二组通孔238中的通孔相比，第一组通孔236具有不同的通孔布置。假设多个通孔的通孔是狭长的。狭长通孔具有较长的边缘和较短的边缘。第一组通孔236可包括在第一方向上彼此平行延伸的多个通孔。第二组通孔238可包括在垂直于第一方向的第二方向上彼此平行延伸的多个通孔。这个示例性的第二通孔图案242仅仅是通孔的布置的一个实施例。在一些实施例中，中间金属层230、234是连续的材料片，在其表面没有任何开口并且其具有外边界230p。外边界230p可围绕第二通孔图案的外边界242p并且比其更大。在一些实施例中，上部接合焊盘层234的外边界234p和中间金属层230的外边界230p彼此相等且彼此对准。如下文中将讨论的，可使用任何数量的通孔图案。
因此，接合焊盘结构206减少了在诸如互连结构204和衬底202的下面的层上的应力的量。特别地，第一通孔层228、中间金属层230和第二通孔层232基于，至少部分基于第一和第二通孔图案分布IC 200上方的力。在一个实施例中，接合焊盘结构206分布力的效率基于，至少部分基于具有不同通孔图案的第一通孔层228和第二通孔层232。
减少下面的层上的应力减少了在形成中的缺陷导致的IC 200的易损性并且因此提高了IC 200上的接合焊盘结构206和下表面之间的接合。因此，改进的接合焊盘结构206抵抗了缺陷并且提高了IC 200的产量和器件的可靠性。此外，接合焊盘结构206更适合于用于IC的应用，其可利用诸如CMOS图像传感器(CIS)的削薄的层更有效地操作。
可以理解，在其他实施例中，图2A至图2C中示出的第一通孔图案242和第二通孔图案240可以彼此垂直地换位或“翻转”。因此，图2A至图2C示出由设置在对应于单个通孔部分的第二通孔图案240下面的一系列狭长通孔制成的第一通孔图案242，在其他实施例中，第二通孔图案240和其狭长通孔可以布置在第一通孔图案242和其狭长的通孔部分244下面。此外，术语“第一”和“第二”和其他这样的术语仅是通用的术语，所以在其他实施例中，第一通孔图案可以可选地对应于单个通孔部分并且第二通孔图案可对应于一系列狭长通孔。现在描述第一通孔图案和第二通孔图案的其他未限制的实例，并且可以理解，这些图案可以表露在关于图2A的接合焊盘结构的多个布置中。
图3A示出在具有位于介电材料306中的多个导电狭长通孔308的改进的接合焊盘结构中的通孔层300的实施例的顶视图。为了简明，仅标注一个狭长通孔308。狭长通孔308的每个都具有较长的边缘302和较短的边缘304。狭长通孔308彼此对准，从而使得狭长通孔的较长的边缘302彼此平行延伸。狭长通孔308可以在诸如平行于通孔层300的较短的边缘的一个方向上延伸。如图3B所示，通孔层300上的狭长通孔可以彼此对准，从而使得狭长通孔的较长的边缘302与通孔层300的较长的边缘平行地延伸。当图3A和图3B中的狭长通孔308示出平行于通孔层300的边缘时，狭长通孔也可以布置在相对于通孔层300的边缘的一角度处，诸如在对角线处。
在一个实施例中，较长的边缘302可具有比上面的接合焊盘(诸如图2A中的上部接合焊盘层234)的长度的一半更长的长度。狭长通孔的较长的边缘302的长度、较短的边缘304的宽度和狭长通孔之间的间隔可以限定为留下介电材料306的在狭长通孔308周围的边界。狭长通孔308可彼此均等地间隔开或具有变化的间隔。如上文中结合图2A的描述，多个通孔层可用在接合焊盘结构中。因此，第一通孔图案中的通孔可相对于第二通孔图案中的通孔布置。例如，假设第一通孔图案对应于图2B的单个通孔并且第二通孔图案对应于图3A的狭长通孔。单个通孔可以在第一方向(例如，横向)上延伸狭长通孔的长度并且在第二方向(例如，横向)上延伸狭长通孔的宽度。
图4A示出具有通孔图案的通孔层400，通孔图案包括由诸如上文中关于图3A讨论的诸如通孔的狭长通孔和放置在狭长通孔之间的多个水平通孔402a-1组成的通孔结构406。例如，水平通孔402a-1具有一组相对的边缘404。在一个实施例中，放置水平通孔402a-1，从而使得相对的边缘404与狭长通孔的较短的边缘平行。水平通孔402a-1以通常关于狭长通孔呈对角线的方式整体地延伸。
当在顶视图中示出的水平通孔从通孔层400的左上角延伸至右下角时，水平通孔402a-1可从通孔层400的右上角延伸至顶视图的左下角。在一个实施例中，对角线布置的水平通孔402a-1的方向可基于狭长通孔的方向。在图4B中，可关于图4A的狭长通孔正交地布置狭长通孔。可从通孔层450的右上角至顶视图的左下角布置图4B的通孔层450的水平通孔402a-1。在另一实施例中，通孔层450的水平通孔402a-1从通孔层400的右上角延伸至左下角。
图5A示出在改进的接合焊盘结构中的通孔层500的实施例的顶视图。通孔层500具有多组狭长通孔。例如，可放置狭长通孔510的第一组502，从而使得狭长通孔的较长的边缘在第一方向上延伸。第二组狭长通孔504可布置在不同的方向上。例如，第二组狭长通孔504可布置在与第一方向正交的第二方向上。
通孔层500上的第三组狭长通孔以与第二组狭长通孔504类似的方式布置，以及第四组狭长通孔508以与第一组502类似的方式布置。如图5A所示，第一组502放置在通孔层500的左上角中，第二组504放置在右上角中，第三组506放置在左下角中，以及第四组508放置在右下角中。这是狭长的通孔组的一个示例性布置。通孔层500可具有示出为不同的图案或以不同的图案布置的更多或更少组的狭长通孔。
图5B示出在改进的接合焊盘结构中的通孔层550的实施例的顶视图。通孔层550具有以与上文中关于图5A描述的类似的方式布置的四组狭长通孔。四组狭长通孔进一步包括水平通孔，类似于关于图4A描述的水平通孔402a-1的水平通孔。因此，在具有多组的通孔层上的一组或多组可具有设置在狭长通孔之间的水平通孔。例如，如所示出的狭长通孔的每组可具有布置在狭长通孔之间的一组水平通孔。可选地，四组通孔的仅两组可具有水平通孔。
图6A示出在改进的接合焊盘结构中的通孔层600的另一实施例的顶视图。通孔层600具有包括重叠的狭长通孔组的通孔图案。通孔的第一组602具有平行于通孔层600的第一侧604的长边缘。通孔的第二组606具有平行于第二侧608的长边缘，第二侧608与第一侧604相邻。设置第一组狭长通孔602和第二组606以与创建类似于栅格的通孔图案重叠。在这个栅格中，通孔布置在行和列的交叉点处并且设置在栅格中的每个和每一个交叉点处(例如，如图6B所示)。然而，在其他实施例中，第一组602和第二组606可定位在相对于彼此的小于或大于90度角度处，和/或没有通孔存在的栅格中的一些交叉点处。
图6B示出在改进的接合焊盘结构中的通孔层610的另一实施例的顶视图。尽管上文中已经讨论单个通孔和狭长通孔，通孔可具有任何尺寸和形状。例如，通孔层610可具有通孔阵列。当通孔阵列中的通孔示出为正方形时，通孔阵列中的通孔可以是圆形、三角形、椭圆形、矩形等。这里在栅格图案中示出，通孔阵列以诸如螺旋形或圆形图案的不同的图案布置。例如，图6C示出在改进的接合焊盘结构中的通孔层620(其中的通孔是同心正方形)的实施例的顶视图。图6D示出在改进的接合焊盘结构中的通孔层630(其中的通孔是同心圆形)的实施例的顶视图。通孔可具有其他不规则的形状。例如，图6E示出在改进的接合焊盘结构中的通孔层640(具有加号形状的同心通孔)的实施例的顶视图。
图2B、图2C、图3A、图3B、图4A、图4B、图5A、图5B、图6A、图6B、图6C、图6D和图6E是具有以许多不同图案布置的不同类型的通孔(例如，单个通孔、狭长通孔、通孔阵列)的通孔层的实例。如图2A所描述的，这些通孔层是示例性的并且不是详尽的在具有改进的接合焊盘结构的IC的实施例中采用的不同类型的通孔、通孔图案或通孔层。
图7示出以具有改进的接合焊盘结构的FSI图像传感器件的形式的IC700的截面图。FSI图像传感器件700具有诸如上文中关于图2A描述的衬底202、互连结构204和改进的接合焊盘结构206。接合焊盘结构206具有以上文中关于图2A描述的类似的方式运行的第一通孔层228、中间金属层230、第二通孔层232和上部接合焊盘层234。
衬底202具有配置为接收照射的第一(例如，上部)表面202a并且与第一表面相对的第二(例如，背侧)表面202b。在第一和第二表面之间的衬底202中布置光电探测器722的阵列。入射光724穿过微透镜726，微透镜726帮助引导光穿过互连结构204的孔728以撞击光电探测器722的阵列。为了简明，仅标注一个孔728。因为接合焊盘结构206可阻挡光，它通常设置在光电探测器722的阵列的一侧上并且不直接布置在光电探测器722的阵列上方。因为互连结构204中削薄的金属层通过光电探测器722促进增加的光吸收，接合焊盘结构706更适合于在这样的FSI图像传感器件中使用。这是因为接合焊盘结构706为IC提供了具有高效的光聚集和承受如引线接合的应力的高的结构刚性的良好的平衡。
图8示出了以具有改进的接合焊盘结构的背照式(BSI)传感器的形式的IC 800的实施例的截面图。IC 800具有以与上文中关于图2A描述的IC200类似的方式运行的衬底802、互连结构804和改进的接合焊盘结构806。接合焊盘结构806具有第一通孔层810、中间金属层812、第二通孔层814和接合焊盘层816。第一通孔层810具有通孔图案818以及第二通孔层814具有通孔图案820。
衬底802具有配置为接收照射的第一表面802a并且第二表面802b与第一表面相对。在第一表面802a和第二表面802b之间的衬底802中布置光电探测器822的阵列。在一个实施例中，与衬底202相比，削薄衬底802以促进光通过衬底802传输至光电探测器822。在撞击光电探测器822的阵列之前，入射光824穿过微透镜826和衬底802。由于衬底802变薄，接合焊盘结构806更适合于BSI传感器应用，由于其使得整个IC更能够承受如引线接合的应力。
图9示出用于制造具有改进的接合焊盘结构的IC的方法900的一些实施例的流程图。
在步骤902中，接收诸如图2A中的衬底202的衬底。在一个实施例中，该衬底可包括传感器。例如，在可衬底中设置光电探测器。
在步骤904中，在衬底上方形成具有一个或多个金属化层和中间介电(ILD)层的诸如图2A中的互连结构204的互连结构。在ILD层之间堆叠金属化层。金属化层通过通孔彼此电连接。
在步骤906中，在互连结构204上方形成诸如图2A中的介电层220的下部的第一介电层。第一介电层由诸如低k介电材料的介电材料形成。可使用汽相沉积(例如，化学汽相沉积(CVD))或等离子体汽相沉积(PVD))、热氧化或任何其他合适的沉积技术形成第一介电层。
在步骤908中，在第一介电层上方形成第一掩模。利用处于合适的位置处的第一掩模实施第一蚀刻以暴露互连结构内的上部金属层。
在步骤910中，在蚀刻的第一介电层上方形成导电层。形成导电层从而使得第一介电层的蚀刻的区域用诸如铝、铜、钨或金属合金的导电材料填充。例如，可通过CVD、PVD、电镀、溅射或任何其他沉积技术来形成导电层。
在步骤912中，实施化学机械平坦化(CMP)以平坦化导电层的上表面以形成诸如图2A中的第一通孔层228的第一通孔层。
在步骤914中，在第一通孔层上方形成诸如图2A中的中间金属层230的中间金属层。
在步骤916中，在中间金属层上方形成诸如图2A中的介电层220的上部的第二介电层。可使用汽相沉积(例如，化学汽相沉积(CVD))或等离子体汽相沉积(PVD))、热氧化或任何其他合适的沉积技术形成第二介电层。
在步骤918中，在第二介电层上方形成第二掩模。利用处于合适的位置处的第二掩模实施第二蚀刻以暴露中间金属层的上表面并且形成与中间金属层直接接触的第二通孔图案。在第二蚀刻之后，可去除第二掩模。
在步骤920中，用导电材料填充第二通孔图案的蚀刻的区域。形成导电材料从而使得第二介电层的蚀刻的区域用诸如铝、铜、钨或金属合金的导电材料填充。例如，可通过CVD、PVD、电镀、溅射或任何其他沉积技术来形成导电层。
在步骤922处，实施CMP以平坦化第二通孔图案的上表面并且形成诸如图2A中的第二通孔层232的第二通孔层。
在步骤924中，用上部接合焊盘层234覆盖第二通孔层232。上部接合焊盘层234可包括一个或多个接合焊盘并且由诸如铜、铝或铝铜化合物等制成。
参照图10至图22，提供了一系列截面图，截面图整体地示出与图9的一些实例一致的示例性制造流程。
图10示出对应于图9的步骤902的一些实施例的截面图。在图10中，接收衬底202。在一些实施例中，衬底202可以是块状硅衬底或类盘状晶圆形式的绝缘体上半导体(SOI)衬底(如，绝缘体衬底上的硅)。例如，衬底202也可以是二元半导体衬底(例如，GaAs)、三元半导体衬底(例如，AlGaAs)或更高阶数的半导体衬底或均匀的蓝宝石衬底。衬底202可以包括在衬底中或上形成的掺杂区、在衬底中或上形成的外延层、在衬底中或上形成的绝缘层、在衬底202中或上形成的光刻胶层和/或在衬底202中或上形成的导电层。在许多实例中，衬底202(当以晶圆的形式时)可具有以下直径：例如，1-英寸(25mm)；2-英寸(51mm)；3-英寸(76mm)；4-英寸(100mm)；5-英寸(130mm)或125mm(4.9-英寸)；150mm(5.9-英寸，通常称为“6英寸”)；200mm(7.9英寸通常称为“8英寸”)；300mm(11.8英寸，通常称为“12英寸”)；或450mm(17.7英寸，通常称为“18英寸”)。
图11示出对应于图9的步骤904的一些实施例的截面图。如上文中所讨论的，互连结构204可包括诸如堆叠在诸如ILD层216的ILD层之间的最上部金属层218的一系列金属化层。例如，ILD层可以是低κ电介质或二氧化硅。例如，金属化层和通孔可以是诸如铝、铜或钨或铜铝化合物的金属。
图12示出对应于图9的步骤906的一些实施例的截面图。在互连结构204上方形成第一介电层1200。第一介电层1200可以是诸如低k介电材料的介电材料。
图13示出对应于图9的步骤908的一些实施例的截面图。利用处于合适的位置处的第一掩模实施第一蚀刻以形成由开口1300构成的第一通孔图案，虽然暴露了互连结构204内的诸如金属层218的上部金属层。为了简明，仅标记两个开口1300。第一掩模对应于第一通孔图案。例如，第一掩模可以是光刻胶掩模和/或诸如氮化物硬掩模的硬掩模。在实施第一蚀刻之后，可去除第一掩模。
图14示出对应于图9的步骤910的一些实施例的截面图。用导电材料1400填充第一介电层中的开口1300。导电材料由诸如铝、铜或钨或铜铝化合物的金属化合物形成。
图15示出对应于图9的步骤912的一些实施例的截面图。在图15中，实施CMP以平坦化导电材料并且形成第一通孔图案层228。
图16示出对应于图9的步骤914的一些实施例的截面图。在图16中，形成和图案化电介质(未示出)以具有中间开口，并且在蚀刻的第一通孔层228上方的中间开口中形成中间金属层230。中间金属层230由导电材料组成。例如，导电材料可以是诸如铝、铜或钨或铜铝化合物的金属。第一通孔层228与中间金属层230的第一面接触。
图17示出了对应于图9的步骤916的一些实施例的截面图。在中间金属层230上方形成第二介电层1700。第二介电层1700可以是诸如低k介电材料的介电材料。
图18示出对应于图9的步骤918的一些实施例的截面图。在第二介电层1700上方形成第二掩模(未示出)。第二掩模对应于第二通孔图案。在一个实施例中，第一通孔图案和第二通孔图案是不同的。如第一掩模，例如，第二掩模可以是光刻胶掩模和/或诸如氮化物硬掩模的硬掩模。利用处于合适的位置处的第二掩模实施第二蚀刻以在第二介电层1700中形成一系列开口1800。
图19示出对应于图9的步骤920的一些实施例的截面图。如图19所示，用导电材料填充蚀刻的区域，其与中间金属层230直接接触。例如，导电材料1900可以是诸如铝、铜或钨或铜铝化合物的金属。
图20示出对应于图9的步骤922的一些实施例的截面图。在图20中，平坦化导电材料1900。在一个实施例中，使用CMP平坦化导电材料以形成第二通孔层230。
图21示出对应于图9的步骤924的一些实施例的截面图。在步骤924中，通过上部接合焊盘层234覆盖第二通孔层232。上部接合焊盘层234可包括由铝、铜或铝铜化合物制成的一个或多个接合焊盘。
图22示出对应于将引线接合112压至上部接合焊盘层234上的一些实施例的截面图。例如，上部接合焊盘层234也可包括连接至一个或多个接合焊盘的引线结构。将引线接合112压至上部接合焊盘层234上对下面的层施加力。第一通孔层228和第二通孔层232分布置于下面的层上的应力并且因此，提高了IC上的引线接合112、上部接合焊盘层234和下表面之间的接合。减少下面的层上的应力减少了在形成中的缺陷导致的IC的易损性并且因此提高了IC上的接合焊盘结构和下表面之间的接合。因此，改进的接合焊盘结构抵抗了缺陷并且提高了IC的产量和器件的可靠性。此外，接合焊盘结构更适合于用于IC的应用，IC(如图7至图8所示的诸如CMOS图像传感器(CIS))可利用的削薄的层更有效地操作。
在一个实施例中，一种集成电路(IC)的接合结构包括接合焊盘和位于接合焊盘下面的中间金属层。中间金属层具有第一面和第二面。接合焊盘结构还包括与中间金属层的第一面接触的第一通孔层和与中间层的第二面接触的第二通孔层。第一通孔层具有第一通孔图案并且第二通孔层具有第二通孔图案。在一个实施例中，第一通孔图案不同于第二通孔图案。
在另一实施例中，互补金属氧化物半导体图像传感器(CIS)包括图像传感衬底，其具有配置为接收照射的第一表面和与第一表面相对的第二表面。光电探测器的阵列布置在第一和第二表面之间的图像传感器衬底中。图像传感器互连结构邻接第一表面。CIS还包括与光电探测器的阵列横向隔开的接合焊盘结构。接合焊盘结构包括具有底面的接合焊盘层和与接合焊盘层的底面接触的单个通孔层。接合焊盘结构也包括设置在单个通孔层下面的中间金属层和设置在中间金属层下面并且与图像传感器互连结构接触的通孔阵列层。通孔阵列层具有多个通孔。
在一个实施例中，示出一种形成接合焊盘结构的方法。在该方法中，接收衬底。互连结构形成在衬底上方并且具有最上部金属互连层。在金属互连层上方形成第一介电层。蚀刻和图案化第一介电层以形成通孔开口的阵列。用导电材料填充通孔开口的阵列以形成第一通孔层。在第一通孔层上方形成中间金属层。在中间金属层上方形成第二介电层。图案化和蚀刻第二介电层以在第一通孔层中的通孔开口的阵列上方形成单个通孔开口。用导电材料填充单个通孔开口以形成第二通孔层。在第二通孔层上方形成接合焊盘，其中接合焊盘的底面与第二通孔层的顶面接触。
根据本发明的一个实施例，提供了一种集成电路(IC)的接合结构，包括：接合焊盘；中间金属层，具有第一面和第二面，其中，所述中间金属层设置在所述接合焊盘下面；第一通孔层，与所述中间金属层的所述第一面接触，其中，所述第一通孔层具有第一通孔图案；以及第二通孔层，与所述中间金属层的所述第二面接触，其中，所述第二通孔层具有第二通孔图案，以及其中，所述第一通孔图案不同于所述第二通孔图案。
在上述集成电路的接合结构中，所述第一通孔图案包括环绕所述第一通孔层的大部分的单个通孔。
在上述集成电路的接合结构中，所述第二通孔图案包括第一组狭长通孔，所述第一组狭长通孔的每个均具有较长的边缘和较短的边缘，其中，所述第一组狭长通孔的所述较长的边缘在第一方向上彼此平行地延伸。
在上述集成电路的接合结构中，所述第一通孔图案包括单个通孔，并且其中，所述单个通孔横向延伸所述第一组狭长通孔的长度以及横向延伸所述第一组狭长通孔的宽度。
在上述集成电路的接合结构中，所述第二通孔图案进一步包括具有一组相对的边缘的多个水平通孔，其中，所述相对的边缘与所述第一组狭长通孔的所述较短的边缘平行，并且其中，所述多个水平通孔以关于所述第一组狭长通孔呈对角线的方式整体地延伸。
在上述集成电路的接合结构中，所述第二通孔图案包括第二组狭长通孔，其中，在所述第二组狭长通孔中的通孔的较长的边缘在第二方向上延伸，并且其中，所述第一方向和所述第二方向是不同的。
在上述集成电路的接合结构中，所述第一方向正交于所述第二方向。
在上述集成电路的接合结构中，所述第二通孔图案进一步包括相对于所述第二方向以一角度延伸穿过所述第二组狭长通孔的第二对角线通孔。
在上述集成电路的接合结构中，所述第一组狭长通孔至少部分地重叠所述第二组狭长通孔。
在上述集成电路的接合结构中，所述第一组狭长通孔正交地重叠所述第二组狭长通孔以形成栅格。
根据本发明的另一实施例，还提供了一种互补金属氧化物半导体图像传感器(CIS)，包括：图像传感器衬底，具有第一表面和与所述第一表面相对的第二表面，其中，光电探测器的阵列布置在所述图像传感器衬底中、所述第一表面和所述第二表面之间；图像传感器互连结构，邻接所述第一表面；以及接合焊盘结构，与所述光电探测器的阵列横向隔开，并且所述接合焊盘结构包括：接合焊盘层，具有底面；单个通孔层，与所述接合焊盘层的所述底面接触；中间金属层，设置在所述单个通孔层下面；以及通孔阵列层，设置在所述中间金属层下面并且与所述图像传感器互连结构接触，其中，所述通孔阵列层具有多个通孔。
在上述互补金属氧化物半导体图像传感器中，所述单个通孔层具有环绕所述单个通孔层的大部分的单个通孔。
在上述互补金属氧化物半导体图像传感器中，所述通孔阵列层包括：第一组狭长通孔，其中，所述第一组狭长通孔中的通孔的较长的边缘在第一方向上延伸；第二组狭长通孔，其中，所述第二组狭长通孔中的通孔的较长的边缘在第二方向上延伸；第三组狭长通孔，其中，所述第三组狭长通孔中的通孔的较长的边缘在所述第一方向上延伸；以及第四组狭长通孔，其中，所述第四组狭长通孔中的通孔的较长的边缘在所述第二方向上延伸。
在上述互补金属氧化物半导体图像传感器中，所述第一组狭长通孔布置为与所述通孔阵列层上的所述第三组狭长通孔呈角线，并且其中，所述第二组狭长通孔布置为与所述通孔阵列层上的所述第四组狭长通孔呈对角线。
在上述互补金属氧化物半导体图像传感器中，所述单个通孔层具有第一单个通孔侧壁和与所述第一单个通孔侧壁相对的第二单个通孔侧壁；其中，所述通孔阵列层具有第一通孔阵列侧壁和与所述第一通孔阵列侧壁相对的第二通孔阵列侧壁；以及其中，所述第一单个通孔侧壁与所述第一通孔阵列侧壁对准并且所述第二单个通孔侧壁与所述第二通孔阵列侧壁对准。
在上述互补金属氧化物半导体图像传感器中，所述通孔阵列层包括一组平行的线性通孔。
在上述互补金属氧化物半导体图像传感器中，所述通孔阵列层包括与相邻的通孔等距的多个正方形通孔。
根据本发明的又一实施例，还提供了一种用于形成接合焊盘结构的方法，所述方法包括：接收衬底；在具有最上部金属互连层的所述衬底上方形成互连结构；在所述金属互连层上方形成第一介电层；图案化和蚀刻所述第一介电层以形成通孔开口的阵列；用导电材料填充所述通孔开口的阵列以形成第一通孔层；在所述第一通孔层上方形成中间金属层；在所述中间金属层上方形成第二介电层；图案化和蚀刻所述第二介电层以在位于所述第一通孔层中的所述通孔开口的阵列上方形成单个通孔开口；用所述导电材料填充所述单个通孔开口以形成第二通孔层；以及在所述第二通孔层上方形成接合焊盘，其中，所述接合焊盘的底面与所述第二通孔层的顶面接触。
在上述方法中，所述通孔开口的阵列包括一组狭长通孔开口，所述狭长通孔开口的每个均具有较长的边缘和较短的边缘，其中，在所述组中的所述狭长通孔开口的所述较长的边缘在单个方向上彼此平行地延伸。
在上述方法中，所述第二通孔层的所述导电材料具有与所述第一通孔层的外边界对准并且小于所述接合焊盘的外边界的外边界。
上面概述了若干实施例的特征，使得本领域技术人员可以更好地理解本发明的各方面。本领域技术人员应该理解，他们可以容易地使用本发明作为基础来设计或修改用于实施与在此所介绍实施例相同的目的和/或实现相同优势的其他工艺和结构。本领域技术人员也应该意识到，这种等同构造并不背离本发明的精神和范围，并且在不背离本发明的精神和范围的情况下，在此他们可以做出多种变化、替换以及改变。

Claims (1)

1.一种集成电路(IC)的接合结构，包括：
接合焊盘；
中间金属层，具有第一面和第二面，其中，所述中间金属层设置在所述接合焊盘下面；
第一通孔层，与所述中间金属层的所述第一面接触，其中，所述第一通孔层具有第一通孔图案；以及
第二通孔层，与所述中间金属层的所述第二面接触，其中，所述第二通孔层具有第二通孔图案，以及其中，所述第一通孔图案不同于所述第二通孔图案。
CN201710255926.9A 2016-05-13 2017-04-18 用于改进接合的接合焊盘结构 Pending CN107452701A (zh)

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US10777503B2 (en) * 2017-05-11 2020-09-15 Schweizer Electronic Ag Method for contacting a metallic contact pad in a printed circuit board and printed circuit board
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TW430935B (en) * 1999-03-19 2001-04-21 Ind Tech Res Inst Frame type bonding pad structure having a low parasitic capacitance
US20030218259A1 (en) * 2002-05-21 2003-11-27 Chesire Daniel Patrick Bond pad support structure for a semiconductor device
JP2005019452A (ja) * 2003-06-23 2005-01-20 Toshiba Corp 半導体装置
KR100675275B1 (ko) * 2004-12-16 2007-01-26 삼성전자주식회사 반도체 장치 및 이 장치의 패드 배치방법
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US7659595B2 (en) * 2007-07-16 2010-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded bonding pad for backside illuminated image sensor
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