CN107438047B - Phase noise self-correction compensation method based on decision feedback in single carrier frequency domain equalization system - Google Patents

Phase noise self-correction compensation method based on decision feedback in single carrier frequency domain equalization system Download PDF

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CN107438047B
CN107438047B CN201710562231.5A CN201710562231A CN107438047B CN 107438047 B CN107438047 B CN 107438047B CN 201710562231 A CN201710562231 A CN 201710562231A CN 107438047 B CN107438047 B CN 107438047B
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CN107438047A (en
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崔高峰
陈旭
王程
赵雪
王卫东
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Beijing University of Posts and Telecommunications
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    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
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    • H—ELECTRICITY
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Abstract

The invention discloses a phase noise self-correction compensation method based on decision feedback in a single carrier frequency domain equalization system, relating to the field of wireless communication; the invention utilizes pilot frequency to carry out phase noise rough estimation on a receiving signal at a receiving end, completes the rough compensation of the phase noise, carries out SC-FDE demodulation after obtaining the signal after the rough compensation, then carries out constellation remapping processing on a decision feedback signal, and estimates the decision feedback phase noise; and correcting decision feedback phase noise by using the pilot frequency point phase noise as a threshold value, compensating the received signal by using the corrected phase noise, and demodulating and deciding the obtained compensation signal. The invention is simple to realize at the sending end, has lower PAPR, and is beneficial to the miniaturization and low power consumption of the communication terminal; the method does not need to add an additional processing unit at a receiving end, is suitable for various phase noise models, effectively inhibits the influence of phase noise on the error rate performance of the system, and improves the error rate performance of the communication system.

Description

Phase noise self-correction compensation method based on decision feedback in single carrier frequency domain equalization system
Technical Field
The invention relates to the field of wireless communication, in particular to a phase noise self-correction compensation method based on decision feedback in a single carrier frequency domain equalization system (SC-FDE).
Background
In wireless communication systems, information is transmitted in space by modulated electromagnetic waves to a receiver. With the continuous development of wireless communication, communication terminals are required to have features such as miniaturization and low power consumption.
SC-FDE attracts a great deal of attention in a signal processing manner like Orthogonal Frequency Division Multiplexing (OFDM) technology. SC-FDE adopts a low-complexity frequency domain equalization technology, the multipath resistance is equivalent to OFDM, but because the SC-FDE does not carry out IFFT processing at a transmitting end, the power peak value-to-average value ratio (PAPR) of a transmitting signal is smaller than OFDM, a single carrier mature radio frequency technology can be adopted, and the cost of nonlinear devices such as a power amplifier and the like is reduced. The SC-FDE is generally used in combination with Quadrature Amplitude Modulation (QAM), and the transmitting end only needs to perform constellation mapping on data without other complex modulation, so that the system complexity is low, which completely meets the requirement of miniaturization of a wireless terminal. There is a need for more intensive research into the application of SC-FDE technology in wireless communication scenarios.
In a wireless communication system, both a transmitting end and a receiving end need to generate corresponding carriers to complete the spectrum conversion between corresponding radio frequencies and baseband. However, a certain difference exists between the oscillator generating the carrier wave and the phase-locked loop, which causes a short-time random difference between the carrier frequency and the target frequency, and further causes a random phase jump of the generated signal, which is expressed as phase noise. As the communication frequency band increases, the phase noise has more obvious influence on the performance of the system.
Due to the scarcity of low-frequency band spectrum resources, wireless communication develops towards a higher frequency band, so that phase noise becomes a factor which influences the error rate performance of a system to be not negligible; the communication terminal develops towards the direction of miniaturization and low power consumption, and the SC-FDE system has lower PAPR and lower system complexity and can simultaneously meet the requirements of low power consumption and miniaturization of the terminal. Therefore, it is necessary to develop a phase noise compensation method suitable for the SC-FDE system.
Disclosure of Invention
Aiming at the problem that the phase noise can influence the error rate performance of the SC-FDE system, the invention provides a phase noise self-correction compensation method based on decision feedback in the SC-FDE system in order to effectively improve the error rate performance of the SC-FDE system;
firstly, carrying out coarse estimation on phase noise of a received signal by using pilot frequency at a receiving end to complete coarse compensation of the phase noise; after the signals after the coarse compensation are obtained, SC-FDE demodulation is carried out; then, constellation remapping processing is carried out on the decision feedback signal, and estimation is carried out on decision feedback phase noise; and correcting decision feedback phase noise by using the pilot frequency point phase noise as a threshold value, compensating the received signal by using the corrected phase noise, and demodulating and deciding the obtained compensation signal.
The method comprises the following specific steps:
step one, aiming at a certain bit stream signal of a wireless communication system sending end, adopting 16QAM mapping modulation to obtain Nsym16QAM symbols;
the 16QAM symbols are represented as follows: p is a radical ofk,k＝1,2,...,Nsym
Step two, the SC-FDE system divides the 16QAM symbol into data blocks, and inserts unique words into the head and the tail of each data block respectively to form sub data blocks;
the length of each data block consists of 496 16QAM symbols; each unique word is 16 in length; each data block and the unique words connected with the head and the tail of the data block form a sub data block; each sub-data block has 528 digital symbols;
step three, converting the digital symbol of each subdata block into an antenna radiation analog signal after being converted by a D/A conversion module;
for the m-th digital symbol s on the i-th sub-data block after the addition of the unique wordi,mThe method comprises three parts:
Figure BDA0001347428540000021
the first part is the m-th unique word u of the sub data blocki,m(ii) a The second part is the m-th transmission symbol z of the sub data blocki,m(ii) a The third part is the mth pilot point p of the subdata blocki,m；NuwIndicating the length of the unique word; n is a radical ofdIndicating the length of the data block; pi represents the interval value between two adjacent pilot points; pn represents the number of pilot points;
step four, each analog signal reaches a receiving end through Gaussian white noise, and is converted into a time domain signal of the receiving end through an A/D conversion module;
time domain signal r corresponding to mth digital symbol on ith sub-data block structurei,mThe following were used:
Figure BDA0001347428540000022
Figure BDA0001347428540000023
for phase noise of the m-th digital symbol on the ith sub-data block of the transmitting end, ni,mIs the Gaussian white noise component on the mth time domain signal on the ith sub-data block;
and step five, aiming at the ith sub-data block, the receiving end performs coarse phase noise estimation by using pilot frequency linear interpolation to obtain the coarse estimation phase noise of each digital symbol in the sub-data block.
Firstly, roughly estimating head and tail digital symbol phase noise in the ith sub-data block, specifically:
aiming at the 16-bit first unique word of the sub data block, taking the average value of the phase noises of 16 symbols as the phase noise of the first symbol of the first unique word of the ith sub data block; similarly, the average value of the phase noises corresponding to the 16 symbols of the tail unique word of the sub-data block is taken as the phase noise of the last symbol of the tail unique word of the sub-data block;
the phase noise for each symbol in the unique word is calculated as follows:
Figure BDA0001347428540000031
δ2represents the power of white gaussian noise;
roughly estimating the phase noise of the rest 526-bit digital symbols of the ith sub-data block, specifically:
firstly, calculating the phase noise of each pilot frequency point in the sub data block, and then roughly estimating the phase noise of each digital symbol between two adjacent pilot frequency points by using a pilot frequency point linear interpolation method.
The phase noise at each pilot point is calculated as follows:
Figure BDA0001347428540000032
and sixthly, performing phase noise compensation on the respective time domain signals by using the rough estimation phase noise of each digital symbol aiming at the ith sub-data block to obtain the digital signals after the rough compensation of each digital symbol.
Digital signal after coarse compensation of mth digital symbol of ith sub-data block
Figure BDA0001347428540000033
The following were used:
Figure BDA0001347428540000034
Figure BDA0001347428540000035
the conjugate of the m-th digital symbol coarse estimation phase noise of the ith sub-data block is represented;
and seventhly, performing SC-FDE demodulation on each coarsely compensated digital signal of the ith sub-data block to obtain a demodulated signal.
The SC-FDE demodulation comprises FFT, MMSE frequency domain equalization and IFFT;
step eight, performing self-correction on the signals of all the subdata blocks after SC-FDE demodulation to obtain self-corrected phase noise;
the method comprises the following specific steps:
step 801, performing 16QAM demapping on the signal demodulated by the SC-FDE to obtain a binary bit stream;
step 802, the binary bit stream is modulated by adopting 16QAM mapping again to obtain a compensated 16QAM symbol;
step 803, dividing the compensated 16QAM symbols into data blocks, and inserting a unique word into each data block from the beginning to the end to form a compensated sub-data block;
step 804, aiming at the mth digital symbol of the ith sub-data block after the initial compensation
Figure BDA0001347428540000036
Combining the time-domain signal r before the coarse estimationi,mCalculating feedback phase noise delta phi in phase noise self-correction module～ i,m；
After initial compensationDigital symbol of
Figure BDA0001347428540000038
And a time domain signal ri,mObtaining the mth feedback phase noise delta phi of the ith sub-data block～ i,m。
Figure BDA0001347428540000037
Denotes conjugation.
Step 805, obtaining 4 self-correcting thresholds from each pilot frequency point of the ith sub-data block after initial compensation;
the 4 self-correcting thresholds are: phase minimum of pilot point phase noise phimin,p,i,mPilot point phase noise phase maximum value phimax,p,i,mPilot point phase noise minimum amplitude | phi-min,p,i,mAmplitude maximum of phase noise of pilot frequency point
|Φ|max,p,i,m。
And step 806, searching a phase noise point which is wrongly judged in each feedback phase noise by using 4 self-correcting thresholds.
The specific process is as follows:
when the phase of some feedback phase noise is smaller than the minimum value phi of the phase noise of the pilot frequency pointmin,p,i,mOr greater than the maximum value of phase noise phi at the pilot frequency pointmax,p,i,mOr the amplitude of the feedback phase noise is smaller than the minimum amplitude value | phi! of the pilot point phase noisemin,p,i,mOr the amplitude is greater than the maximum amplitude of the pilot point phase noise | phimax,p,i,mThen the feedback phase noise is the phase noise point of the wrong decision.
And step 807, selecting a corresponding phase noise value for substitution according to a substitution rule for the phase noise point which is wrongly judged.
The specific process is as follows:
the first substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the feedback phase noise with the phase noise of the previous digital symbol when the feedback phase noise is a wrong-decision phase noise point;
the second substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the feedback phase noise with the average value of the phase noise of the previous digital symbol and the phase noise of the next digital symbol when the feedback phase noise is a wrong-decision phase noise point;
the third substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the feedback phase noise with the phase noise of the first two digital symbols and the average value of the phase noise of the second two digital symbols when the feedback phase noise is a wrong-decision phase noise point;
and so on;
808, obtaining a digital signal after self-correction compensation by using each corrected phase noise and the corresponding time domain signal before coarse estimation, performing SC-FDE demodulation, and returning to the 801;
with the increase of the iteration times, the phase noise of the symbol which is wrongly judged is corrected, the more the iteration times, the fewer the points which are wrongly judged, and the error rate performance of the system is improved.
The invention has the advantages that:
1) the phase noise self-correction compensation algorithm based on decision feedback in the single carrier frequency domain equalization system is simple to realize at a sending end, has lower PAPR and is beneficial to miniaturization and low power consumption of a communication terminal;
2) the phase noise self-correction compensation algorithm based on decision feedback in the single carrier frequency domain equalization system does not need to add an extra processing unit at a receiving end, and can be suitable for various phase noise models by performing decision feedback self-correction processing on a demodulation signal, thereby effectively inhibiting the influence of phase noise on the error rate performance of the system and greatly improving the error rate performance of the communication system.
Drawings
FIG. 1 is a schematic diagram of a decision feedback-based phase noise self-correction compensation algorithm in SC-FDE according to the present invention;
FIG. 2 is a flow chart of a phase noise self-correction compensation algorithm based on decision feedback in SC-FDE according to the present invention;
FIG. 3 is a schematic diagram of the SC-FDE system of the present invention dividing a data block and inserting unique words to form sub-data blocks;
FIG. 4 is a flow chart of the algorithm for self-rectifying all sub-data blocks of the present invention;
fig. 5 is a performance diagram comparing the error rate of SC-FDE under different situations by using a 16QAM modulation scheme according to the present invention.
Detailed Description
The following describes in detail a specific embodiment of the present invention with reference to the drawings.
As shown in fig. 1, for a certain transmission bit signal, the form set at a position a is a binary bit stream, and a 16QAM symbol at a position B is obtained after 16QAM constellation mapping; the SC-FDE system divides the 16QAM symbol into data blocks, and inserts the same unique word with the length of 16 into the head and the tail of each data block to obtain a subdata block with the length of 512; the subdata block reaches a receiving end through a D/A module and an AWGN channel; the receiving end converts the analog signal through an A/D module to obtain a time domain digital signal at the position C;
the time domain digital signal at the position C is subjected to coarse compensation of pilot frequency phase noise to obtain coarse compensation phase noise at the position D, the coarse compensation phase noise is combined with the time domain digital signal at the position C to calculate to obtain a digital signal after coarse compensation at the position E of a receiving end, the digital signal is sequentially subjected to an FFT module to obtain frequency domain representation of the time domain signal after coarse compensation at the position F, the frequency domain signal after equalization at the position G is obtained after frequency domain equalization, an SC-FDE demodulation signal at the position H is obtained after the IFFT module, a binary bit stream is obtained after hard decision, namely 16QAM demapping, 16QAM mapping modulation is adopted again to obtain a 16QAM symbol after J compensation; and re-inserting the unique words to obtain K compensated sub-data blocks, and performing phase noise self-correction to obtain L corrected phase noise.
The time domain signal at the position C of the corrected phase noise at the position L is compensated to obtain a compensated signal, and the compensated signal returns to the position E; and carrying out SC-FDE demodulation and cyclic iteration in sequence.
As shown in fig. 2, the specific steps are as follows:
step one, aiming at a certain bit stream signal of a wireless communication system sending end, adopting 16QAM mapping modulationTo obtain Nsym16QAM symbols;
the 16QAM symbols are represented as follows: p is a radical ofk,k＝1,2,...,Nsym
Step two, the SC-FDE system divides the 16QAM symbol into data blocks, and inserts unique words into the head and the tail of each data block respectively to form sub data blocks;
ideally, the frequency spectrum of the unique word sequence should have equal or nearly equal amplitude at all frequencies to produce a wide bandwidth, smooth frequency response to ensure that each frequency component in the channel is uniformly detectable. The data block structure after adding the unique word is shown in fig. 3, and each data block is composed of 496 16QAM symbols in length; each unique word is 16 in length; each data block and the unique words connected with the head and the tail of the data block form a sub data block; each sub-data block has 528 digital symbols.
Step three, converting the digital symbol of each subdata block into an antenna radiation analog signal after being converted by a D/A conversion module;
the D/A conversion module converts the baseband digital signal into an analog signal that can be radiated by the antenna.
For the m-th digital symbol s on the i-th sub-data block after the addition of the unique wordi,mThe method comprises three parts:
Figure BDA0001347428540000061
the first part is the m-th unique word u of the sub data blocki,m(ii) a The second part is the m-th transmission symbol z of the sub data blocki,m(ii) a The third part is the mth pilot point p of the subdata blocki,m；NuwIndicating the length of the unique word; n is a radical ofdIndicating the length of the data block; pi represents the interval value between two adjacent pilot points; pn denotes the number of pilot points. Pilot points are time domain digital symbol points of the transmitting end known to the receiving end.
Step four, each analog signal reaches a receiving end through Gaussian white noise, and is converted into a time domain signal of the receiving end through an A/D conversion module;
the signal propagation environment in the invention is Gaussian white noise (AWGN) environment, and only phase noise influence at the transmitting end is considered. The position C is a signal of which the sending signal is influenced by phase noise and passes through a Gaussian white noise channel, and a time domain signal r corresponding to the mth digital symbol on the ith sub-data block structurei,mThe following were used:
Figure BDA0001347428540000063
Figure BDA0001347428540000064
for phase noise of the m-th digital symbol on the ith sub-data block of the transmitting end, ni,mIs the white gaussian noise component on the mth time domain signal on the ith sub-data block.
And step five, aiming at the ith sub-data block, the receiving end performs coarse phase noise estimation by using pilot frequency linear interpolation to obtain the coarse estimation phase noise of each digital symbol in the sub-data block.
And D, the signal is an initial compensation phase noise sequence, and the phase noise value of each symbol point is estimated through linear interpolation. The average phase noise of the unique words at the front end and the rear end is used as the first value and the last value of the signal at the position D, and the pilot frequency point is used as the middle noise point after linear interpolation. Firstly, roughly estimating head and tail digital symbol phase noise in the ith sub-data block, specifically:
aiming at the 16-bit first unique word of the sub data block, taking the average value of the phase noises of 16 symbols as the phase noise of the first symbol of the first unique word of the ith sub data block; similarly, the average value of the phase noises corresponding to the 16 symbols of the tail unique word of the sub-data block is taken as the phase noise of the last symbol of the tail unique word of the sub-data block;
the phase noise for each symbol in the unique word is calculated as follows:
Figure BDA0001347428540000062
δ2representing a Gaussian whiteThe power of the noise;
roughly estimating the phase noise of the rest 526-bit digital symbols of the ith sub-data block, specifically:
firstly, calculating the phase noise of each pilot frequency point in the sub data block, and then roughly estimating the phase noise of each digital symbol between two adjacent pilot frequency points by using a pilot frequency point linear interpolation method.
The phase noise at each pilot point is calculated as follows:
Figure BDA0001347428540000071
and sixthly, performing phase noise compensation on the respective time domain signals by using the rough estimation phase noise of each digital symbol aiming at the ith sub-data block to obtain the digital signals after the rough compensation of each digital symbol.
Digital signal after coarse compensation of mth digital symbol of ith sub-data block
Figure BDA0001347428540000072
The following were used:
Figure BDA0001347428540000073
ΔΦi,mrepresents the phase noise of the mth time domain signal for coarsely compensating the ith sub-data block at the receiving end,
Figure BDA0001347428540000074
the conjugate of the m-th digital symbol coarse estimation phase noise of the ith sub-data block is represented;
and seventhly, performing SC-FDE demodulation on each coarsely compensated digital signal of the ith sub-data block to obtain a demodulated signal.
The SC-FDE demodulation comprises FFT, MMSE frequency domain equalization and IFFT;
and F is a frequency domain signal after FFT, and is represented by the following formula:
Figure BDA0001347428540000075
the signal after MMSE frequency domain equalization is at the position G, the time domain signal after IFFT is at the position H,
step eight, performing self-correction on the signals of all the subdata blocks after SC-FDE demodulation to obtain self-corrected phase noise;
as shown in fig. 4, the specific steps are as follows:
step 801, performing 16QAM demapping on the signal demodulated by the SC-FDE to obtain a binary bit stream;
and (3) 16QAM demapping, namely hard decision, and obtaining a binary stream after hard decision at I.
Step 802, the binary bit stream is modulated by adopting 16QAM mapping again to obtain a compensated 16QAM symbol;
step 803, dividing the compensated 16QAM symbols into data blocks, and inserting a unique word into each data block from the beginning to the end to form a compensated sub-data block;
the compensated sub-data block at K obtained after the unique word is re-inserted has the same structure as the signal at C.
Step 804, aiming at the mth digital symbol of the ith sub-data block after the initial compensation
Figure BDA0001347428540000076
Combining the time-domain signal r before the coarse estimationi,mCalculating feedback phase noise delta phi in phase noise self-correction module～ i,m；
Using initially compensated digital symbols
Figure BDA0001347428540000078
And a time domain signal ri,mObtaining the mth feedback phase noise delta phi of the ith sub-data block～ i,m。
Figure BDA0001347428540000077
Denotes conjugation.
Step 805, obtaining 4 self-correcting thresholds from each pilot frequency point of the ith sub-data block after initial compensation;
because the pilot frequency point is known at the receiving end, the phase noise of the pilot frequency point is ensured to be correct, and the phase noise of the pilot frequency point is utilized to set a threshold value: the 4 self-correcting thresholds are: phase minimum of pilot point phase noise phimin,p,i,m：
Figure BDA0001347428540000081
Phase maximum of pilot point phase noise phimax,p,i,m：
Figure BDA0001347428540000082
Pilot point phase noise minimum value | phi-min,p,i,m：
Figure BDA0001347428540000083
Pilot point phase noise maximum value | phi-max,p,i,m：
Figure BDA0001347428540000084
And step 806, searching a phase noise point which is wrongly judged in each feedback phase noise by using 4 self-correcting thresholds.
The specific process is as follows:
the invention firstly carries out phase noise rough compensation on the signal at the receiving end, then carries out demodulation and judgment on the signal after the rough compensation, if a certain symbol is mapped to an error constellation point when carrying out 16QAM constellation mapping again, then the obtained delta phi～ i,mIt is highly likely that the self-correcting threshold will be exceeded, so when the phase of some feedback phase noise is less than the minimum value phi of the phase noise of the pilot pointmin,p,i,mOr greater than the maximum value of phase noise phi at the pilot frequency pointmax,p,i,mOr the amplitude of the feedback phase noise is smaller than the phase of the pilot pointNoise amplitude minimum value | Φ $min,p,i,mOr the amplitude is greater than the maximum amplitude of the pilot point phase noise | phimax,p,i,mThen the symbol point is the phase noise point of the erroneous decision.
And step 807, selecting a corresponding phase noise value for substitution according to a substitution rule for the phase noise point which is wrongly judged.
The invention adopts an iteration mode to correct the phase noise until an acceptable result is obtained; the specific process is as follows:
the first substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the phase noise of a wrong judgment point by the phase noise of a previous digital symbol when a symbol point corresponding to the feedback phase noise is the phase noise point of the wrong judgment;
ΔΦ～ i,k＝ΔΦ～ i,k-1
k represents the position of a wrong judgment point;
the second substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the phase noise of the previous digital symbol and the phase noise average value of the next digital symbol when the symbol point corresponding to the feedback phase noise is the phase noise point of wrong judgment;
the self-correcting condition is converted into:
Figure BDA0001347428540000085
the third substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the phase noise of the first two digital symbols and the average value of the phase noise of the second two digital symbols when the symbol point corresponding to the feedback phase noise is the phase noise point of wrong judgment;
by analogy, the self-correcting condition is transformed into:
Figure BDA0001347428540000091
l is the number of iterations, l > 1.
808, compensating the time domain signal before rough estimation of the corresponding receiving terminal by using each phase noise after each correction substitution, obtaining a digital signal after self-correction compensation, performing SC-FDE demodulation, and returning to the 801;
with the increase of the iteration times, the phase noise of the symbol which is wrongly judged is corrected, the more the iteration times, the fewer the points which are wrongly judged, and the error rate performance of the system is improved.
As shown in fig. 5, a 16QAM modulation scheme is adopted for simulation, and the length of each sub-data block is N ═ Nd+Nuw512, data symbol N d496, a unique block N uw16; No-PHNC in the figure means that No processing is performed on the phase noise; "PRC-Only" means that Only the signal is coarsely compensated; "SC-PNC" represents decision feedback self-correction compensation for the signal; "No-PHN" indicates the bit error rate performance when the system is not affected by phase noise; when a decision feedback self-correction algorithm is adopted for one iteration, the performance of the SC-PNC-Iter1 is obviously superior to that of the PRC-Only; and the error rate of the ' SC-PNC-Iter4 ' is 10 relative to the ' SC-PNC-Iter2-5The advantage of 1.5dB can be obtained.

Claims (4)

1. A phase noise self-correction compensation method based on decision feedback in a single carrier frequency domain equalization system is characterized by comprising the following specific steps:
step one, aiming at a certain bit stream signal of a wireless communication system sending end, adopting 16QAM mapping modulation to obtain Nsym16QAM symbols;
step two, the SC-FDE system divides the 16QAM symbol into data blocks, and inserts unique words into the head and the tail of each data block respectively to form sub data blocks;
step three, converting the digital symbol of each subdata block into an antenna radiation analog signal after being converted by a D/A conversion module;
for the m-th digital symbol s on the i-th sub-data block after the addition of the unique wordi,mThe method comprises three parts:
Figure FDA0001347428530000011
the first part is the m-th unique word u of the sub data blocki,m(ii) a The second part is the m-th transmission symbol z of the sub data blocki,m(ii) a The third part is the mth pilot point p of the subdata blocki,m；NuwIndicating the length of the unique word; n is a radical ofdIndicating the length of the data block; pi represents the interval value between two adjacent pilot points; pn represents the number of pilot points;
step four, each analog signal reaches a receiving end through Gaussian white noise, and is converted into a time domain signal of the receiving end through an A/D conversion module;
time domain signal r corresponding to mth digital symbol on ith sub-data block structurei,mThe following were used:
Figure FDA0001347428530000012
Figure FDA0001347428530000014
for phase noise of the m-th digital symbol on the ith sub-data block of the transmitting end, ni,mIs the Gaussian white noise component on the mth time domain signal on the ith sub-data block;
step five, aiming at the ith sub-data block, the receiving end carries out phase noise rough estimation by utilizing pilot frequency linear interpolation to obtain the rough estimation phase noise of each digital symbol in the sub-data block;
firstly, roughly estimating head and tail digital symbol phase noise in the ith sub-data block, specifically:
aiming at the 16-bit first unique word of the sub data block, taking the average value of the phase noises of 16 symbols as the phase noise of the first symbol of the first unique word of the ith sub data block; similarly, the average value of the phase noises corresponding to the 16 symbols of the tail unique word of the sub-data block is taken as the phase noise of the last symbol of the tail unique word of the sub-data block;
the phase noise for each symbol in the unique word is calculated as follows:
Figure FDA0001347428530000013
δ2represents the power of white gaussian noise;
then, the phase noise of the rest digital symbols of the ith sub-data block is roughly estimated, specifically:
firstly, calculating the phase noise of each pilot frequency point in the sub-data block, and then roughly estimating the phase noise of each digital symbol between two adjacent pilot frequency points by using a pilot frequency point linear interpolation method;
the phase noise at each pilot point is calculated as follows:
Figure FDA0001347428530000021
step six, aiming at the ith sub-data block, carrying out phase noise compensation on respective time domain signals by using the rough estimation phase noise of each digital symbol to obtain a digital signal after the rough compensation of each digital symbol;
digital signal after coarse compensation of mth digital symbol of ith sub-data block
Figure FDA0001347428530000024
The following were used:
Figure FDA0001347428530000022
Figure FDA0001347428530000025
the conjugate of the m-th digital symbol coarse estimation phase noise of the ith sub-data block is represented;
step seven, carrying out SC-FDE demodulation on each digital signal after coarse compensation of the ith sub-data block to obtain a demodulated signal;
and step eight, performing self-correction on the signals of all the sub data blocks after SC-FDE demodulation to obtain self-corrected phase noise.
2. The method for self-correcting and compensating for phase noise based on decision feedback in a single carrier frequency domain equalization system according to claim 1, wherein in said second step, the length of each data block is composed of 496 16QAM symbols; each unique word is 16 in length; each data block and the unique words connected with the head and the tail of the data block form a sub data block; each sub-data block has 528 digital symbols.
3. The method for self-correction compensation of phase noise based on decision feedback in single carrier frequency domain equalization system according to claim 1, wherein in the seventh step, SC-FDE demodulation comprises FFT, MMSE frequency domain equalization and IFFT.
4. The method for self-correcting and compensating for phase noise based on decision feedback in a single carrier frequency domain equalization system according to claim 1, wherein the step eight is implemented by the following steps:
step 801, performing 16QAM demapping on the signal demodulated by the SC-FDE to obtain a binary bit stream;
step 802, the binary bit stream is modulated by adopting 16QAM mapping again to obtain a compensated 16QAM symbol;
step 803, dividing the compensated 16QAM symbols into data blocks, and inserting a unique word into each data block from the beginning to the end to form a compensated sub-data block;
step 804, aiming at the mth digital symbol of the ith sub-data block after the initial compensation
Figure FDA0001347428530000026
Combining the time-domain signal r before the coarse estimationi,mCalculating feedback phase noise delta phi in phase noise self-correction module～ i,m；
Using initially compensated digital symbols
Figure FDA0001347428530000027
And a time domain signal ri,mObtaining the mth feedback phase noise delta phi of the ith sub-data block～ i,m；
Figure FDA0001347428530000023
Denotes conjugation;
step 805, acquiring four self-correcting thresholds from each pilot frequency point of the ith sub-data block after initial compensation;
the four self-correcting thresholds are respectively: phase minimum of pilot point phase noise phimin,p,i,mPilot point phase noise phase maximum value phimax,p,i,mPilot point phase noise minimum amplitude | phi-min,p,i,mPilot point phase noise maximum value | Φ -max,p,i,m；
Step 806, searching a phase noise point of an error judgment in each feedback phase noise by using four self-correction thresholds;
the specific process is as follows:
when the phase of some feedback phase noise is smaller than the minimum value phi of the phase noise of the pilot frequency pointmin,p,i,mOr greater than the maximum value of phase noise phi at the pilot frequency pointmax,p,i,mOr the amplitude of the feedback phase noise is smaller than the minimum amplitude value | phi! of the pilot point phase noisemin,p,i,mOr the amplitude is greater than the maximum amplitude of the pilot point phase noise | phimax,p,i,mIf the feedback phase noise is the wrong phase noise point;
step 807, selecting corresponding phase noise values for substitution according to a substitution rule for the erroneously determined phase noise points; the specific process is as follows:
the first substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the feedback phase noise with the phase noise of the previous digital symbol when the feedback phase noise is a wrong-decision phase noise point;
the second substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the feedback phase noise with the average value of the phase noise of the previous digital symbol and the phase noise of the next digital symbol when the feedback phase noise is a wrong-decision phase noise point;
the third substitution is as follows: starting from the 17 th bit feedback phase noise, judging one by one, and replacing the feedback phase noise with the phase noise of the first two digital symbols and the average value of the phase noise of the second two digital symbols when the feedback phase noise is a wrong-decision phase noise point;
and so on;
808, obtaining a digital signal after self-correction compensation by using each corrected phase noise and the corresponding time domain signal before coarse estimation, performing SC-FDE demodulation, and returning to the 801;
as the number of iterations increases, the phase noise of the erroneously determined symbol is corrected, resulting in a self-corrected phase noise.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102265549A (en) * 2008-09-22 2011-11-30 柯扎特·拉多·拉多莱斯库 Network timing synchronization systems
CN102857468A (en) * 2012-09-17 2013-01-02 哈尔滨工业大学 SC-FDE (single carrier with frequency-domain equalization) system based on MAP (maximum a posterior) equalization and construction method of pilot frequency structure therein
CN103179062A (en) * 2013-03-22 2013-06-26 电子科技大学 Phase noise suppression method under low-complexity channel estimation of SC-FDE (single carrier-frequency domain equalization) system
WO2015183114A1 (en) * 2014-05-30 2015-12-03 Instituto Superior Tecnico Receiver with joint equalization and phase-noise estimation and corresponding method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9843464B2 (en) * 2015-10-14 2017-12-12 Maxlinear Asia Singapore Private Limited Wireless backhaul

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102265549A (en) * 2008-09-22 2011-11-30 柯扎特·拉多·拉多莱斯库 Network timing synchronization systems
CN102857468A (en) * 2012-09-17 2013-01-02 哈尔滨工业大学 SC-FDE (single carrier with frequency-domain equalization) system based on MAP (maximum a posterior) equalization and construction method of pilot frequency structure therein
CN102857468B (en) * 2012-09-17 2015-05-13 哈尔滨工业大学 SC-FDE (single carrier with frequency-domain equalization) system based on MAP (maximum a posterior) equalization and construction method of pilot frequency structure therein
CN103179062A (en) * 2013-03-22 2013-06-26 电子科技大学 Phase noise suppression method under low-complexity channel estimation of SC-FDE (single carrier-frequency domain equalization) system
WO2015183114A1 (en) * 2014-05-30 2015-12-03 Instituto Superior Tecnico Receiver with joint equalization and phase-noise estimation and corresponding method

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