CN107301993A - It is a kind of to increase the encapsulating structure and its manufacture craft of non-functional chip - Google Patents
It is a kind of to increase the encapsulating structure and its manufacture craft of non-functional chip Download PDFInfo
- Publication number
- CN107301993A CN107301993A CN201710426617.3A CN201710426617A CN107301993A CN 107301993 A CN107301993 A CN 107301993A CN 201710426617 A CN201710426617 A CN 201710426617A CN 107301993 A CN107301993 A CN 107301993A
- Authority
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- China
- Prior art keywords
- functional chip
- chip
- functional
- copper base
- encapsulating structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The present invention relates to a kind of encapsulating structure of increase non-functional chip, including：Copper base, with a relative top surface and a bottom surface；Functional chip, is configured above the top surface of the copper base or non-functional chip；Non-functional chip, is configured at the top, lower section or side of functional chip, wherein when non-functional chip is located at the lower section and side of functional chip, non-functional chip is connected with copper base；Gold thread, for linkage function chip and copper base；Insulating resin, for the encapsulated space of the encapsulating structure of above-mentioned increase non-functional chip to be filled into full, of the invention increases the encapsulating structure and manufacture craft of non-functional chip, in the technological process of production simply, so as to obtain the comparative advantages in cost, and the different package requirements of the thin chip for different-thickness, by adjusting the position of non-functional chip, size, the factors such as thickness, to solve the recycling of chip, profit maximization meets actual production and processing demand.
Description
Technical field
The invention belongs to the integrated antenna package technical field in microelectric technique, more particularly to a kind of increase non-functional
The encapsulating structure and manufacture craft of chip.
Background technology
With the development of modern technologies, in order to meet the requirement of different memory sizes, increasing packaged type is from 1D>
2D>4D>8D ..., and the chip used also more and more thinner, but current product appearance size is fixed, so by internal junction
After structure adjustment, need to design a kind of product package requirements that can solve to adapt to difference in functionality chip thickness, and product can be solved
The encapsulating structure and manufacture craft of angularity problem, so as to reach profit maximization and ensure packaging mechanism reliability.
The content of the invention
There is provided a kind of simple in construction the invention aims to overcome the deficiencies in the prior art, can adapt to difference in functionality
The demand of chip thickness, while solving the problems, such as the encapsulating structure of the increase non-functional chip of product angularity and making work
Skill.
To reach above-mentioned purpose, the technical solution adopted by the present invention is：It is a kind of to increase the encapsulating structure of non-functional chip, bag
Include：
Copper base, with a relative top surface and a bottom surface；
Functional chip, is configured above the top surface of the copper base or non-functional chip；
Non-functional chip, is configured at the top, lower section or side of functional chip, wherein non-functional chip is located at feature
When the lower section and side of chip, non-functional chip is connected with copper base；
Gold thread, for linkage function chip and copper base；
Insulating resin, for the encapsulated space of the encapsulating structure of above-mentioned increase non-functional chip to be filled into full.
The manufacture craft of the encapsulating structure of manufacture increase non-functional chip as claimed in claim 1, including following step
Suddenly：
The first step：Positive mask is carried out to functional chip and non-functional chip, the back side then is carried out to above-mentioned two chip
Grinding；
Second step：Back side pad pasting is carried out to the functional chip in the first step and non-functional chip, then by chip and NOT function
Positive mask on energy property chip is torn；
3rd step：Discrete component is respectively cut into functional chip in second step and non-functional chip；
4th step：The functional chip of discrete component is arranged on copper base by adhesive tape, gold thread is recycled by discrete component
Functional chip and copper base be weldingly connected, substrate or list are then arranged on by adhesive tape after the non-functional core of discrete component
On the functional chip of individual element；Or first the non-functional chip of single element is arranged on copper base by adhesive tape,
The functional chip of discrete component is welded on the non-functional chip of discrete component again, gold thread is recycled by functional chip
It is weldingly connected with copper base；
5th step：The encapsulating structure being made in 4th step is subjected to resins synthesis, then carries out planting ball or plating, finally it is entered
Row cutting.
Due to the utilization of above-mentioned technical proposal, the present invention has following advantages compared with prior art：
The encapsulating structure and manufacture craft of the increase non-functional chip of the present invention program, it is simple in the technological process of production,
It is non-functional by adjusting so as to obtain the comparative advantages in cost, and the different package requirements of the thin chip for different-thickness
The position of chip, size, the factor such as thickness, to solve the recycling of chip, profit maximization meets actual production and processing
Demand, with stronger practicality and promotional value.
Brief description of the drawings
Technical solution of the present invention is described further below in conjunction with the accompanying drawings：
Accompanying drawing 1 is the structural representation of embodiment one；
Accompanying drawing 2 is the structural representation of embodiment two；
Accompanying drawing 3 is the structural representation of embodiment three；
Wherein：1st, copper base；2nd, functional chip；3rd, non-functional chip；4th, adhesive tape.
Embodiment
Below in conjunction with the accompanying drawings and specific embodiment the present invention is described in further detail.
A kind of encapsulating structure of increase non-functional chip of the present invention, including：Copper base 1, with relative one
Top surface and a bottom surface；Functional chip 2, is configured at the top surface of the copper base 1 or the top of non-functional chip 3；Non-functional
Chip 3, is configured at the top, lower section or side of functional chip 3, wherein non-functional chip 3 is located under functional chip 2
When side and side, non-functional chip 3 is connected with copper base 1；Gold thread, for linkage function chip 2 and copper base 1；Insulation tree
Fat（Not shown in figure）, for the encapsulated space of the encapsulating structure of above-mentioned increase non-functional chip to be filled into full；Wherein, function
Linked together between property chip 2 and copper base 1, non-functional chip 3 and copper base 1 by adhesive tape 4.
Implement in one：The encapsulating structure for increasing non-functional chip is as shown in Figure 1：
Now, non-functional chip 3 is located at the top of functional chip 2, so not only can guarantee that functional chip 2 without angularity,
The demand of different encapsulating structures can also be met by adjusting the thickness and size of non-functional chip 3 simultaneously.
The manufacture craft of encapsulating structure of the manufacture as implemented the increase non-functional chip in one, comprises the following steps：The
One step：Positive mask is carried out to functional chip and non-functional chip, grinding back surface then is carried out to above-mentioned two chip；The
Two steps：Back side pad pasting is carried out to two chips in the first step, then the positive mask on above-mentioned two chip is torn；3rd
Step：Discrete component is respectively cut into functional chip and non-functional chip；4th step：The functional chip of discrete component
It is arranged on by adhesive tape on copper base, recycles gold thread that the functional chip and copper base of discrete component are weldingly connected, then
It is arranged on after the non-functional core of discrete component by adhesive tape on the functional chip of discrete component；5th step：By in the 4th step
Encapsulating structure carry out resins synthesis, then carry out planting ball or plating, finally it cut.
Implement in two：Increase the encapsulating structure of non-functional chip as shown in Fig. 2
Now non-functional chip 3 is arranged on the lower section of functional chip 2, because the small volume of functional chip 3, by adjusting
Functional chip 2 very easily can be arranged on copper base 1 by the thickness and size of section non-functional chip 3.
The manufacture craft of encapsulating structure of the manufacture as implemented the increase non-functional chip in two, comprises the following steps：The
One step：Positive mask is carried out to functional chip and non-functional chip, grinding back surface then is carried out to above-mentioned two chip；The
Two steps：Back side pad pasting is first carried out to two chips in the first step, then the positive mask of above-mentioned two chip is torn；3rd
Step：Discrete component is respectively cut into functional chip in second step and non-functional chip；4th step：First discrete component
Non-functional chip be arranged on by adhesive tape on copper base, then the feature core of discrete component is welded to the non-of discrete component
On functional chip, recycle gold thread that functional chip and copper base are weldingly connected；5th step：By the packaging machine in the 4th step
Structure carries out resins synthesis, then carries out planting ball or plating, finally it is cut.
Implement in three：The encapsulating structure for increasing non-functional chip is as shown in Figure 3:
Non-functional chip 3 is in the side of functional chip 2, and this is due to if simply single functional chip 2 and copper base 1
After connection, and now filler will be filled with encapsulating structure, and the non-functional being connected with copper base is set in the side of functional chip 2
Chip 3, is in order to which the filler of the both sides of assurance function chip 2 is evenly distributed.
The manufacture craft of encapsulating structure of the manufacture as implemented the increase non-functional chip in three, comprises the following steps：The
One step：Positive mask is carried out to functional chip and non-functional chip, grinding back surface then is carried out to above-mentioned two chip；The
Two steps：Back side pad pasting is carried out to two chips in the first step, then the positive mask on above-mentioned two chip is torn；3rd
Step：Discrete component is respectively cut into functional chip in second step and non-functional chip；4th step：First by discrete component
Non-functional chip set by adhesive tape on copper base, then the functional chip after discrete component is attached to positioned at single
Functional chip, is finally welded on copper base by the non-functional chip-side of element using gold thread；5th step：By the 4th step
In packaging mechanism resins synthesis, then carry out planting ball or plating, finally it cut.
The encapsulating structure and manufacture craft of the increase non-functional chip of the present invention, it is simple in the technological process of production,
It is non-functional by adjusting so as to obtain the comparative advantages in cost, and the different package requirements of the thin chip for different-thickness
The position of chip, size, the factor such as thickness, to solve the recycling of chip, profit maximization meets actual production and processing
Demand, with stronger practicality and promotional value.
It the above is only the concrete application example of the present invention, protection scope of the present invention be not limited in any way.It is all to use
Technical scheme formed by equivalent transformation or equivalent replacement, all falls within rights protection scope of the present invention.
Claims (2)
1. a kind of increase the encapsulating structure of non-functional chip, it is characterised in that including：
Copper base, with a relative top surface and a bottom surface；
Functional chip, is configured above the top surface of the copper base or non-functional chip；
Non-functional chip, is configured at the top, lower section or side of functional chip, wherein non-functional chip is located at feature
When the lower section and side of chip, non-functional chip is connected with copper base；
Gold thread, for linkage function chip and copper base；
Insulating resin, for the encapsulated space of the encapsulating structure of above-mentioned increase non-functional chip to be filled into full.
2. the manufacture craft of the encapsulating structure of manufacture increase non-functional chip as claimed in claim 1, it is characterised in that bag
Include following steps：
The first step：Positive mask is carried out to functional chip and non-functional chip, the back side then is carried out to above-mentioned two chip
Grinding；
Second step：Back side pad pasting is carried out to the functional chip in the first step and non-functional chip, then by chip and NOT function
Positive mask on energy property chip is torn；
3rd step：Discrete component is respectively cut into functional chip in second step and non-functional chip；
4th step：The functional chip of discrete component is arranged on copper base by adhesive tape, gold thread is recycled by discrete component
Functional chip and copper base be weldingly connected, substrate or list are then arranged on by adhesive tape after the non-functional core of discrete component
On the functional chip of individual element；Or first the non-functional chip of single element is arranged on copper base by adhesive tape,
The functional chip of discrete component is welded on the non-functional chip of discrete component again, gold thread is recycled by functional chip
It is weldingly connected with copper base；
5th step：The encapsulating structure being made in 4th step is subjected to resins synthesis, then carries out planting ball or plating, finally it is entered
Row cutting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710426617.3A CN107301993A (en) | 2017-06-08 | 2017-06-08 | It is a kind of to increase the encapsulating structure and its manufacture craft of non-functional chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710426617.3A CN107301993A (en) | 2017-06-08 | 2017-06-08 | It is a kind of to increase the encapsulating structure and its manufacture craft of non-functional chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107301993A true CN107301993A (en) | 2017-10-27 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710426617.3A Pending CN107301993A (en) | 2017-06-08 | 2017-06-08 | It is a kind of to increase the encapsulating structure and its manufacture craft of non-functional chip |
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Citations (9)
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| CN2805094Y (en) * | 2004-12-30 | 2006-08-09 | 威宇科技测试封装有限公司 | No-bed course, multiple-chip piling-up package structure |
| CN101150118A (en) * | 2006-09-21 | 2008-03-26 | 株式会社瑞萨科技 | Semiconductor device |
| CN101281924A (en) * | 2007-03-14 | 2008-10-08 | 英特尔公司 | Method, apparatus, and system for phase change memory packaging |
| CN102569101A (en) * | 2010-12-15 | 2012-07-11 | 南茂科技股份有限公司 | Outer pin-free packaging structure and manufacturing method thereof |
| CN102842556A (en) * | 2011-06-21 | 2012-12-26 | 万国半导体(开曼)股份有限公司 | Semiconductor component with dual surfaces exposed and manufacturing method of semiconductor component |
| CN103295920A (en) * | 2012-02-22 | 2013-09-11 | 江苏宏微科技有限公司 | Noninsulated type power module and packaging process thereof |
| CN103426839A (en) * | 2012-05-24 | 2013-12-04 | 联发科技股份有限公司 | Semiconductor package |
| CN104112678A (en) * | 2013-07-15 | 2014-10-22 | 广东美的制冷设备有限公司 | Manufacturing method for intelligent power module |
| CN104299918A (en) * | 2013-07-17 | 2015-01-21 | 英飞凌科技股份有限公司 | Method of packaging integrated circuits and a molded substrate with non-functional placeholders embedded in a molding compound |
-
2017
- 2017-06-08 CN CN201710426617.3A patent/CN107301993A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2805094Y (en) * | 2004-12-30 | 2006-08-09 | 威宇科技测试封装有限公司 | No-bed course, multiple-chip piling-up package structure |
| CN101150118A (en) * | 2006-09-21 | 2008-03-26 | 株式会社瑞萨科技 | Semiconductor device |
| CN101281924A (en) * | 2007-03-14 | 2008-10-08 | 英特尔公司 | Method, apparatus, and system for phase change memory packaging |
| CN102569101A (en) * | 2010-12-15 | 2012-07-11 | 南茂科技股份有限公司 | Outer pin-free packaging structure and manufacturing method thereof |
| CN102842556A (en) * | 2011-06-21 | 2012-12-26 | 万国半导体(开曼)股份有限公司 | Semiconductor component with dual surfaces exposed and manufacturing method of semiconductor component |
| CN103295920A (en) * | 2012-02-22 | 2013-09-11 | 江苏宏微科技有限公司 | Noninsulated type power module and packaging process thereof |
| CN103426839A (en) * | 2012-05-24 | 2013-12-04 | 联发科技股份有限公司 | Semiconductor package |
| CN104112678A (en) * | 2013-07-15 | 2014-10-22 | 广东美的制冷设备有限公司 | Manufacturing method for intelligent power module |
| CN104299918A (en) * | 2013-07-17 | 2015-01-21 | 英飞凌科技股份有限公司 | Method of packaging integrated circuits and a molded substrate with non-functional placeholders embedded in a molding compound |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20171027 |
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| RJ01 | Rejection of invention patent application after publication |