CN107293482A - A kind of preparation method of GaN high electron mobility transistor gate electrode - Google Patents

A kind of preparation method of GaN high electron mobility transistor gate electrode Download PDF

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CN107293482A
CN107293482A CN201710448653.XA CN201710448653A CN107293482A CN 107293482 A CN107293482 A CN 107293482A CN 201710448653 A CN201710448653 A CN 201710448653A CN 107293482 A CN107293482 A CN 107293482A
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gate electrode
thickness
grid
preparation
electron mobility
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CN107293482B (en
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孔欣
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Chengdu Hiwafer Technology Co Ltd
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Chengdu Hiwafer Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses a kind of preparation method of GaN high electron mobility transistor gate electrode:Grid line bar is defined using step-by-step exposure machine, contracting adhesive process is used again by grid line bar feature size downsizing, then, the silicon nitride medium under grid line bar opening is etched using fluorine base gas in ICP cavitys, photoresist is removed after the completion of etching, then even resist coating exposure obtains grid cover lines, and sputtering unit splash-proofing sputtering metal W is entered after pre-treatment, then take out and insert electron beam evaporation platform deposit Ni/Pt/Au, last stripped technique formation gate electrode.Method of the present invention is compared with the method that traditional use electron beam evaporation metal makes gate electrode, and the advantage is that can be effectively improved the side wall fillibility of grid metal, reduces element leakage, improves device reliability.

Description

A kind of preparation method of GaN high electron mobility transistor gate electrode
Technical field
Field, more particularly to a kind of GaN high electron mobility crystal are fabricated the present invention relates to compound semiconductor The preparation method of pipe gate electrode.
Background technology
GaN HEMTs (HEMT) distinctive high electron mobility, high two-dimensional electron gas surface density, high strike Wear electric field so that it possesses higher power output density, be considered as the preferred skill of RF/Microwave power amplifier of future generation Art.
With the sharp increase of field-effect transistor (FET) frequency applications demand, boost device cut-off frequency fTJust seem All the more it is important.
It is used as the important parameter for characterizing transistor high speed performance, device cut-off frequency fTApproximate formula be:
Wherein vsFor the saturation migration rate of carrier, LgIt is long for device gate.As can be seen that cutoff frequency of the grid length to device Rate has conclusive influence.
The grid length for reducing device is the most straightforward approach for lifting its frequency performance, generally, when target grid length is less than 0.5 μm When can consider to take T-shaped grid structure, its object is to reduce device gate it is long while increase gate resistance not too much.
Due to the particularity of gallium nitride device, one layer of Si can be grown before grid technique3N4Medium is used to protect surface, Suppress surface state.In subsequent grid technique, typically T-shaped grid can be made using the method for two step photoetching:First step photoetching is thin Lines are used to etch Si3N4, while defining the long size of grid;Second step photoetching is using negtive photoresist or reversion glue, for defining grid cover and passing through Stripping technology formation gate electrode.
Such scheme is primarily present following deficiency:The lines that the usual first step makes by lithography are very thin, below 0.5 μm, this When etch the Si of 100nm or so depth still further below3N4Medium, due to lines perforate very little, but also with certain depth, is just caused Conventional evaporation technology makes it difficult for metal to be filled up completely with the groove, and to there is reliability hidden for the device that not exclusively frequently can lead to of filling Suffer from.
The content of the invention
The present invention's fills incomplete problem mainly for grid metal in GaN high electron mobility transistor, proposes A kind of preparation method of GaN high electron mobility transistor gate electrode.
The technical solution adopted by the present invention is:A kind of preparation method of GaN high electron mobility transistor gate electrode, Comprise the following steps:
Step 1:GaN HEMT device surface passivation a layer thickness after having completed source-drain electrode and isolation technology at one ForSi3N4Medium, and high light sensation positive photoresist is coated thereon, using 100 DEG C of vacuum hot plates, toast 90s;
Step 2:Exposed, developed using stepper, the fine rule of minimum 0.4 μm of characteristic size is obtained after development Bar, toasts 60-120s under the conditions of 110-130 DEG C;
Step 3:Complete after above-mentioned steps, the uniform coating contracting glue in described GaN HEMT devices, and in 80-90 DEG C of bar Front baking 60-90s under part, it is again rear under the conditions of 100-120 DEG C afterwards to dry 60-90s;After baking is finished, cleaned, gone using ionized water Except unnecessary contracting glue, continue to toast 30-60s under the conditions of 110-120 DEG C, obtain the grid-type bar of 0.2-0.3 μm of width, and withSpeed complete the operation of bottoming glue, the time is 20-30s;
Step 4:CF is used in sense coupling machine4Etch Si3N4, the speed of bottoming glue isTime is 20-30s;And 1-2min is cleaned with 10%HCl solution, removed photoresist;
Step 5:Uniform coating negtive photoresist, 2.0-2.5 μm of thickness, then photoetching grid cover lines, the width of grid cover is 0.8-1.5 μ m;
Step 6:At the lines of photoetching deposit gate metal, the gate metal sequentially consist of W, Ni, Pt, Au, wherein, W is made using sputtering technology, and thickness 30-40nm, Ni/Pt/Au are made using electron beam evaporation process, thickness point It is not:Ni thickness 40-60nm, Pt thickness 40-60nm, Au thickness 400-600nm, and shelled using 90 DEG C of methylpyrrolidone solutions From 30-60min.
Preferably, the gate metal is T-shaped grid, and its metal purity must reach 5N ranks or more excellent.
Preferably, the contracting glue can react generation polymer with photoresist surface, and the part not reacted is then It is washable to remove, the characteristic size to reduce lines.
Preferably, by controlling high light sensation positive photoresist angle and sense coupling machine engraving to lose in the step 4 Bias power, can control Si3N4The angle of groove.
The situation of prior art is different from, the beneficial effects of the invention are as follows:
1st, the present invention makes layer of metal W before grid metal evaporation by the way of sputtering, can significantly improve existing skill Art grid metal is to Si3N4Groove fills incomplete problem, because W adhesive capacities are moderate, does not interfere with stripping;
2nd, W metal work functions 4.5eV, it is suitable with Ni 4.6V, possess larger work function so as to semiconductor surface shape Into higher potential barrier, there will not be considerable influence to Schottky barrier.
3rd, gate metal oxidation resistance is strong, is oxidized when can avoiding switching between sputtering and evaporation equipment, Its adhesion is moderate, can avoid causing to peel off difficult situation.
4th, Si is etched3N4Medium is that, using high light sensation positive photoresist as mask, due to using ICP-RIE etching systems, selectivity is very It is good.
Brief description of the drawings
Fig. 1 be wafer it is even apply high photosensitive positive photoresist and expose, develop after structure chart;
Fig. 2 is the structural representation after contracting glue and high photosensitive positive photoresist reaction generation polymer, down feature sizes;
Fig. 3 is the etching Si in sense coupling machine (ICP-RIE)3N4The device architecture formed after medium Schematic diagram;
Fig. 4 is the structure chart after even painting negtive photoresist and photoetching, development;
Fig. 5 is gate metal sputtering, evaporates and peel off the device junction composition to be formed after gate electrode
Fig. 6 is gate metal structural representation.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation is described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.It is based on Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made Embodiment, belongs to the scope of protection of the invention.
A kind of preparation method of GaN high electron mobility transistor gate electrode, comprises the following steps:
As shown in figure 1, the GaN HEMT device surface passivation thickness after having completed source-drain electrode and isolation technology at one ForSi3N4Medium 2, and high light sensation positive photoresist is coated thereon, using 100 DEG C of vacuum hot plates, toast 90s; Then stepper exposure imaging is used, 60-120s is toasted under the conditions of 110-130 DEG C, development obtains characteristic size and is 0.4-0.7 μm of hachure;
Complete after above-mentioned steps, as shown in Fig. 2 in uniform coating contracting glue, and the front baking 60- under the conditions of 80-90 DEG C thereon 90s, it is again rear under the conditions of 100-120 DEG C afterwards to dry 60-90s, after baking is finished;Occur at a certain temperature with photoresist surface Reaction generation polymer 1, the part not reacted is then washable to be removed, and continues to toast 30-60s under the conditions of 110-120 DEG C, Obtain the grid-type bar of 0.2-0.3 μm of width, and withSpeed, carry out 20-30s bottoming glue operation, can with this With by the feature size downsizing of lines;
Complete after above-mentioned steps, CF is used in sense coupling machine (ICP-RIE)4Etch Si3N4It is situated between Matter, etch rate is 20-30nm/min, etch period 5-8min, and cleans 1-2min with 10%HCl solution, is removed photoresist, and is formed such as Device architecture shown in Fig. 3;
Uniform coating thickness is 2-2.5 μm of negtive photoresist, then the grid cover lines that photoetching width is 0.8-1.5 μm, forms such as Fig. 4 Shown structure;
Complete after above-mentioned steps, as shown in figure 5, gate metal 4 is deposited at the lines of photoetching, the gate metal 4 Structure is as shown in fig. 6, the gate metal 4 is T-shaped grid, and its metal purity must reach 5N ranks or more excellent, and gate metal 4 is under It is supreme to be followed successively by tungsten (W) 41, nickel (Ni) 42, platinum (Pt) 43, gold (Au) 44, wherein, W is made using sputtering technology, thickness 30- 40nm, Ni/Pt/Au are made using electron beam evaporation process, and thickness is respectively:Ni thickness 40-60nm, Pt thickness 40-60nm, Au Thickness 400-600nm, and 30-60min is peeled off using methylpyrrolidone solution, complete element manufacturing.
Embodiments of the invention are the foregoing is only, are not intended to limit the scope of the invention, it is every to utilize this hair Equivalent structure or equivalent flow conversion that bright specification and accompanying drawing content are made, or directly or indirectly it is used in other related skills Art field, is included within the scope of the present invention.

Claims (4)

1. a kind of preparation method of GaN high electron mobility transistor gate electrode, comprises the following steps:
Step 1:GaN HEMT device surface passivation a layer thickness after source-drain electrode and isolation technology has been completed at one isSi3N4Medium, and high light sensation positive photoresist is coated thereon, using 100 DEG C of vacuum hot plates, toast 90s;
Step 2:Exposed, developed using stepper, the hachure of minimum 0.4 μm of characteristic size is obtained after development, 60-120s is toasted under the conditions of 110-130 DEG C;
Step 3:Complete after above-mentioned steps, the uniform coating contracting glue in described GaN HEMT devices, and under the conditions of 80-90 DEG C Front baking 60-90s, it is again rear under the conditions of 100-120 DEG C afterwards to dry 60-90s;After baking is finished, cleaned, removed many using ionized water Remaining contracting glue, continues to toast 30-60s under the conditions of 110-120 DEG C, obtains the grid-type bar of 0.2-0.3 μm of width, and withSpeed complete the operation of bottoming glue, the time is 20-30s;
Step 4:CF is used in sense coupling machine4Etch Si3N4, the speed of bottoming glue is Time is 20-30s;And 1-2min is cleaned with 10%HCl solution, removed photoresist;
Step 5:Uniform coating negtive photoresist, 2.0-2.5 μm of thickness, then photoetching grid cover lines, the width of grid cover is 0.8-1.5 μm;
Step 6:Gate metal is deposited at the lines of photoetching, the gate metal sequentially consists of W, Ni, Pt, Au, its In, W is made using sputtering technology, and thickness 30-40nm, Ni/Pt/Au are made using electron beam evaporation process, and thickness is respectively: Ni thickness 40-60nm, Pt thickness 40-60nm, Au thickness 400-600nm, and peel off 30- using 90 DEG C of methylpyrrolidone solutions 60min。
2. the preparation method of GaN high electron mobility transistor gate electrode according to claim 1, it is characterised in that: The gate metal is T-shaped grid, and its metal purity must reach 5N ranks or more excellent.
3. the preparation method of GaN high electron mobility transistor gate electrode according to claim 1, it is characterised in that: The contracting glue can be reacted generation polymer with photoresist surface, and the part not reacted is then washable to be removed, and is used to Reduce the characteristic size of lines.
4. the preparation method of GaN high electron mobility transistor gate electrode according to claim 1, it is characterised in that: The step 4 can be controlled by controlling high light sensation positive photoresist angle and sense coupling machine engraving to lose bias power Si3N4The angle of groove.
CN201710448653.XA 2017-06-14 2017-06-14 Method for manufacturing gate electrode of gallium nitride high electron mobility transistor Active CN107293482B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110429028A (en) * 2019-08-01 2019-11-08 福建省福联集成电路有限公司 A kind of transistor device is enhanced and depletion type grid integrated manufacturing method and device
CN110581170A (en) * 2019-08-13 2019-12-17 中山市华南理工大学现代产业技术研究院 GaN-based MIS-HEMT device with Г type gate and preparation method thereof
CN112002641A (en) * 2020-07-21 2020-11-27 中电科工程建设有限公司 Method for manufacturing grid of GaN power device for 5G communication
CN112335023A (en) * 2018-06-27 2021-02-05 三菱电机株式会社 Method for manufacturing semiconductor device

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US6395606B1 (en) * 1999-07-21 2002-05-28 Advanced Micro Devices, Inc. MOSFET with metal in gate for reduced gate resistance
CN101162703A (en) * 2006-10-12 2008-04-16 株式会社半导体能源研究所 Method for manufacturing display device, and etching apparatus
CN101431867A (en) * 2007-11-05 2009-05-13 松下电器产业株式会社 Mounting structure
CN105097910A (en) * 2015-07-14 2015-11-25 工业和信息化部电子第五研究所 Gate electrode of gallium nitride-based high-electron-mobility transistor
CN106783570A (en) * 2016-12-28 2017-05-31 成都海威华芯科技有限公司 A kind of preparation method of the T-shaped grid of HEMT

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6395606B1 (en) * 1999-07-21 2002-05-28 Advanced Micro Devices, Inc. MOSFET with metal in gate for reduced gate resistance
CN101162703A (en) * 2006-10-12 2008-04-16 株式会社半导体能源研究所 Method for manufacturing display device, and etching apparatus
CN101431867A (en) * 2007-11-05 2009-05-13 松下电器产业株式会社 Mounting structure
CN105097910A (en) * 2015-07-14 2015-11-25 工业和信息化部电子第五研究所 Gate electrode of gallium nitride-based high-electron-mobility transistor
CN106783570A (en) * 2016-12-28 2017-05-31 成都海威华芯科技有限公司 A kind of preparation method of the T-shaped grid of HEMT

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112335023A (en) * 2018-06-27 2021-02-05 三菱电机株式会社 Method for manufacturing semiconductor device
CN110429028A (en) * 2019-08-01 2019-11-08 福建省福联集成电路有限公司 A kind of transistor device is enhanced and depletion type grid integrated manufacturing method and device
CN110581170A (en) * 2019-08-13 2019-12-17 中山市华南理工大学现代产业技术研究院 GaN-based MIS-HEMT device with Г type gate and preparation method thereof
CN112002641A (en) * 2020-07-21 2020-11-27 中电科工程建设有限公司 Method for manufacturing grid of GaN power device for 5G communication

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