CN102306626B - Semiconductor heterojunction field effect transistor grid structure preparation method - Google Patents
Semiconductor heterojunction field effect transistor grid structure preparation method Download PDFInfo
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- CN102306626B CN102306626B CN 201110266824 CN201110266824A CN102306626B CN 102306626 B CN102306626 B CN 102306626B CN 201110266824 CN201110266824 CN 201110266824 CN 201110266824 A CN201110266824 A CN 201110266824A CN 102306626 B CN102306626 B CN 102306626B
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Abstract
The invention provides a semiconductor heterojunction field effect transistor grid structure preparation method, and relates to the microelectronic device preparation field. The method comprises the following steps: (1) pasting positive photoresist on a GaN-based semiconductor heterostructure which is provided with a source electrode and a drain electrode; (2) carrying out micropattern on the photoresist with exposure and development technology, and leaving an appropriate area to prepare an MgO mask layer; (3) depositing an MgO film; (4) peeling the photoresist, and leaving the MgO film which is directly deposited on a substrate as a mask layer; (5) depositing a ferroelectric oxide thin layer and a metal layer in order; (6) peeling the MgO mask layer, and leaving the ferroelectric oxide thin layer and the metal layer which are directly deposited on the substrate as the semiconductor heterojunction field effect transistor grid structure. The preparation method in the invention is simple, damage to the GaN-based semiconductor heterostructure is small, and influence on device performance is small.
Description
Technical field
The present invention relates to the microelectronic component preparation field, be specifically related to adopt MgO to prepare the technology of metal/ferroelectric oxide/GaN base semiconductor HFET grid structure as mask.
Background technology
The GaN semiconductor is typical third generation wide bandgap semiconductor, has the characteristics such as energy gap is large, disruptive field intensity is high, thermal conductivity is large, carrier mobility is high, capability of resistance to radiation is strong, has a wide range of applications at microelectronic.The GaN base semiconductor can form solid solution, can realize that by the component proportion of regulating III family's element such as Al the solid solution energy gap is adjustable continuously in the 1.9-6.2eV scope.The GaN base semiconductor has certain piezoelectric polarization and spontaneous polarization, can form at the interface two-dimensional electron gas (2DEG) when forming heterostructure.As forming surface density up to 10 in plain situation in the AlGaN/GaN heterojunction
13cm
-2Two-dimensional electron gas, its mobility can reach 1500cm
2/ (Vs).Therefore, the GaN base semiconductor at high frequency, at a high speed, the high-power electronic device field has broad application prospects.Although the GaN base semiconductor has good electric property, still have numerous physical mechanisms to need further research.One of the most significant problem is exactly the grid leakage current of GaN base field-effect device.Research is found, adopts the MOSFET structure can significantly reduce the grid leakage current of GaN base field-effect device, plays a very important role improving performance of devices.Medium of oxides material commonly used mostly is SiO at present
2, Al
2O
3, HfO
2Deng dielectric constant less than 20 low-k materials.Along with constantly dwindling of device volume, require gate dielectric layer equivalent oxide thickness (EOT) more and more less, the gate dielectric material k value of employing is higher.
The ferroelectric oxide material is the oxide material that a class has broad prospect of application.Ferroelectric oxide material commonly used mainly contains Ferroelectrics, laminated perovskite Ferroelectric body and lithium niobate Ferroelectric body.The Ferroelectrics general formula is ABO
3, wherein the A element is generally Mg, Ca, Sr, Ba, Pb, Bi or La etc., and the B element is generally Ti, Zr, Fe, Ru or Ni etc.Laminated perovskite Ferroelectric body is the composite oxides that Bi layer and perovskite-like layer alternately form, and its general formula is (Bi
2O
2)
2+(A
m-1B
mO
3m+1)
2-, wherein the A element is generally Bi, Ba, Sr, Ca, Pb, K or Na etc., and the B element is generally Ti, Nb, Ta, Mo, W or Fe etc.Lithium niobate Ferroelectric body mainly contains LiNbO
3And LiTaO
3Deng.The ferroelectric oxide material has high dielectric constant, can satisfy device miniaturization to the requirement of gate dielectric layer equivalent oxide layer thickness.The abundant physical characteristics such as that the ferroelectric oxide material also has is ferroelectric, piezoelectricity, pyroelectricity.With the gate dielectric layer formation MFSFET structure of ferroelectric oxide material as GaN base semiconductor MOSFET device, the turnover iron electric polarization of ferroelectric oxide material can exert an influence to the two-dimensional electron gas transport property of GaN base semiconductor heterostructure.Further, the interface charge that the characteristics such as the piezoelectricity of ferroelectric oxide material, pyroelectricity produce in the MFSFET structure may change the two-dimensional electron gas of GaN base semiconductor heterostructure by the transfer function at interface, make it to change with applied stress, the isoparametric variation of temperature.These coupling effects can be used as the devices such as preparation voltage sensitive sensor, temperature sensor, also may strengthen the performance of GaN base semiconductor heterostructure.Therefore, adopt the ferroelectric oxide material to have broad application prospects in field of electronic devices as the gate dielectric layer of GaN base semiconductor MOSFET device.
Adopt the ferroelectric oxide material need to carry out pattern to the ferroelectric oxide film as the gate dielectric layer of GaN base semiconductor MOSFET device.The pattern of ferroelectric oxide film generally adopts the method for dry etching.But with these ferroelectric oxide materials and GaN base semiconductor heterostructure integrated after, when adopting dry etching to carry out pattern to the ferroelectric oxide material, be difficult to grasp suitable etching condition, easily to GaN base semiconductor heterostructure injury, thereby reduce performance of devices.Therefore, seek the method for a kind of suitable making metal/ferroelectric oxide/GaN base semiconductor HFET grid structure, be of great significance for the practical application tool of device.
Summary of the invention
Technical problem to be solved by this invention is, the method for a kind of making metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure is provided, and wherein the grid structure comprises ferroelectric oxide thin layer and metal level.
The technical scheme that the present invention solve the technical problem employing is that the preparation method of heterogeneous semiconductor junction field effect transistor grid structure comprises the steps:
(1) apply positive photoresist having made on the GaN base semiconductor heterostructure of source electrode and drain electrode;
(2) by exposure and developing process, photoresist is carried out pattern, stay suitable zone and make the MgO mask;
(3) deposition MgO film;
(4) stripping photoresist, the MgO film on stripping photoresist simultaneously, stay Direct precipitation at on-chip MgO film as mask;
(5) deposit successively ferroelectric oxide thin layer and metal level;
(6) peel off the MgO mask, peel off simultaneously ferroelectric oxide thin layer and metal level on the MgO mask, stay Direct precipitation in on-chip ferroelectric oxide thin layer and the metal level grid structure as the heterojunction semiconductor field effect transistor.
Further, the positive photoresist thickness that applies in step (1) is 2～3 μ m.Adopt the method for evaporation, sputter or pulsed laser deposition to deposit at ambient temperature the MgO film in step (3), keeping growth room's vacuum keep in deposition process is 1 * 10
-3～1 * 10
-4Pa, the MgO film thickness of deposition is at 500～800nm.
In step (5), described ferroelectric oxide is Ferroelectrics, laminated perovskite Ferroelectric body or lithium niobate Ferroelectric body.
More specifically, in step (5), described ferroelectric oxide is Ferroelectrics, and its general formula is ABO
3, wherein A represents Mg, Ca, Sr, Ba, Pb, Bi or La, B represents Ti, Zr, Fe, Ru or Ni;
Calculate with A element, B element and oxygen element mol ratio, stoicheiometry satisfies (A
1+ A
2+ ... + A
n): (B
1+ B
2+ ... + B
n): O=1: 1: 3,
A wherein
1, A
2, A
nDifferent element in the element of expression A representative,
B
1, B
2, B
nDifferent element in the element of expression B representative.
Perhaps, in step (5), described ferroelectric oxide is laminated perovskite Ferroelectric body, and general formula is (Bi
2O
2)
2+(Q
m-1R
mO
3m+1)
2-, wherein the Q element is Bi, Ba, Sr, Ca, Pb, K or Na, the R element is Ti, Nb, Ta, Mo, W or Fe.[wherein m is the ligancy greater than 1, keeps the chemical valence of ionic group to be-divalent]
Perhaps, in step (5), described ferroelectric oxide is lithium niobate Ferroelectric body, comprises LiNbO
3Or LiTaO
3
Metal level in step (5) is Ni, Au or Pt.
The invention has the beneficial effects as follows: the present invention uses MgO as the grid structure of mask fabrication metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe first, there is not yet report both at home and abroad.Because the general method of dry etching that adopts is carried out pattern to the ferroelectric oxide material, when making metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe, easily to GaN base semiconductor heterostructure injury, thereby destroy performance of devices.And adopt method of the present invention, utilize MgO to make the grid structure of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe as mask, the preparation method is simple, and less to the damage of GaN base semiconductor heterostructure, can not cause too much influence to performance of devices.
The present invention is further illustrated below in conjunction with the drawings and specific embodiments.
Description of drawings:
Fig. 1 is the device schematic diagram of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe.
Fig. 2 is for using MgO as the process chart of mask fabrication metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure.
Fig. 3 is the metal/LiNbO that makes according to the present invention
3The device schematic diagram of/GaN base semiconductor hetero junction field effect pipe.
Fig. 4 (a) and Fig. 4 (b) are respectively metal/LiNbO
3Output characteristic curve and the transfer characteristic curve of/GaN base semiconductor hetero junction field effect tube device.
Embodiment
Fig. 1 is the device schematic diagram of metal/ferroelectric oxide of making according to the present invention/GaN base semiconductor hetero junction field effect pipe.With regard to Fig. 1, the metal/ferroelectric oxide of present embodiment/GaN base semiconductor hetero junction field effect pipe has following part altogether:
(1) Al
2O
3Or SiC substrate 10;
(2) ground floor is that energy gap is GaN base semiconductor film 11;
The AlGaN base semiconductor film 12 of the more large band gap of (3) growing on above-mentioned ground floor GaN base semiconductor film;
(4) the source electrode 13 and the drain electrode 14 that form on above-mentioned second layer GaN base semiconductor film;
(5) in the grid structure that forms between source electrode and gate electrode on above-mentioned second layer GaN base semiconductor film, the grid structure comprises ferroelectric oxide layer 15 and grid metal level 16.
Further, substrate is Al
2O
3Or AlGaN/GaN epitaxial wafer on the SiC substrate, form two-dimensional electron gas at AlGaN and GaN.Source electrode and drain electrode and GaN base semiconductor heterostructure form ohmic contact.Ferroelectric oxide can be Ferroelectrics, laminated perovskite Ferroelectric body and lithium niobate Ferroelectric body.
The Ferroelectrics general formula is ABO
3, wherein the A element represents Mg, Ca, Sr, Ba, Pb, Bi or La etc., the B element represents Ti, Zr, Fe, Ru or Ni etc.Calculate with A element, B element and oxygen element mol ratio, stoicheiometry satisfies (A
1+ A
2+ ... + An): (B
1+ B
2+ ... + Bn): O=1: 1: 3.
If adopt laminated perovskite Ferroelectric body (composite oxides that Bi layer and perovskite-like layer alternately form), its general formula is (Bi
2O
2)
2+(Q
m-1R
mO
3m+1)
2-, wherein the Q element represents Bi, Ba, Sr, Ca, Pb, K or Na etc., the R element represents Ti, Nb, Ta, Mo, W or Fe etc.
Also can adopt lithium niobate Ferroelectric body, mainly comprise LiNbO
3And LiTaO
3Deng.
Aforementioned A
1, A
2, A
nDifferent element in the element of expression A representative,
B
1, B
2, B
nDifferent element in the element of expression B representative.For example, B
1, B
2, B
3, B
4Represent respectively Ti, Zr, Fe, Ru, with B
1, B
2... B
nForm represent the element that each are different.A
1, A
2... A
nForm as the same.
Fig. 2 is for adopting MgO as the process chart of mask fabrication metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure.Substrate 20 comprises that the required substrate of growing GaN base semiconductor film is (as Si, Al
2O
3, the substrate such as SiC, GaN or AlN), the parts such as ground floor GaN base semiconductor film and second layer GaN base semiconductor film.
As embodiment 1, the detailed process of whole technological process is as follows:
(a) apply positive photoresist 21 on substrate 20, the thickness of photoresist is in 2-3 μ m left and right.The substrate that has applied photoresist is carried out soft baking, to remove the solvent in photoresist.Typical soft baking condition be on hot plate 90 ℃ to 100 ℃ the baking 30 seconds.After soft baking is completed, on cold drawing, substrate is lowered the temperature.
(b) photoresist exposed and develop.Mask is aimed at the on-chip tram that has applied photoresist, with mask and substrate exposure, thereby the figure on mask plate is transferred on the substrate that has applied photoresist.Can adopt ultraviolet photoetching technology or electron beam lithography that photoresist is exposed.Adopt developer to carry out development operation to substrate after exposure, produce figure in the photoresist of substrate surface.Substrate surface leaves the zone of photoresist for making afterwards the zone of grid structure, i.e. photoresist 21A.After development is completed, dry after substrate is rinsed with deionized water (DI), and carry out post bake and cure on hot plate.Typical post bake baking conditions is 100 ℃ to 120 ℃ baking 60s on hot plate.Cure complete after, on cold drawing, substrate is lowered the temperature.
(c) deposition MgO film 22 and 22A on substrate.MgO can adopt evaporation (Evaporation), pulsed laser deposition (Pulsed Laser Deposition, PLD), and the method for manufacturing thin film such as sputter (Sputtering) deposit at ambient temperature.Keeping growth room's vacuum keep in deposition process is 1 * 10
-3Pa.The MgO thickness of deposition is at 800nm.
(d) adopt the liquid that removes photoresist that photoresist 21A is removed photoresist.When peeling off photoresist 21A, the MgO film 22 on photoresist also can be stripped from, thereby realizes the pattern to the MgO film.After namely can be used as, makes the MgO film 22A that substrate surface stays the mask of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure.The liquid that removes photoresist that uses must satisfy not the condition that can impact the MgO film.For positive photoresist, as AZ6112 etc., can use the reagent such as acetone and 1-METHYLPYRROLIDONE to remove, and can not affect the MgO film.
(e) deposit successively ferroelectric oxide thin layer 23 and 23A and metal level 24 and 24A on substrate.The deposition of ferroelectric oxide thin layer can adopt conventional sull preparation method to prepare.Metal level adopts the method for electron beam evaporation to prepare.
(f) remove MgO film 22A.Use suitable solution removal MgO film 22A, ferroelectric oxide thin layer 23 and the metal level 24 that will be deposited on simultaneously on film are peeled off, thus the grid structure that the ferroelectric oxide thin layer 23A that stays at substrate surface and metal level 24A are metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe.Wherein metal level 24A is the grid metal level.The solution of removing MgO must satisfy not the condition that can impact ferroelectric oxide thin layer and metal level.Adopt oxalic acid, acetic acid or concentrated ammonia liquor etc. to remove to the MgO film.This several solns generally can not impact the ferroelectric oxide film.The grid metal of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe adopts the corrosion resistant metal materials such as Ni, Au and Pt usually, and oxalic acid, acetic acid or concentrated ammonia liquor are limited to these corrosion of metal effects, therefore also can not cause too much influence.
As another embodiment, be with the difference of embodiment 1, in step (c), vacuum degree is 1 * 10
-4Pa.The MgO thickness of deposition is in the 500nm left and right.
Fig. 3 is the metal/LiNbO that makes according to the present invention
3The device schematic diagram of/GaN base semiconductor hetero junction field effect pipe.With regard to Fig. 3, the metal/LiNbO of present embodiment
3/ GaN base semiconductor hetero junction field effect pipe has following part altogether:
(1) Al
2O
3Substrate 10;
(2) at Al
2O
3The thickness of growing on substrate is the GaN layer of 2 μ m.The lattice constant a of GaN
1=0.3189nm, energy gap Eg
1=3.42eV.
The thickness of (3) growing on above-mentioned GaN layer is the Al of 20nm
0.3Ga
0.7The N layer.Al
0.3Ga
0.7The lattice constant a of N
2=0.3166nm, energy gap Eg
2=4.02eV.Al
0.3Ga
0.7N layer and GaN form Al
0.3Ga
0.7N/GaN heterojunction and at the spontaneous generation two-dimensional electron gas in GaN layer limit at the interface.
(4) at above-mentioned Al
0.3Ga
0.7The source electrode 13 that forms on the N layer and drain electrode 14; Typical Al
0.3Ga
0.7The source electrode for preparing on the N/GaN heterojunction and very Ti (20nm)/Al (50nm)/Ti (the 20nm)/Au (200nm) that leaks electricity, and at 800 ℃, under blanket of nitrogen, short annealing is 60 seconds, to realize source electrode and drain electrode and Al
0.3Ga
0.7Form ohmic contact between the N/GaN heterojunction.
(5) at above-mentioned Al
0.3Ga
0.7The grid structure that forms between source electrode and gate electrode on the N layer, the grid structure comprises LiNbO
3Layer 15 and grid metal level 16.LiNbO
3The preparation of employing pulsed laser deposition.Preparation condition is 600 ℃ of growth temperatures, oxygen atmosphere 20Pa.Film thickness 300nm.The grid metal level is Ni (20nm)/Au (200nm), adopts the electron-beam vapor deposition method preparation.
Fig. 4 (a) is the metal/LiNbO of above-mentioned preparation
3The output characteristic curve of/GaN base semiconductor hetero junction field effect tube device.Fig. 4 (b) is the metal/LiNbO of above-mentioned preparation
3The transfer characteristic curve of/GaN base semiconductor hetero junction field effect tube device.Result shows: the device by the preparation of MgO mask method has good field effect feature.
Therefore the depositing temperature of ferroelectric oxide film can not adopt photoresist as film being carried out the mask of pattern generally all at 400-800 ℃.MgO is a kind of inorganic compound, and its fusing point is 2852 ℃, can not flow under the depositing temperature of common ferroelectric oxide film, the phenomenons such as distortion, decomposition.And MgO can be at an easy rate by oxalic acid, acetic acid (CHCOOH) or concentrated ammonia liquor (NH as a kind of pair of property oxide
4Cl) corrode and peel off.Therefore MgO is suitable as the mask that ferroelectric thin film is carried out pattern.The present invention proposes to adopt MgO as mask thus, makes the preparation method of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure, and this is inventive point of the present invention place.
Claims (9)
1. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure, is characterized in that, comprises the steps:
(1) apply positive photoresist having made on the GaN base semiconductor heterostructure of source electrode and drain electrode;
(2) by exposure and developing process, photoresist is carried out pattern, stay suitable zone and make the MgO mask;
(3) deposition MgO film;
(4) stripping photoresist, the MgO film on stripping photoresist simultaneously, stay Direct precipitation at on-chip MgO film as mask;
(5) deposit successively ferroelectric oxide thin layer and metal level;
(6) peel off the MgO mask, peel off simultaneously ferroelectric oxide thin layer and metal level on the MgO mask, stay Direct precipitation in on-chip ferroelectric oxide thin layer and the metal level grid structure as the heterojunction semiconductor field effect transistor.
2. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, the positive photoresist thickness that applies in step (1) is 2～3 μ m.
3. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, it is characterized in that, adopt the method for evaporation, sputter or pulsed laser deposition to deposit at ambient temperature the MgO film in step (3), keeping growth room's vacuum keep in deposition process is 1 * 10
-3～1 * 10
-4Pa, the MgO film thickness of deposition is at 500～800nm.
4. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, in step (5), described ferroelectric oxide is Ferroelectrics or lithium niobate Ferroelectric body.
5. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, in step (5), described ferroelectric oxide is laminated perovskite Ferroelectric body.
6. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, in step (5), described ferroelectric oxide is Ferroelectrics, and its general formula is ABO
3, wherein A represents Mg, Ca, Sr, Ba, Pb, Bi or La, B represents Ti, Zr, Fe, Ru or Ni;
Calculate with A element, B element and oxygen element mol ratio, stoicheiometry satisfies (A
1+ A
2+ ... + A
n): (B
1+ B
2+ ... + B
n): O=1:1:3,
A wherein
1, A
2, A
nDifferent element in the element of expression A representative,
B
1, B
2, B
nDifferent element in the element of expression B representative.
7. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, in step (5), described ferroelectric oxide is laminated perovskite Ferroelectric body, and general formula is (Bi
2O
2)
2+(Q
m-1R
mO
3m+1)
2-, wherein the Q element is Bi, Ba, Sr, Ca, Pb, K or Na, the R element is Ti, Nb, Ta, Mo, W or Fe; Wherein m is the ligancy greater than 1, keeps the chemical valence of ionic group to be-divalent.
8. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, in step (5), described ferroelectric oxide is lithium niobate Ferroelectric body, comprises LiNbO
3Or LiTaO
3
9. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1, is characterized in that, the metal level in step (5) is Ni, Au or Pt.
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| CN104409463A (en) * | 2014-11-09 | 2015-03-11 | 北京工业大学 | Optical detector for modulating channel current based on HEMT (High Electron Mobility Transistor) structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1165583A (en) * | 1995-08-24 | 1997-11-19 | 索尼株式会社 | Laminate for forming ohmic electrode and ohmic electrode |
| CN101330010A (en) * | 2007-06-20 | 2008-12-24 | 中国科学院微电子研究所 | Method for preparing T type HBT emitter electrode/HEMT gate |
| CN101916719A (en) * | 2010-07-17 | 2010-12-15 | 厦门大学 | Method for adjusting Schottky contact barrier height of metal and N-type germanium |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01166556A (en) * | 1987-12-23 | 1989-06-30 | Hitachi Ltd | N-type gaas ohmic electrode and formation thereof |
| JP3180501B2 (en) * | 1993-03-12 | 2001-06-25 | ソニー株式会社 | Method of forming ohmic electrode |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1165583A (en) * | 1995-08-24 | 1997-11-19 | 索尼株式会社 | Laminate for forming ohmic electrode and ohmic electrode |
| CN101330010A (en) * | 2007-06-20 | 2008-12-24 | 中国科学院微电子研究所 | Method for preparing T type HBT emitter electrode/HEMT gate |
| CN101916719A (en) * | 2010-07-17 | 2010-12-15 | 厦门大学 | Method for adjusting Schottky contact barrier height of metal and N-type germanium |
Non-Patent Citations (2)
| Title |
|---|
| JP平1-166556A 1989.06.30 |
| JP特开平6-267887A 1994.09.22 |
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