CN102306626A - Method for preparing gate structure of semiconductor heterojunction field effect transistor - Google Patents
Method for preparing gate structure of semiconductor heterojunction field effect transistor Download PDFInfo
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- CN102306626A CN102306626A CN201110266824A CN201110266824A CN102306626A CN 102306626 A CN102306626 A CN 102306626A CN 201110266824 A CN201110266824 A CN 201110266824A CN 201110266824 A CN201110266824 A CN 201110266824A CN 102306626 A CN102306626 A CN 102306626A
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- 230000005669 field effect Effects 0.000 title claims abstract description 37
- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 44
- 229910052751 metal Inorganic materials 0.000 claims abstract description 44
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- 238000002360 preparation method Methods 0.000 claims abstract description 24
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 230000008569 process Effects 0.000 claims abstract description 7
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- 229910052719 titanium Inorganic materials 0.000 claims description 9
- 229910052791 calcium Inorganic materials 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 8
- 229910052745 lead Inorganic materials 0.000 claims description 8
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 claims description 8
- 229910052712 strontium Inorganic materials 0.000 claims description 8
- 229910013641 LiNbO 3 Inorganic materials 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- 238000004549 pulsed laser deposition Methods 0.000 claims description 6
- 229910052707 ruthenium Inorganic materials 0.000 claims description 5
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
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- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 229910052758 niobium Inorganic materials 0.000 claims description 4
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Abstract
A preparation method of a gate structure of a semiconductor heterojunction field effect transistor relates to the field of microelectronic device preparation. The invention comprises the following steps: (1) coating a positive photoresist on the GaN-based semiconductor heterostructure on which the source electrode and the drain electrode have been fabricated; (2) carrying out micro-patterning on the photoresist through exposure and development processes, and leaving a proper area to manufacture an MgO mask; (3) depositing a MgO film; (4) stripping the photoresist, and leaving the MgO film directly deposited on the substrate as a mask; (5) depositing a ferroelectric oxide thin film layer and a metal layer in sequence; (6) and stripping the MgO mask to leave the ferroelectric oxide film layer and the metal layer directly deposited on the substrate as the gate structure of the semiconductor heterojunction field effect transistor. The preparation method is simple, has small damage to the GaN-based semiconductor heterostructure, and cannot cause great influence on the performance of the device.
Description
Technical field
The present invention relates to the microelectronic component preparation field, be specifically related to adopt MgO to prepare the technology of metal/ferroelectric oxide/GaN base semiconductor HFET grid structure as mask.
Background technology
The GaN semiconductor is typical third generation wide bandgap semiconductor, has characteristics such as energy gap is big, disruptive field intensity is high, thermal conductivity is big, carrier mobility is high, capability of resistance to radiation is strong, has a wide range of applications at microelectronic.The GaN base semiconductor can form solid solution, can realize that through the set of dispense ratio of regulating III family's element such as Al the solid solution energy gap is adjustable continuously in the 1.9-6.2eV scope.The GaN base semiconductor has certain piezoelectric polarization and spontaneous polarization, when forming heterostructure, can form two-dimensional electron gas (2DEG) at the interface.As can under plain situation, forming surface density in the AlGaN/GaN heterojunction up to 10
13Cm
-2Two-dimensional electron gas, its mobility can reach 1500cm
2/ (Vs).Therefore, the GaN base semiconductor at high frequency, at a high speed, the high-power electronic device field has broad application prospects.Although the GaN base semiconductor has good electric property, still have numerous physical mechanisms to need further research.One of problem is exactly the grid leakage current of GaN base field-effect device the most significantly.Discover, adopt the MOSFET structure can significantly reduce the grid leakage current of GaN base field-effect device, the performance of improving device is played crucial effect.Mostly medium of oxides material commonly used at present is SiO
2, Al
2O
3, HfO
2Deng dielectric constant less than 20 low-k materials.Along with constantly dwindling of device volume, require gate dielectric layer equivalent oxide thickness (EOT) more and more littler, the gate dielectric material k value of employing is higher.
The ferroelectric oxide material is one type of oxide material with broad prospect of application.Ferroelectric oxide material commonly used mainly contains Ca-Ti ore type ferroelectric, laminated perovskite type ferroelectric body and lithium niobate type ferroelectric body.Ca-Ti ore type ferroelectric general formula is ABO
3, wherein the A element is generally Mg, Ca, Sr, Ba, Pb, Bi or La etc., and the B element is generally Ti, Zr, Fe, Ru or Ni etc.Laminated perovskite type ferroelectric body is the composite oxides that Bi layer and perovskite-like layer alternately form, and its general formula is (Bi
2O
2)
2+(A
M-1B
mO
3m+1)
2-, wherein the A element is generally Bi, Ba, Sr, Ca, Pb, K or Na etc., and the B element is generally Ti, Nb, Ta, Mo, W or Fe etc.Lithium niobate type ferroelectric body mainly contains LiNbO
3And LiTaO
3Deng.The ferroelectric oxide material has high dielectric constant, can satisfy the requirement of device miniaturization to gate dielectric layer equivalent oxide layer thickness.Abundant physical characteristics such as that the ferroelectric oxide material also has is ferroelectric, piezoelectricity, pyroelectricity.With the gate dielectric layer formation MFSFET structure of ferroelectric oxide material as GaN base semiconductor MOSFET device, the turnover iron electric polarization of ferroelectric oxide material can exert an influence to the two-dimensional electron gas transport property of GaN base semiconductor heterostructure.Further; The interface charge that characteristics such as the piezoelectricity of ferroelectric oxide material, pyroelectricity are produced in the MFSFET structure possibly change the two-dimensional electron gas of GaN base semiconductor heterostructure through the transfer function at interface, makes it to change with applied stress, the isoparametric variation of temperature.These coupling effects can be used as devices such as preparation voltage sensitive sensor, temperature sensor, also possibly strengthen the performance of GaN base semiconductor heterostructure.Therefore, adopt the ferroelectric oxide material to have broad application prospects in field of electronic devices as the gate dielectric layer of GaN base semiconductor MOSFET device.
Adopt the ferroelectric oxide material need carry out micrographicsization to the ferroelectric oxide film as the gate dielectric layer of GaN base semiconductor MOSFET device.The micrographicsization of ferroelectric oxide film generally adopts the method for dry etching.But with these ferroelectric oxide materials and GaN base semiconductor heterostructure integrated after; When adopting dry etching that the ferroelectric oxide material is carried out micrographics; Be difficult to grasp suitable etching condition, easily GaN base semiconductor heterostructure caused damage, thereby reduce the performance of device.Therefore, seek a kind of method of suitable making metal/ferroelectric oxide/GaN base semiconductor HFET grid structure, have crucial meaning for the practical application of device.
Summary of the invention
Technical problem to be solved by this invention is, the method for a kind of making metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure is provided, and wherein the grid structure comprises ferroelectric oxide thin layer and metal level.
The technical scheme that the present invention solve the technical problem employing is that the preparation method of heterogeneous semiconductor junction field effect transistor grid structure comprises the steps:
(1) applies positive photoresist having made on the GaN base semiconductor heterostructure of source electrode and drain electrode;
(2) through exposure and developing process photoresist carry out micrographicsization, stay suitable zone and make the MgO mask;
(3) deposition MgO film;
(4) stripping photoresist, the MgO film on the stripping photoresist stays and directly is deposited on on-chip MgO film as mask simultaneously;
(5) deposit ferroelectric oxide thin layer and metal level successively;
(6) peel off the MgO mask, peel off ferroelectric oxide thin layer and metal level on the MgO mask simultaneously, stay and directly be deposited on on-chip ferroelectric oxide thin layer and metal level grid structure as the heterojunction semiconductor field effect transistor.
Further, the positive photoresist thickness that applies in the step (1) is 2~3 μ m.Adopt the method for evaporation, sputter or pulsed laser deposition to deposit the MgO film at ambient temperature in the step (3), keep growth room's vacuum degree to remain 1 * 10 in the deposition process
-3~1 * 10
-4Pa, the MgO film thickness of deposition is at 500~800nm.
In the step (5), said ferroelectric oxide is Ca-Ti ore type ferroelectric, laminated perovskite type ferroelectric body or lithium niobate type ferroelectric body.
More specifically, in the step (5), said ferroelectric oxide is the Ca-Ti ore type ferroelectric, and its general formula is ABO
3, wherein A representes Mg, Ca, Sr, Ba, Pb, Bi or La, B representes Ti, Zr, Fe, Ru or Ni;
Calculate with A element, B element and oxygen element mol ratio, stoicheiometry satisfies (A
1+ A
2+ ... + A
n): (B
1+ B
2+ ... + B
n): O=1: 1: 3,
A wherein
1, A
2, A
nDifferent element in the element of expression A representative,
B
1, B
2, B
nDifferent element in the element of expression B representative.
Perhaps, in the step (5), said ferroelectric oxide is a laminated perovskite type ferroelectric body, and general formula is (Bi
2O
2)
2+(Q
M-1R
mO
3m+1)
2-, wherein the Q element is Bi, Ba, Sr, Ca, Pb, K or Na, the R element is Ti, Nb, Ta, Mo, W or Fe.[wherein m is the ligancy greater than 1, keeps the chemical valence of ionic group to be-divalent]
Perhaps, in the step (5), said ferroelectric oxide is a lithium niobate type ferroelectric body, comprises LiNbO
3Or LiTaO
3
Metal level in the step (5) is Ni, Au or Pt.
The invention has the beneficial effects as follows: the present invention uses the grid structure of MgO as mask fabrication metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe first, does not appear in the newspapers as yet both at home and abroad.Because the general method of dry etching that adopts carry out micrographicsization to the ferroelectric oxide material, when making metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe, easily GaN base semiconductor heterostructure is caused damage, thereby destroy the performance of device.And adopt method of the present invention; Utilize MgO to make the grid structure of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe as mask; The preparation method is simple, and less to the damage of GaN base semiconductor heterostructure, can not cause too much influence to the performance of device.
The present invention is further illustrated below in conjunction with accompanying drawing and embodiment.
Description of drawings:
Fig. 1 is the device sketch map of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe.
Fig. 2 is for using the process chart of MgO as mask fabrication metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure.
Fig. 3 is the metal/LiNbO that makes according to the present invention
3The device sketch map of/GaN base semiconductor hetero junction field effect pipe.
Fig. 4 (a) and Fig. 4 (b) are respectively metal/LiNbO
3The output characteristic curve and the transfer characteristic curve of/GaN base semiconductor hetero junction field effect tube device.
Embodiment
Fig. 1 is the device sketch map of the metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe of making according to the present invention.With regard to Fig. 1, the metal/ferroelectric oxide of this execution mode/GaN base semiconductor hetero junction field effect pipe has with the lower part altogether:
(1) Al
2O
3Or SiC substrate 10;
(2) ground floor is that energy gap is a GaN base semiconductor film 11;
(3) the AlGaN base semiconductor film 12 of the more large band gap of on above-mentioned ground floor GaN base semiconductor film, growing;
(4) the source electrode 13 and the drain electrode 14 that on above-mentioned second layer GaN base semiconductor film, form;
(5) in the grid structure that forms between source electrode and the gate electrode on the above-mentioned second layer GaN base semiconductor film, the grid structure comprises ferroelectric oxide layer 15 and grid metal level 16.
Say that further substrate is Al
2O
3Or AlGaN/GaN epitaxial wafer on the SiC substrate, form two-dimensional electron gas at AlGaN and GaN.Source electrode and drain electrode and GaN base semiconductor heterostructure form ohmic contact.Ferroelectric oxide can be Ca-Ti ore type ferroelectric, laminated perovskite type ferroelectric body and lithium niobate type ferroelectric body.
Ca-Ti ore type ferroelectric general formula is ABO
3, wherein the A element is represented Mg, Ca, Sr, Ba, Pb, Bi or La etc., and the B element is represented Ti, Zr, Fe, Ru or Ni etc.Calculate with A element, B element and oxygen element mol ratio, stoicheiometry satisfies (A
1+ A
2+ ... + An): (B
1+ B
2+ ... + Bn): O=1: 1: 3.
If adopt laminated perovskite type ferroelectric body (composite oxides that Bi layer and perovskite-like layer alternately form), its general formula is (Bi
2O
2)
2+(Q
M-1R
mO
3m+1)
2-, wherein the Q element is represented Bi, Ba, Sr, Ca, Pb, K or Na etc., and the R element is represented Ti, Nb, Ta, Mo, W or Fe etc.
Also can adopt lithium niobate type ferroelectric body, mainly comprise LiNbO
3And LiTaO
3Deng.
Aforementioned A
1, A
2, A
nDifferent element in the element of expression A representative,
B
1, B
2, B
nDifferent element in the element of expression B representative.For example, B
1, B
2, B
3, B
4Represent Ti, Zr, Fe, Ru respectively, with B
1, B
2... B
nForm represent the element that each are different.A
1, A
2... A
nForm as the same.
Fig. 2 is for adopting the process chart of MgO as mask fabrication metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure.Substrate 20 comprises that the required substrate of growing GaN base semiconductor film is (like Si, Al
2O
3, substrate such as SiC, GaN or AlN), parts such as ground floor GaN base semiconductor film and second layer GaN base semiconductor film.
As embodiment 1, the detailed process of whole process flow is following:
(a) on substrate 20, apply positive photoresist 21, the thickness of photoresist is about 2-3 μ m.Substrate to having applied photoresist carries out soft baking, to remove the solvent in the photoresist.Typical soft baking condition be on hot plate 90 ℃ to 100 ℃ the baking 30 seconds.Soft baking is lowered the temperature to substrate on cold drawing after accomplishing.
(b) photoresist is made public and develop.Mask is aimed at the on-chip tram that has applied photoresist, with the exposure of mask and substrate, thereby with the figure transfer on the mask to the substrate that has applied photoresist.Can adopt ultraviolet photoetching technology or electron beam lithography that photoresist is made public.The exposure back adopts developer that substrate is carried out development operation, in the photoresist of substrate surface, produces figure.Substrate surface leaves the zone of photoresist then for making afterwards the zone of grid structure, i.e. photoresist 21A.Develop after the completion, substrate is dried with deionized water (DI) flushing back, and on hot plate, carry out post bake and cure.The typical post bake condition of curing is 100 ℃ to 120 ℃ baking 60s on the hot plate.After curing completion, on cold drawing, substrate is lowered the temperature.
(c) deposition MgO film 22 and 22A on substrate.MgO can adopt evaporation (Evaporation), and (Pulsed Laser Deposition, PLD), sputter method for manufacturing thin film such as (Sputtering) deposits pulsed laser deposition at ambient temperature.Keep growth room's vacuum degree to remain 1 * 10 in the deposition process
-3Pa.The MgO thickness of deposition is at 800nm.
(d) adopt the liquid that removes photoresist that photoresist 21A is removed photoresist.When peeling off photoresist 21A, the MgO film 22 on the photoresist also can be stripped from, thereby realizes the micrographicsization to the MgO film.After promptly can be used as, makes the MgO film 22A that substrate surface stays the mask of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure.The liquid that removes photoresist that uses must satisfy not the condition that can impact the MgO film.For positive photoresist,, can use reagent such as acetone and N-methyl pyrrolidone to remove, and can not influence the MgO film like AZ6112 etc.
(e) on substrate, deposit ferroelectric oxide thin layer 23 and 23A and metal level 24 and 24A successively.The deposition of ferroelectric oxide thin layer can adopt conventional sull preparation method to prepare.Metal level adopts the method for electron beam evaporation to prepare.
(f) remove MgO film 22A.Use suitable solution removal MgO film 22A; The ferroelectric oxide thin layer 23 that will be deposited on simultaneously on the film is peeled off with metal level 24, thus the grid structure that ferroelectric oxide thin layer 23A that stays at substrate surface and metal level 24A are metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe.Wherein metal level 24A is the grid metal level.The solution of removing MgO must satisfy not the condition that can impact ferroelectric oxide thin layer and metal level.Adopt oxalic acid, acetate or concentrated ammonia liquor etc. to remove to the MgO film.This several solns generally can not impact the ferroelectric oxide film.The grid metal of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe adopts corrosion resistant metal materials such as Ni, Au and Pt usually, and oxalic acid, acetate or concentrated ammonia liquor are limited to these corrosion of metal effects, therefore also can not cause too much influence.
As another embodiment, be that with the difference of embodiment 1 in step (c), vacuum degree is 1 * 10
-4Pa.The MgO thickness of deposition is about 500nm.
Fig. 3 is the metal/LiNbO that makes according to the present invention
3The device sketch map of/GaN base semiconductor hetero junction field effect pipe.With regard to Fig. 3, the metal/LiNbO of this execution mode
3/ GaN base semiconductor hetero junction field effect pipe has with the lower part altogether:
(1) Al
2O
3Substrate 10;
(2) at Al
2O
3The thickness of growing on the substrate is the GaN layer of 2 μ m.The lattice constant a of GaN
1=0.3189nm, energy gap Eg
1=3.42eV.
(3) thickness of on above-mentioned GaN layer, growing is the Al of 20nm
0.3Ga
0.7The N layer.Al
0.3Ga
0.7The lattice constant a of N
2=0.3166nm, energy gap Eg
2=4.02eV.Al
0.3Ga
0.7N layer and GaN form Al
0.3Ga
0.7N/GaN heterojunction and at the spontaneous generation two-dimensional electron gas in GaN layer limit at the interface.
(4) at above-mentioned Al
0.3Ga
0.7The source electrode 13 and the drain electrode 14 that form on the N layer; Typical A l
0.3Ga
0.7The source electrode for preparing on the N/GaN heterojunction and very Ti (20nm)/Al (50nm)/Ti (the 20nm)/Au (200nm) that leaks electricity, and at 800 ℃, short annealing is 60 seconds under the blanket of nitrogen, to realize source electrode and drain electrode and Al
0.3Ga
0.7Form ohmic contact between the N/GaN heterojunction.
(5) at above-mentioned Al
0.3Ga
0.7The grid structure that forms between source electrode and the gate electrode on the N layer, the grid structure comprises LiNbO
3Layer 15 and grid metal level 16.LiNbO
3The preparation of employing pulsed laser deposition.Preparation condition is 600 ℃ of growth temperatures, oxygen atmosphere 20Pa.Film thickness 300nm.The grid metal level is Ni (20nm)/Au (200nm), adopts the electron-beam vapor deposition method preparation.
Fig. 4 (a) is the metal/LiNbO of above-mentioned preparation
3The output characteristic curve of/GaN base semiconductor hetero junction field effect tube device.Fig. 4 (b) is the metal/LiNbO of above-mentioned preparation
3The transfer characteristic curve of/GaN base semiconductor hetero junction field effect tube device.The result shows: the device through the preparation of MgO mask method has good field effect characteristic.
Therefore ferroelectric oxide depositing of thin film temperature can not adopt photoresist as the mask that film is carried out micrographicsization generally all at 400-800 ℃.MgO is a kind of inorganic compound, and its fusing point is 2852 ℃, usually can not flow under the ferroelectric oxide depositing of thin film temperature, phenomenons such as distortion, decomposition.And MgO can be at an easy rate by oxalic acid, acetate (CHCOOH) or concentrated ammonia liquor (NH as a kind of pair of property oxide
4Cl) corrode and peel off.Therefore MgO is suitable as the mask that ferroelectric thin film is carried out micrographicsization.The present invention proposes to adopt MgO as mask thus, makes the preparation method of metal/ferroelectric oxide/GaN base semiconductor hetero junction field effect pipe grid structure, and this is inventive point of the present invention place.
Claims (8)
1. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure is characterized in that, comprises the steps:
(1) applies positive photoresist having made on the GaN base semiconductor heterostructure of source electrode and drain electrode;
(2) through exposure and developing process photoresist carry out micrographicsization, stay suitable zone and make the MgO mask;
(3) deposition MgO film;
(4) stripping photoresist, the MgO film on the stripping photoresist stays and directly is deposited on on-chip MgO film as mask simultaneously;
(5) deposit ferroelectric oxide thin layer and metal level successively;
(6) peel off the MgO mask, peel off ferroelectric oxide thin layer and metal level on the MgO mask simultaneously, stay and directly be deposited on on-chip ferroelectric oxide thin layer and metal level grid structure as the heterojunction semiconductor field effect transistor.
2. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1 is characterized in that, the positive photoresist thickness that applies in the step (1) is 2~3 μ m.
3. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1; It is characterized in that; Adopt the method for evaporation, sputter or pulsed laser deposition to deposit the MgO film at ambient temperature in the step (3), keep growth room's vacuum degree to remain 1 * 10 in the deposition process
-3~1 * 10
-4Pa, the MgO film thickness of deposition is at 500~800nm.
4. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1 is characterized in that, in the step (5), said ferroelectric oxide is Ca-Ti ore type ferroelectric, laminated perovskite type ferroelectric body or lithium niobate type ferroelectric body.
5. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1 is characterized in that, in the step (5), said ferroelectric oxide is the Ca-Ti ore type ferroelectric, and its general formula is ABO
3, wherein A representes Mg, Ca, Sr, Ba, Pb, Bi or La, B representes Ti, Zr, Fe, Ru or Ni;
Calculate with A element, B element and oxygen element mol ratio, stoicheiometry satisfies (A
1+ A
2+ ... + A
n): (B
1+ B
2+ ... + B
n): O=1: 1: 3,
A wherein
1, A
2, A
nDifferent element in the element of expression A representative,
B
1, B
2, B
nDifferent element in the element of expression B representative.
6. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1 is characterized in that, in the step (5), said ferroelectric oxide is a laminated perovskite type ferroelectric body, and general formula is (Bi
2O
2)
2+(Q
M-1R
mO
3m+1)
2-, wherein the Q element is Bi, Ba, Sr, Ca, Pb, K or Na, the R element is Ti, Nb, Ta, Mo, W or Fe; Wherein m is the ligancy greater than 1, keeps the chemical valence of ionic group to be-divalent.
7. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1 is characterized in that, in the step (5), said ferroelectric oxide is a lithium niobate type ferroelectric body, comprises LiNbO
3Or LiTaO
3
8. the preparation method of heterogeneous semiconductor junction field effect transistor grid structure as claimed in claim 1 is characterized in that the metal level in the step (5) is Ni, Au or Pt.
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CN104217927A (en) * | 2014-09-29 | 2014-12-17 | 圆融光电科技有限公司 | Graphical method of multi-layer insulating film and multi-layer insulating film of chip |
CN104409463A (en) * | 2014-11-09 | 2015-03-11 | 北京工业大学 | Optical detector for modulating channel current based on HEMT (High Electron Mobility Transistor) structure |
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