CN109904227B - Diamond-based field effect transistor with low-work-function conductive grid and preparation method thereof - Google Patents

Diamond-based field effect transistor with low-work-function conductive grid and preparation method thereof Download PDF

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CN109904227B
CN109904227B CN201910194062.3A CN201910194062A CN109904227B CN 109904227 B CN109904227 B CN 109904227B CN 201910194062 A CN201910194062 A CN 201910194062A CN 109904227 B CN109904227 B CN 109904227B
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CN109904227A (en
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王玮
王宏兴
张明辉
林芳
问峰
王艳丰
陈根强
卜忍安
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Xian Jiaotong University
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Abstract

The invention discloses a diamond-based field effect transistor of a low work function conductive grid and a preparation method thereof, wherein the preparation method comprises the following steps: a diamond substrate; a layer of single crystal diamond epitaxial film is arranged on the diamond substrate; a source electrode and a drain electrode are arranged on the monocrystalline diamond epitaxial film; a conductive channel is formed on the monocrystalline diamond epitaxial film between the source electrode and the drain electrode; a low work function conductive grid layer is arranged on the conductive channel, and a grid electrode is arranged on the low work function conductive grid layer; the low work function conductive gate layer is in contact with the conductive channel, and can generate a barrier height reaching a preset threshold value for pinching off the channel. According to the diamond-based field effect transistor, the space charge region generated by the Schottky barrier is utilized to completely exhaust two-dimensional hole gas generated on the surface of the hydrogen terminal diamond, and the channel is pinched off to realize the characteristic of a normally-off device; the invention can not damage the performance of the conductive channel and can ensure the current passing capability between the source and the drain of the device.

Description

Diamond-based field effect transistor with low-work-function conductive grid and preparation method thereof
Technical Field
The invention belongs to the technical field of semiconductor devices, relates to a normally-off diamond-based field effect transistor and a preparation method thereof, and particularly relates to a diamond-based field effect transistor with a low-work-function conductive grid electrode and a preparation method thereof.
Background
Semiconductor single crystal materials have undergone four generations of development. The first generation of Si and Ge semiconductors brought human beings into the information age, and at the same time, the intellectualization and informatization of electronic systems were also driven. The second generation semiconductors (GaAs, InP, MCT, etc.) bring optoelectronic devices, power electronic devices, radio frequency electronic devices, spatial radiation-resistant devices, etc. to our public, and have revolutionized the information fields of wireless communication, optical communication, etc. The third generation of wide bandgap semiconductor (GaN, SiC) has been able to partially satisfy the requirements of the new generation of electronic system on high frequency (microwave-millimeter wave), high power output, high temperature (300-; short wavelength (blue, green, ultraviolet and deep ultraviolet), radiation resistance, severe environment resistance and the like.
However, both the third generation wide bandgap semiconductor and the second generation semiconductor are compound semiconductors, and there are great difficulties in the preparation of themselves and the heterojunctions thereof. For example, although the III-V group nitride AlGaN/GaN heterojunction can obtain two-dimensional electron gas with higher concentration and higher mobility at present, and can prepare HEMT devices with output power density reaching dozens of W/mm @ several GHz, the defects of mismatch dislocation and the like caused by heterojunction mismatch and the complex interface characteristics caused by spontaneous polarization and piezoelectric polarization greatly limit the working characteristics of the HEMT devices; although InAlN/GaN heterojunctions can achieve lattice matched heterojunctions, it has been reported thatmaxCan reach 370GHz, but due to the difficulty of In component control and the characteristic that Al component is easy to oxidize, the heterojunction interface defect density is still high, and the output power density is still very small. In addition, due to the low thermal conductivity, the application requirements of ultrahigh frequency and ultrahigh power devices are difficult to meet. Although SiC is generally regarded by the scientific community as having large forbidden band width, compatible device process and silicon process and higher heat conductivity; but the difficulty of manufacturing MMIC is greatly influenced by the structural polymorphism and the characteristic that the defect of the single crystal micropipe is difficult to control.
Compared with the prior art, the diamond has comprehensive inherent advantages in the aspects of ultra-wide forbidden band width, carrier mobility, heat conductivity, breakdown field strength, dielectric constant, saturation, radiation resistance, corrosion resistance, electron drift velocity and the like for preparing ultra-high frequency and ultra-high power electronic devices, has overall performance superior to other semiconductors, and more importantly has the same diamond structure as silicon and is a simple substance semiconductor in terms of physical intrinsic characteristics.
Referring to table 1, table 1 shows the diamond material index compared to Si, GaN, and SiC. Table 1 gives the Johnson index, Keyes index and Baliga index of diamond material compared to Si, GaN and SiC, which are far superior in performance to Si and representative GaN and SiC of third generation semiconductors; the method shows the great advantages of the method in frequency and power, and has great application potential in the fields of aerospace, advanced equipment and the like with very high requirements on material volume, weight, heat dissipation, power density and reliability.
TABLE 1 comparison of diamond material indices with Si, GaN, SiC
Material Johnson index Keyes index Baliga index [ Si ═ 1%]
Diamond 2350 145 43938
SiC 910 35 620
GaN 1080 10 24
Si 2.3 6.7 1
Experiments prove that electrons in the valence band of the diamond on the surface of the hydrogen terminal are transferred to the lowest unoccupied molecular orbital (LOMO) in adsorbed molecules, so that a layer of two-dimensional hole gas (2DHG) is formed on the surface of the diamond, and 10 can be obtained13cm-2Left and right plane carrier concentration, and 50-200cm2·V-1·s-1Carrier mobility within a range. When the traditional element doping is not solved, the layer of two-dimensional hole gas can be used as a conducting channel of a field effect transistor, and the development of the diamond FET is greatly promoted. The maximum source-drain current of the diamond-based field effect transistor is larger than 1A/mm, and the transconductance is 520 mS/mm; the output power density reaches 3.8W/mm @1 GHz; highest pinch-off frequency f of single crystal diamond metal-semiconductor field effect transistorTAt 70GHz and a maximum frequency fmaxIs 120 GHz.
At present, the diamond field effect transistor is mostly a normally-on (depletion) device; however, normally-off (enhancement mode) devices also hold significant importance in circuit applications. Under the condition that no gate voltage is applied to the normally-off device, no current passes no matter how much voltage is applied to the two ends of the source and the drain before breakdown, and the device is in an off state. Therefore, the device can greatly improve the safety of the whole system and greatly reduce the circuit loss. The existing normally-off device is generally realized by converting part of hydrogen terminals into oxygen terminals, partially desorbing surface adsorbates, and compensating a dielectric layer with opposite charges, which can reduce the carrier concentration and mobility of a surface channel, and sacrifice the performances of the maximum source-drain current, external transconductance and the like of the device part.
Disclosure of Invention
The present invention is directed to a diamond-based field effect transistor with a low work function conductive gate and a method for fabricating the same, which solves one or more of the above-mentioned problems. According to the diamond-based field effect transistor, the space charge region generated by the Schottky barrier is utilized to completely exhaust two-dimensional hole gas generated on the surface of the hydrogen terminal diamond, and the channel is pinched off to realize the characteristic of a normally-off device; the invention can not damage the performance of the conductive channel and can ensure the current passing capability between the source and the drain of the device.
In order to achieve the purpose, the invention adopts the following technical scheme:
a low work function conductive gate diamond based field effect transistor comprising: the device comprises a diamond substrate, a single crystal diamond epitaxial film, a conductive channel, a source electrode, a drain electrode, a low work function conductive grid layer and a grid electrode; a layer of single crystal diamond epitaxial film is arranged on the diamond substrate; a source electrode and a drain electrode are arranged on the monocrystalline diamond epitaxial film; a conductive channel is formed on the monocrystalline diamond epitaxial film between the source electrode and the drain electrode; the conductive channel is provided with a low-work-function conductive grid layer, and a grid electrode is arranged on the low-work-function conductive grid layer; the low work function conductive gate layer is in contact with the conductive channel, and can generate a barrier height reaching a preset threshold value for pinching off the channel.
The invention further improves the method and also comprises the following steps: a passivation layer; the diamond-based field effect transistor is integrally provided with a passivation layer, and passivation layer windows are arranged on the source electrode, the drain electrode and the gate electrode; wherein the passivation layer is made of SiO2Or SiNx
The invention is further improved in that the low-work-function conductive gate layer has a work function of less than or equal to 4eV, a thickness of 2-500nm, and a barrier height capable of forming Schottky contact with a conductive channel of more than or equal to 0.6 eV.
Wherein the low work function conductive gate layer is made of boride, carbide or nitride of IIIB, IVB, VB or VIB in the periodic table
The invention is further improved in that the low work function conductive grid layer is made of CaB6、SrB6、BaB6TiC, ZrN, TaC, NbC, HfC, TiN, ZrN, NbN, ThN, or HfN.
In a further improvement of the invention, the single crystal diamond epitaxial film is a CVD grown diamond material having a resistivity of 100M Ω & c or morem, root mean square surface roughness less than or equal to 0.5nm, and Raman curve half-peak width less than or equal to 3cm-1The half-peak width of an XRD rocking curve is less than or equal to 50arcsec, and the thickness of a film is 0.1-10 mu m; the source electrode and the drain electrode are made of Au, Pd, Ir, Pt or Ti; the gate electrode is made of Au, Pd, Ir, Pt, Ti, Al, Zr or Mo.
The invention is further improved in that the conducting channel is a layer of two-dimensional hole gas formed by hydrogenating the monocrystalline diamond epitaxial film, and the carrier concentration of the two-dimensional hole gas is 5 multiplied by 1012~5×1014cm-2The mobility is 20-200cm2/V·s。
The invention relates to a preparation method of a diamond-based field effect transistor with a low work function conductive grid, which comprises the following steps:
s1, cleaning the diamond substrate and drying the diamond substrate;
s2, homoepitaxy of the monocrystalline diamond film on the diamond substrate to obtain a monocrystalline diamond epitaxial film;
s3, carrying out hydrogenation treatment on the monocrystalline diamond epitaxial film to obtain a surface conducting channel;
s4, cleaning the single crystal diamond epitaxial film after hydrogenation treatment, then making source and drain electrode patterns on the surface of the single crystal diamond epitaxial film by utilizing a photoetching technology, depositing metal, and obtaining ohmic contact of a source electrode and a drain electrode by utilizing a stripping technology;
s5, forming a mesa pattern on the conductive channel by using a photoetching technology, protecting the conductive channel, and performing ultraviolet/ozone treatment on the exposed part to electrically isolate the device;
and S6, forming a gate electrode pattern on the conductive channel by utilizing a photoetching technology, sequentially depositing a low-work-function conductive material and gate metal, and obtaining a low-work-function conductive gate layer and a gate electrode by utilizing a stripping technology to finish the preparation.
The preparation method of the invention is further improved in that the method also comprises the following steps:
s7, depositing a passivation layer on the whole sample surface prepared in the step S6, and opening passivation layer windows on the source electrode, the drain electrode and the gate electrode by utilizing photoetching and etching technologies to obtain the diamond-based field effect transistor with the low-work-function conductive gate.
The preparation method of the invention is further improved in that,
in step S2, the single crystal diamond epitaxial film is a CVD grown diamond material with a thickness of 0.1-10 μ M, a resistivity of 100 MOmega cm or more, a root mean square surface roughness of 0.5nm or less, and a Raman curve half-peak width of 3cm or less-1The half-peak width of an XRD rocking curve is less than or equal to 50 arcsec;
in the step S3, the hydrogenation treatment is to place the single crystal diamond epitaxial film prepared in the step S2 in hydrogen plasma atmosphere, the treatment temperature is 700-1000 ℃, the treatment time is 10 seconds-2 hours, and the hole surface density is 5 multiplied by 1012~5×1014cm-2The mobility is 20-200cm2/V·s;
In the step S5, the electrical isolation of the device is to treat the exposed surface of the monocrystalline diamond epitaxial film by using ultraviolet/ozone or oxygen plasma, wherein the gas flow of the ozone is 1-100sccm, the power of the oxygen plasma is 100-300W, and the treatment time is 1-60 minutes;
in step S6, the low work function conductive gate layer has a work function less than 4eV, a thickness of 2-500nm, and a material of CaB6、SrB6、BaB6TiC, ZrN, TaC, NbC, HfC, TiN, ZrN, NbN, ThN, or HfN;
in step S7, the passivation layer is made of SiO2Or SiNx
Compared with the prior art, the invention has the following beneficial effects:
according to the low-work-function conductive gate normally-off surface channel diamond field effect transistor, a layer of low-work-function conductive material is deposited on the surface of a hydrogen terminal diamond, and a Schottky potential with a higher barrier height can be generated by the contact of the low-work-function conductive material layer and the surface of the hydrogen terminal diamond; the space charge region generated by the Schottky contact barrier between the low-work-function conductive gate and the surface of the hydrogen terminal diamond is utilized to completely exhaust two-dimensional hole gas generated on the surface of the hydrogen terminal diamond, and the channel is pinched off to realize the characteristics of a normally-off device, so that the performance of the conductive channel is not damaged, and the current passing capability between the source and the drain of the device can be ensured.
The low-work-function conductive grid normally-off surface channel diamond field effect transistor prepared by the preparation method can realize the characteristics of a normally-off device on the premise of not damaging the concentration and the mobility of two-dimensional hole gas carriers generated by a hydrogen terminal, and can ensure the current transport capacity between a source and a drain to a certain extent.
Drawings
FIG. 1 is a schematic diagram of a low work function conductive gate normally-off surface channel diamond field effect transistor according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a top-down corresponding structure of a low work function conductive gate normally-off surface channel diamond field effect transistor in accordance with an embodiment of the present invention;
fig. 3 is a schematic flow chart of a method for manufacturing a low work function conductive gate normally-off surface channel diamond field effect transistor according to an embodiment of the invention.
In fig. 1 to 3, 1, a diamond substrate; 2. a single crystal diamond epitaxial film; 3. a conductive channel; 4. a source electrode; 5. a drain electrode; 6. a low work function conductive gate layer; 7. a gate electrode; 8. and a passivation layer.
Detailed Description
The invention is described in further detail below with reference to the figures and specific examples.
Referring to fig. 1 and 2, a low work function conductive gate normally-off surface channel diamond fet according to an embodiment of the present invention includes: a diamond substrate 1, a single crystal diamond epitaxial film 2, a conductive channel 3, a source 4, a drain 5, a low work function conductive gate layer 6, a gate electrode 7 and a passivation layer 8.
A layer of monocrystalline diamond epitaxial film 2 is arranged on the outer wall of the top of the diamond substrate 1; the single crystal diamond epitaxial film 2 is provided with a source electrode 4 and a drain electrode 5; a conductive channel 3 is formed on the monocrystalline diamond epitaxial film 2 between the source electrode 4 and the drain electrode 5; the low work function conductive gate layer 6 covers part of the conductive channel 3 between the source electrode 4 and the drain electrode 5, and the low work function conductive gate layer 6 is used for forming a barrier height reaching a preset threshold value with the conductive channel 3 to pinch off the channel; a gate electrode 7 is arranged on the low-work-function conductive gate layer 6; the field effect transistor is provided with a passivation layer 8 on the whole, the passivation layer 8 is not provided on the source 4, drain 5 and gate 7 portions, and the passivation layer 8 is used for protecting the exposed conducting channel 3 and reducing the surface leakage current of the transistor.
The diamond substrate 1 is prepared by adopting a high-temperature high-pressure HPHT technology, a large-area splicing technology and a vapor phase epitaxy CVD technology, and is used as a base on which a monocrystal diamond film is homoepitaxially grown.
The single crystal diamond epitaxial film 2 is a CVD grown diamond material having a resistivity of 100 MOmega cm or more, a root mean square surface roughness of 0.5nm or less, and a Raman curve half-peak width of 3cm or less-1The half-peak width of the XRD rocking curve is less than or equal to 50arcsec, and the film thickness is 0.1-10 mu m.
The conductive channel 3 is a layer of two-dimensional hole gas formed by hydrogenating the monocrystalline diamond epitaxial film 2, and the carrier concentration of the two-dimensional hole gas is 5 multiplied by 1012-5×1014cm-2The mobility is 20-200cm2/V·s。
The low-work-function conductive gate layer 6 has a work function of less than or equal to 4eV and can form a barrier height reaching a preset threshold with the conductive channel 3, for example, the barrier height capable of forming Schottky contact with the conductive channel 3 is greater than or equal to 0.6 eV; the thickness is 2-500nm, and the material is boride, carbide or nitride of IIIB, IVB, VB, and VIB in periodic Table of elements, such as CaB6、SrB6、BaB6TiC, ZrN, TaC, NbC, HfC, TiN, ZrN, NbN, ThN, HfN, or the like.
The source electrode 4 and the drain electrode 5 are made of Au, Pd, Ir, Pt or Ti; the gate electrode 7 is made of Au, Pd, Ir, Pt, Ti, Al, Zr or Mo.
Referring to fig. 3, a method for manufacturing a low-work-function conductive gate normally-off surface channel diamond field effect transistor according to an embodiment of the present invention sequentially includes the following steps:
1) cleaning the diamond substrate 1 and drying;
2) homoepitaxy monocrystal diamond film on the diamond substrate 1 to obtain monocrystal diamond epitaxial film 2;
3) carrying out hydrogenation treatment on the monocrystalline diamond epitaxial film 2 to obtain a surface conducting channel 3;
4) cleaning the single crystal diamond epitaxial film 2 after hydrogenation treatment, then manufacturing a source and drain electrode pattern on the surface of the single crystal diamond epitaxial film by utilizing a photoetching technology, depositing metal, and obtaining ohmic contact of a source electrode 4 and a drain electrode 5 by utilizing a stripping technology;
5) forming a mesa pattern on the conductive channel 3 by using a photoetching technology to protect the conductive channel, and performing ultraviolet/ozone treatment on the exposed part to electrically isolate the device;
6) forming a gate electrode pattern on the conductive channel 3 by utilizing a photoetching technology, depositing a low-work-function conductive material and gate metal in sequence by utilizing technologies such as electron beam evaporation, sputtering, atomic layer deposition and the like, and obtaining a low-work-function conductive gate layer 6 and a gate electrode 7 by utilizing a stripping technology to obtain the low-work-function conductive gate normally-closed surface channel diamond field effect transistor.
7) And depositing a passivation layer 8 on the surface of the whole sample by using the technologies of sputtering, plasma enhanced vapor chemical deposition, electron beam evaporation and the like, and opening passivation layer windows on the source electrode 4, the drain electrode 5 and the gate electrode 7 by using the photoetching and etching technologies to obtain the low-work-function conductive gate normally-closed surface channel diamond field effect transistor.
Wherein, the diamond substrate 1 in the step 1) is prepared by adopting a high-temperature high-pressure HPHT technology, a large-area splicing technology and a vapor phase epitaxy CVD technology, and is used as a base on which a monocrystal diamond film is homoepitaxially grown.
Wherein the single crystal diamond epitaxial film 2 of the step 2) is a CVD grown diamond material, the resistivity is more than or equal to 100 MOmega cm, the root mean square surface roughness is less than or equal to 0.5nm, and the Raman curve half-peak width is less than or equal to 3cm-1The half-peak width of the XRD rocking curve is less than or equal to 50arcsec, and the thickness of the obtained single crystal diamond film is 0.1-10 mu m.
Wherein, the hydrogenation treatment of the step 3) is to place the single crystal diamond epitaxial film 2 prepared in the step 2) in a hydrogen plasma atmosphere,the treatment temperature is 700-1000 ℃, the treatment time is 10 seconds to 2 hours, and the obtained hole area density is 5 multiplied by 1012-5×1014cm-2The mobility is 20-200cm2/V·s。
Wherein, the electrical isolation of the device in the step 5) is to treat the exposed surface of the monocrystalline diamond epitaxial film by using ultraviolet/ozone or oxygen plasma, the gas flow of the ozone is 1-100sccm, the power of the oxygen plasma is 100-300W, and the treatment time is 1-60 minutes.
Wherein, the low work function conductive gate layer 6 of the step 6) has a work function less than 4eV, a thickness of 2-500nm, and a material of boride, carbide or nitride of IIIB, IVB, VB or VIB in the periodic Table of elements, such as CaB6、SrB6、BaB6TiC, ZrN, TaC, NbC, HfC, TiN, ZrN, NbN, ThN, HfN, or the like.
Wherein, the passivation layer material of the step 7) is SiO2、SiNxAnd the etching technology is dry etching such as wet etching or Inductively Coupled Plasma (ICP), Reactive Ion Etching (RIE), Ion Beam Etching (IBE) and the like.
The invention relates to a low work function conductive grid normally-off surface channel diamond field effect transistor, which comprises a diamond substrate, a single crystal diamond epitaxial film, a conductive channel, a source electrode, a drain electrode, a low work function conductive grid layer, a grid electrode and a passivation layer; a layer of single crystal diamond epitaxial film is arranged on the diamond substrate; a source electrode and a drain electrode are arranged on the monocrystalline diamond epitaxial film; a conductive channel is formed on the monocrystalline diamond epitaxial film between the source electrode and the drain electrode; the low-work-function conductive grid layer covers a part of a conductive channel between the source electrode and the drain electrode; a gate electrode is arranged on the low-work-function conductive gate layer; the field effect transistor is provided with a passivation layer as a whole, and the source, drain and gate electrode portions are not provided with the passivation layer. The invention adopts a low work function conductive material, and uses a space charge region generated by a Schottky contact barrier between a low work function conductive grid and the surface of the hydrogen terminal diamond to completely exhaust two-dimensional cavity gas generated on the surface of the hydrogen terminal diamond, thereby pinching off a channel and realizing the characteristics of a normally-off device.
Example 1
The preparation method of the low-work-function conductive grid normally-off surface channel diamond field effect transistor comprises the following steps of:
1) the diamond substrate 1 grown by the high-temperature high-pressure (HPHT) technology is subjected to inorganic and organic cleaning in sequence by using a standard cleaning process of the diamond substrate, and is dried by nitrogen for standby.
2) Depositing a monocrystalline diamond film 2 on the cleaned diamond substrate by using a microwave plasma gas phase chemical deposition (MPCVD) technology, wherein the plasma power is 1kW, the chamber pressure is 100Torr, the total gas flow is 500sccm, the thickness of the obtained monocrystalline diamond film is 0.1 μ M, the resistivity is more than 100M omega cm, the Root Mean Square (RMS) surface roughness is 0.5nm, and the half-peak width of a Raman curve is about 3cm-1And the half-peak width of an XRD rocking curve is less than 50 arcsec.
3) Controlling the power of microwave plasma to make the temperature of the chamber 1000 ℃, keeping the hydrogen flow at 50sccm, and carrying out hydrogenation treatment on the grown monocrystalline diamond epitaxial film 2 for 10 minutes to obtain 2DHG with the surface density of 5 multiplied by 1012cm-2Mobility of 200cm2/V·s。
4) Ultrasonically cleaning a sample by using acetone, isopropanol and deionized water, and drying; spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask, developing for 45 seconds to remove the exposed photoresist, and leaving a source and drain electrode pattern. Placing the photoetched sample in an electron beam evaporation device, and vacuumizing the background to 5 x 10-4After Pa, 150nm of Pd metal is deposited on the surface of the sample. And taking out the diamond sample after deposition, soaking the diamond sample in N-methylpyrrolidone (NMP) solution, carrying out water bath at 120 ℃ for 5 minutes, and then ultrasonically stripping off the metal outside an exposed area to obtain a source electrode 4 and a drain electrode 5.
5) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask,the exposed photoresist is removed by development 45 s. Using photoresist as mask, using ozone (O)3) And ultraviolet light oxidizing the exposed surface of the sample for 15 minutes to generate an oxygen termination for device isolation.
6) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask, and developing for 45 seconds to remove the exposed photoresist and leave a gate metal pattern. Placing a sample in vacuum sputtering equipment, sputtering by using a TiC ceramic target and an Al metal target in sequence, depositing 30nm and 150nm TiC materials and Al metal on the surface of the conductive channel 3 respectively, wherein the sputtering power is 300W and 150W respectively, and the working vacuum is 10- 1Pa. And taking out the diamond sample after deposition, soaking the diamond sample in N-methyl pyrrolidone (NMP) solution, carrying out water bath at 120 ℃ for 5 minutes, and then ultrasonically stripping off materials outside an exposed area to obtain the low-work-function conductive gate layer 6 and the gate electrode 7.
7) Deposition of a 500nm layer of SiO on the entire sample surface using plasma enhanced chemical vapor deposition2Dielectric material, deposition temperature 350 deg.C, plasma power 80W, SiH4Flow rate 32sccm, N2O flow 2000sccm, N2The flow rate is 710sccm and the chamber pressure is 2000 mTorr. Spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask, developing for 45 seconds to remove the exposed photoresist, and leaving a window pattern. And etching by using BOE (5:1) solution for 3 minutes to open a passivation layer window, and finally obtaining the prepared low-work-function conductive grid normally-off surface channel diamond field effect transistor.
Example 2
The preparation method of the low-work-function conductive grid normally-off surface channel diamond field effect transistor comprises the following steps of:
1) the diamond substrate 1 grown by the vapor phase epitaxy (CVD) technology is subjected to inorganic and organic cleaning in sequence by using a standard cleaning process of the diamond substrate, and is dried by nitrogen for later use.
2) Depositing a monocrystalline diamond film 2 on the cleaned diamond substrate by using a microwave plasma gas phase chemical deposition (MPCVD) technology, wherein the plasma power is 1kW, the chamber pressure is 100Torr, the total gas flow is 500sccm, the thickness of the obtained monocrystalline diamond film is 10 μ M, the resistivity is more than 100M omega cm, the Root Mean Square (RMS) surface roughness is 0.5nm, and the half-peak width of a Raman curve is about 3cm-1And the half-peak width of an XRD rocking curve is less than 50 arcsec.
3) Controlling the microwave plasma power to make the chamber temperature 800 deg.C, keeping hydrogen flow at 200sccm, and performing hydrogenation treatment on the grown single crystal diamond epitaxial film 2 for 20 min to obtain 2DHG with 2 × 10 areal density13cm-2Mobility of 150cm2/V·s。
4) Ultrasonically cleaning a sample by using acetone, isopropanol and deionized water, and drying; spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask, developing for 45 seconds to remove the exposed photoresist, and leaving a source and drain electrode pattern. Placing the photoetched sample in an electron beam evaporation device, and vacuumizing the background to 5 x 10-4After Pa, 50/150nm each of Ti/Au metal was deposited on the sample surface. And taking out the diamond sample after deposition, soaking the diamond sample in N-methylpyrrolidone (NMP) solution, carrying out water bath at 120 ℃ for 5 minutes, and then ultrasonically stripping off the metal outside an exposed area to obtain a source electrode 4 and a drain electrode 5. And annealing the source and drain electrodes at 600 ℃ for 3 minutes in a nitrogen atmosphere to form excellent ohmic contact.
5) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask plate, and developing for 45 seconds to remove the exposed photoresist. And (3) using the photoresist as a mask, and treating the exposed surface of the sample for 5 minutes by using oxygen plasma with the oxygen flow of 50sccm and the plasma power of 100W to generate an oxygen terminal for device isolation.
6) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask, and developing for 45 seconds to remove the exposed photoresist and leave a gate metal pattern. The sample was placed in an electron beam evaporation apparatus, and a ZrN material and a Zr metal were deposited on the surface of the feeding channel 3 in 30nm and 150nm in this order using the ZrN material and the Zr metal. And taking out the diamond sample after deposition, soaking the diamond sample in N-methyl pyrrolidone (NMP) solution, carrying out water bath at 120 ℃ for 5 minutes, and then ultrasonically stripping off materials outside an exposed area to obtain the low-work-function conductive gate layer 6 and the gate electrode 7.
7) Deposition of a layer of 300nm SiN over the entire sample surface using plasma-enhanced vapor chemical depositionxDielectric material, deposition temperature 350 deg.C, plasma power 67W, SiH4Flow 13.5sccm, NH3Flow 10sccm, N2The flow rate is 1000sccm and the chamber pressure is 1500 mTorr. Spin-coating a layer of AZ5214 photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 6.5 seconds by using a designed mask, developing for 45 seconds to remove the exposed photoresist, and leaving a window pattern. And etching by using BOE (5:1) solution for 5 minutes to open a passivation layer window, and finally obtaining the prepared low-work-function conductive grid normally-off surface channel diamond field effect transistor.
Example 3
The preparation method of the low-work-function conductive grid normally-off surface channel diamond field effect transistor comprises the following steps of:
1) the diamond substrate 1 grown by the high-temperature high-pressure (HPHT) technology is subjected to inorganic and organic cleaning in sequence by using a standard cleaning process of the diamond substrate, and is dried by nitrogen for standby.
2) Depositing a single crystal diamond film 2 on the cleaned diamond substrate by using microwave plasma vapor phase chemical deposition (MPCVD) technology, wherein the plasma power is 1kW, and the chamber pressure is 100Torr, total gas flow rate of 500sccm, thickness of the obtained single crystal diamond film of 1 μ M, resistivity of more than 100M Ω & cm, Root Mean Square (RMS) surface roughness of 0.5nm, and Raman curve half-peak width of about 3cm-1And the half-peak width of an XRD rocking curve is less than 50 arcsec.
3) Controlling the microwave plasma power to make the chamber temperature 700 ℃, keeping the hydrogen flow at 500sccm, and carrying out hydrogenation treatment on the grown monocrystalline diamond epitaxial film 2 for 40 minutes to obtain 2DHG with the surface density of 5 multiplied by 1014cm-2Mobility of 100cm2/V·s。
4) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of KXN5735-LO photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 2 seconds by using a designed mask, baking for 90 seconds at 120 ℃, developing for 25 seconds to remove the exposed photoresist, and leaving a source and drain pattern. Placing the photoetched sample in an electron beam evaporation device, and vacuumizing the background to 5 x 10-4After Pa, Pt metal is deposited on the surface of the sample by 150 nm. And taking out the diamond sample after deposition, soaking the diamond sample in N-methylpyrrolidone (NMP) solution, carrying out water bath at 120 ℃ for 5 minutes, and then ultrasonically stripping off the metal outside an exposed area to obtain a source electrode 4 and a drain electrode 5.
5) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of KXN5735-LO photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 2 seconds by using a designed mask, baking for 90 seconds at 120 ℃, developing for 25 seconds to remove the exposed photoresist, and leaving a mesa pattern. Using photoresist as mask, using ozone (O)3) And ultraviolet light oxidizing the exposed surface of the sample for 15 minutes to generate an oxygen termination for device isolation.
6) The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of KXN5735-LO photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 2 seconds by using a designed mask, baking for 90 seconds at 120 ℃, developing for 25 seconds to remove the exposed photoresist, and leaving a gate electrode pattern. The sample is placed in an atomic layer deposition device, and then the HfN material with the thickness of 30nm and the HfN material with the thickness of 150nm and the Au metal are deposited on the surface of the conductive channel 3 in sequence. And taking out the diamond sample after deposition, soaking the diamond sample in N-methyl pyrrolidone (NMP) solution, carrying out water bath at 120 ℃ for 5 minutes, and then ultrasonically stripping off materials outside an exposed area to obtain the low-work-function conductive gate layer 6 and the gate electrode 7.
7) Deposition of SiO on the entire sample surface using plasma enhanced vapor chemical deposition2/SiNx/SiO2The thickness of the multilayer dielectric material is 100/200/200 nm. SiO 22Deposition conditions are as follows: the temperature is 350 ℃, the plasma power is 20W, SiH4Flow 4sccm, N2O flow 710sccm, N2The flow rate is 180sccm and the chamber pressure is 2000 mTorr. SiNxDeposition conditions are as follows: deposition temperature 350 deg.C, plasma power 67W, SiH4Flow 13.5sccm, NH3Flow 10sccm, N2The flow rate is 1000sccm and the chamber pressure is 1500 mTorr. The samples were ultrasonically cleaned with acetone, isopropanol, deionized water and blown dry. Spin-coating a layer of KXN5735-LO photoresist on the surface of a sample, baking the single crystal diamond sample spin-coated with the photoresist for 90 seconds at 95 ℃, performing ultraviolet lithography exposure for 2 seconds by using a designed mask, baking for 90 seconds at 120 ℃, developing for 25 seconds to remove the exposed photoresist, and leaving a window pattern. Opening a passivation layer window by utilizing reactive ion etching, wherein the specific parameter is SF6Flow 5.5sccm, CHF3Flow rate 32sccm, He flow rate 150sccm, forward power 200W, chamber pressure 1850mTorr, etch time 3 minutes. Finally, the prepared low work function conductive grid normally-off surface channel diamond field effect transistor is obtained.
In summary, the invention provides a low work function conductive gate normally-off surface channel diamond field effect transistor and a preparation method thereof, wherein a layer of low work function conductive material is deposited on the surface of a hydrogen terminal diamond, a higher schottky barrier is generated by the contact of the low work function conductive material and the surface of the hydrogen terminal diamond, a space charge region generated by the schottky barrier is utilized to completely exhaust two-dimensional cavity gas generated on the surface of the hydrogen terminal diamond, and a channel is pinched off, so that the characteristic of a normally-off device is realized; the invention can not damage the performance of the conductive channel and simultaneously ensures the current passing capacity between the source and the drain of the device.
Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art can make modifications and equivalents to the embodiments of the present invention without departing from the spirit and scope of the present invention, which is set forth in the claims of the present application.

Claims (10)

1. A diamond based field effect transistor having a low work function conductive gate comprising: the device comprises a diamond substrate (1), a single crystal diamond epitaxial film (2), a conductive channel (3), a source (4), a drain (5), a low work function conductive gate layer (6) and a gate electrode (7);
a layer of monocrystalline diamond epitaxial film (2) is arranged on the diamond substrate (1); a source electrode (4) and a drain electrode (5) are arranged on the monocrystalline diamond epitaxial film (2); a conductive channel (3) is formed on the monocrystalline diamond epitaxial film (2) between the source electrode (4) and the drain electrode (5);
a low-work-function conductive gate layer (6) is arranged on the conductive channel (3), and a gate electrode (7) is arranged on the low-work-function conductive gate layer (6);
the low-work-function conductive gate layer (6) and the conductive channel (3) form Schottky contact, a barrier height reaching a preset threshold value can be generated, and the low-work-function conductive gate layer and the conductive channel are used for pinching off the channel to realize the characteristic of a normally-off device;
the conductive channel (3) is obtained by hydrogenating a monocrystalline diamond epitaxial film.
2. A low work function conductive gate diamond-based field effect transistor according to claim 1, further comprising: a passivation layer (8);
the diamond-based field effect transistor is integrally provided with a passivation layer (8), and passivation layer windows are arranged on the source electrode (4), the drain electrode (5) and the gate electrode (7);
wherein the passivation layer (8) is made of SiO2Or SiNx
3. The low work function conductive gate diamond-based field effect transistor according to claim 1, wherein the low work function conductive gate layer (6) has a work function of 4eV or less, a thickness of 2-500nm, and a barrier height capable of forming a Schottky contact with the conductive channel (3) of 0.6eV or more.
4. The diamond-based field effect transistor of the low work function conductive gate of claim 1, wherein the material of the low work function conductive gate layer (6) is boride, carbide or nitride of group IIIB, IVB, VB, VIB of the periodic table of elements.
5. The diamond-based FET as claimed in claim 1, wherein the low work function conductive gate layer (6) is CaB6、SrB6、BaB6TiC, ZrN, TaC, NbC, HfC, TiN, ZrN, NbN, ThN, or HfN.
6. A low work function conductive gate diamond based field effect transistor according to claim 1, wherein the single crystal diamond epitaxial thin film (2) is a CVD grown diamond material with a resistivity of 100M Ω -cm or more, a root mean square surface roughness of 0.5nm or less, a raman curve half width of 3cm or less-1The half-peak width of an XRD rocking curve is less than or equal to 50arcsec, and the thickness of a film is 0.1-10 mu m;
the source electrode (4) and the drain electrode (5) are made of Au, Pd, Ir, Pt or Ti;
the gate electrode (7) is made of Au, Pd, Ir, Pt, Ti, Al, Zr or Mo.
7. Diamond-based field of low work function conductive gate according to claim 1The effect transistor is characterized in that the conducting channel (3) is a layer of two-dimensional hole gas formed by hydrogenating the monocrystalline diamond epitaxial film (2), and the hole surface density of the two-dimensional hole gas is 5 multiplied by 1012~5×1014cm-2The mobility is 20-200cm2/V·s。
8. A preparation method of a diamond-based field effect transistor with a low work function conductive grid electrode is characterized by comprising the following steps:
s1, cleaning the diamond substrate (1) and drying the diamond substrate by blowing;
s2, homoepitaxially growing a single crystal diamond film on the diamond substrate (1) to obtain a single crystal diamond epitaxial film (2);
s3, carrying out hydrogenation treatment on the single crystal diamond epitaxial film (2) to obtain a surface conducting channel (3);
s4, cleaning the single crystal diamond epitaxial film (2) after hydrogenation treatment, then manufacturing a source and drain electrode pattern on the surface of the single crystal diamond epitaxial film by utilizing a photoetching technology, depositing metal, and obtaining ohmic contact of a source electrode (4) and a drain electrode (5) by utilizing a stripping technology;
s5, forming a mesa pattern on the conducting channel (3) by utilizing a photoetching technology, protecting the conducting channel, and carrying out ultraviolet/ozone treatment on the exposed part to electrically isolate the device;
s6, forming a gate electrode pattern on the conductive channel (3) by utilizing a photoetching technology, depositing a low-work-function conductive material and gate metal in sequence, and obtaining a low-work-function conductive gate layer (6) and a gate electrode (7) by utilizing a stripping technology to finish preparation;
the low-work-function conductive gate layer (6) and the conductive channel (3) form Schottky contact, a barrier height reaching a preset threshold value can be generated, and the low-work-function conductive gate layer and the conductive channel are used for pinching off the channel to realize the characteristic of a normally-off device.
9. The method of claim 8, further comprising:
s7, depositing a passivation layer (8) on the whole sample surface prepared in the step S6, and opening passivation layer windows on the source electrode (4), the drain electrode (5) and the gate electrode (7) by utilizing photoetching and etching technologies to obtain the diamond-based field effect transistor with the low work function conductive gate.
10. The method for manufacturing a low work function conductive gate diamond-based field effect transistor according to claim 9,
in step S2, the single crystal diamond epitaxial thin film (2) is a CVD grown diamond material with a thickness of 0.1-10 μ M, a resistivity of 100 MOmega-cm or more, a root mean square surface roughness of 0.5nm or less, and a Raman curve half-peak width of 3cm or less-1The half-peak width of an XRD rocking curve is less than or equal to 50 arcsec;
in the step S3, the hydrogenation treatment is to place the single crystal diamond epitaxial film (2) prepared in the step S2 in hydrogen plasma atmosphere at the treatment temperature of 700-1000 ℃ for 10 seconds-2 hours to obtain the hole surface density of 5 multiplied by 1012~5×1014cm-2The mobility is 20-200cm2/V·s;
In the step S5, the electrical isolation of the device is to treat the exposed surface of the monocrystalline diamond epitaxial film (2) by using ultraviolet/ozone or oxygen plasma, wherein the gas flow of the ozone is 1-100sccm, the power of the oxygen plasma is 100-300W, and the treatment time is 1-60 minutes;
in step S6, the low work function conductive gate layer (6) has a work function less than 4eV, a thickness of 2-500nm, and a material of CaB6、SrB6、BaB6TiC, ZrN, TaC, NbC, HfC, TiN, ZrN, NbN, ThN, or HfN;
in step S7, the material of the passivation layer (8) is SiO2Or SiNx
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