JPH06267887A - Ohmic electrode and its formation - Google Patents

Abstract

PURPOSE:To provide an ohmic electrode having such characteristics that can practically satisfy GaAs semiconductors, etc. CONSTITUTION:The ohmic electrode is formed by successively forming a regrown n<++>-type GaAs layer 2 which is regrown from an n<+>-type GaAs substrate 1, InGaAs layer 3, and NiGe thin film 4 on the substrate 1. The ohmic electrode can be also formed by successively forming an Ni thin film, In thin film, and Ge thin film on the substrate 1 and, after patterning the thin films to the shape of the ohmic electrode, heat-treating the thin films at 400-800 deg.C for several seconds to several minutes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ohmic electrode and a method for forming the same, and more particularly to an ohmic electrode for a III-V compound semiconductor substrate and a method for forming the same.

[0002]

2. Description of the Related Art In order to improve the performance and reliability of a device such as FET using a compound semiconductor, reduction of contact resistance of an ohmic electrode and improvement of thermal stability are important issues. However, as for the ohmic electrode for compound semiconductors, especially III-V group compound semiconductors such as GaAs-based semiconductors, those satisfying the above requirements have not been obtained at present.

[0003] At present, those which have been put to practical use or proposed as ohmic electrodes for GaAs-based semiconductors can be roughly classified into the following three types. That is, as the ohmic electrode of classification 1, an ohmic metal containing an element which becomes a donor impurity with respect to a GaAs semiconductor is used, and the element is diffused into the semiconductor by heat treatment to form an n-type region having a high impurity concentration as an electrode metal. It is formed at the interface between the semiconductor and the semiconductor, and ohmic contact is obtained by the tunnel effect or the like. The ohmic electrode of Class 2 uses an ohmic metal containing an element forming an intermediate layer with a low energy barrier, forms an intermediate layer with a low energy barrier between the electrode metal and the semiconductor by heat treatment, and carriers flow. Ohmic contact is obtained by lowering the height of the energy barrier of a part. The ohmic electrode of classification 3 is an ohmic metal and is G by heat treatment.
The regrowth layer is formed by heat treatment using an element that reacts with the aAs-based semiconductor and contains an element that forms a semiconductor regrowth layer and an element that serves as a donor impurity for the GaAs-based semiconductor. Ohmic contact is obtained due to a high impurity concentration of n-type and tunnel effect or the like.

A typical example of a class 1 ohmic electrode is shown in FIG. In this example, as shown in FIG. 7A, n
Au as an ohmic metal on the ⁺ type GaAs substrate 101
After forming the Ge / Ni thin film 102, 400 to 500 ° C.
By performing a heat treatment in step 1, an ohmic electrode is formed as shown in FIG. 7B. In FIG. 7B, reference numeral 103 is n
^{A ++} type GaAs layer, 104 is a layer in which NiAs and β-AuGa are mixed.

However, the ohmic electrode shown in FIG. 7B has a problem of poor thermal stability. That is, in this case, AuGe / as the ohmic metal
When a large amount of Au contained in the Ni thin film 102 (usually used AuGe contains 88% Au) reacts with the n ⁺ -type GaAs substrate 101 by heat treatment at a temperature of 400 ° C. or higher. Β-AuGa in the layer 104
As a result, the contact resistance of the ohmic electrode is significantly increased. As a result, deterioration of device characteristics is caused by a high temperature process such as chemical vapor deposition (CVD) performed after formation of the ohmic electrode. In addition, n ⁺ type GaA
The formation of β-AuGa by the reaction between the s substrate 101 and Au in the AuGe / Ni thin film 102 causes the surface of the ohmic electrode to become rough, which is a problem in performing subsequent fine processing. .

Further, the ohmic electrode shown in FIG. 7B is
There is also a problem that it is not possible to cope with the thinning of the n ⁺⁺ type GaAs layer 103 and the miniaturization of devices such as FETs. That is, since the n ⁺⁺ type GaAs layer 103 is formed by diffusion during heat treatment, its depth and lateral (direction parallel to the substrate) spread are determined only by the heat treatment temperature and time. Therefore, this n ⁺⁺ type GaAs
It is not possible to control the depth or lateral extent of layer 103. As a result, it is difficult to reduce the thickness of the n ⁺⁺ type GaAs layer 103 and shorten the distance between ohmic electrodes in order to improve the performance and miniaturization of the device.

Ohmic electrodes of Class 2 and Class 3 are
It is proposed to improve the thermal stability of the ohmic electrode and the surface roughness of the electrode surface due to the use of the AuGe / Ni thin film 102 in the formation of the ohmic electrode according to the representative example of the above category 1. is there.

A typical example of a class 2 ohmic electrode is shown in FIG. In this example, as shown in FIG. 8A, n
Ni as an ohmic metal on the ⁺ type GaAs substrate 201
After sequentially forming the In thin film 202 and the W thin film 203,
By performing heat treatment at a high temperature of about 900 ° C. for about 1 second, an ohmic electrode is formed as shown in FIG. 8B. In FIG. 8B, reference numeral 204 is an InGaAs (more accurately, In _x Ga _1-x As is written, but abbreviated as such. The same applies hereinafter) layer 205 is a Ni ₃ In thin film. In this case, the heat treatment causes a reaction between the n ⁺ -type GaAs substrate 201 and In in the NiIn thin film 202, so that the InGaAs layer 20 serves as an intermediate layer having a low energy barrier.
By forming 4, the effective height of the energy barrier is lowered and ohmic contact is obtained. This FIG. 8B
Since the ohmic electrode shown in Fig. 7 does not include a low melting point compound such as β-AuGa in the ohmic electrode of Class 1 shown in Fig. 7B, the contact resistance of the ohmic electrode is stable even after heat treatment at 400 ° C for about 100 hours. It is reported that there is.

However, the ohmic electrode shown in FIG. 8B requires a high temperature heat treatment of about 900 ° C. in order to obtain ohmic contact, so that the ohmic electrode such as JFET (junction gate FET) or HEMT (high electron mobility transistor) is used. It cannot be used for a device that forms a gate or a channel at a temperature of 900 ° C. or lower. Therefore, this ohmic electrode has a problem that the process window is small and the number of applicable devices is small.

A typical example of a class 3 ohmic electrode is shown in FIG. In this example, as shown in FIG. 9A, n
Pd as ohmic metal on ⁺ type GaAs substrate 301
After sequentially forming the thin film 302 and the Ge thin film 303, 3
By performing heat treatment at 25 to 375 ° C. for about 30 minutes, an ohmic electrode is formed as shown in FIG. 9B. In FIG. 9B, reference numeral 304 is an n ⁺⁺ type GaAs layer, 305
Indicates a PdGe thin film. In this case, during the heat treatment, a GaAs regrowth layer is first formed from the n ⁺ type GaAs substrate 301, and Ge is diffused from the Ge thin film 303 into the regrowth layer to form the n ⁺⁺ type GaAs layer 304. Formed and ohmic contact is obtained.

In the ohmic electrode shown in FIG. 9B, the thickness of the regrown n ⁺⁺ type GaAs layer 304 can be controlled by changing the thicknesses of the Pd thin film 302 and the Ge thin film 303 as ohmic metals. , This n ⁺⁺ type G
It is possible to reduce the thickness of the aAs layer 304, and
It is also possible to reduce the distance between the ohmic electrodes. However, the ohmic electrode shown in FIG. 9B has a great problem in thermal stability.

Table 1 collectively shows various characteristics of the ohmic electrodes of Class 1, Class 2 and Class 3 described above.

Table 1 ────────────────────────────────── Classification Process difficulty Contact resistance Thermal stability Surface flatness Properties Short diffusion distance ────────────────────────────────── 1 〇 〇 × × × 2 × 〇 〇 〇 〇 〇 3 〇 〇 × 〇 〇 ────────────────────────────────── The present invention 〇 〇 〇 〇 〇 ─── ───────────────────────────────

[0014]

As described above, since the conventional ohmic electrodes for GaAs semiconductors are all unsatisfactory, it has been desired to realize an ohmic electrode having practically satisfactory characteristics.

Accordingly, it is an object of the present invention to provide an ohmic electrode having practically satisfactory characteristics for a GaAs-based semiconductor or other III-V group compound semiconductor substrate.

Another object of the present invention is to provide a method for forming an ohmic electrode capable of easily forming an ohmic electrode having practically satisfactory characteristics for a GaAs-based semiconductor or other III-V group compound semiconductor substrate. To do.

[0017]

In order to achieve the above object, the ohmic electrode according to the present invention is regrown from a III-V compound semiconductor substrate and has a higher impurity concentration than that of a III-V compound semiconductor substrate. A semiconductor having a grown III-V group compound semiconductor layer, a semiconductor layer formed on the regrown III-V group compound semiconductor layer, and a thin film made of a metal or an intermetallic compound formed on the semiconductor layer. The height of the energy barrier between the layer and the thin film made of metal or intermetallic compound is lower than the height of the energy barrier between the regrown III-V compound semiconductor layer and the thin film made of metal or intermetallic compound. Is characterized by.

Here, the III-V compound semiconductor substrate includes
For example, a substrate or layer made of GaAs, AlGaAs, InGaAs, etc. is included. When the III-V compound semiconductor substrate is n-type, Si, G, etc. may be used as a donor impurity in the III-V compound semiconductor substrate.
e, Te, Sn, etc. are included. These donor impurities include, for example, ion implantation, liquid phase epitaxy (LPE),
It is introduced into the III-V group compound semiconductor substrate by a method such as molecular beam epitaxy (MBE) or metalorganic vapor phase epitaxy (MOVPE).

The regrown III-V compound semiconductor layer includes, for example, a layer made of GaAs, AlGaAs, InGaAs or the like. In a preferred embodiment of this invention,
The impurity concentration of this regrown III-V compound semiconductor layer is III-
It is much higher than the impurity concentration of the group V compound semiconductor substrate. In a preferred embodiment of the present invention, the regrown III-V compound semiconductor layer has a crystal lattice matching with the III-V compound semiconductor substrate. The height of the energy barrier between the regrown III-V compound semiconductor layer and the metal or intermetallic compound is the same as the height of the energy barrier between the III-V compound semiconductor substrate and the metal or intermetallic compound. Or lower. This regrown III-V compound semiconductor layer is formed, for example, on a III-V compound semiconductor substrate by an element serving as a donor impurity for the III-V compound semiconductor substrate, such as Ni, Co, Pd, or Pt. It can be formed by forming a thin film made of such a metal by a method such as vacuum deposition or sputtering and then performing heat treatment to cause re-growth. Also this regrowth III-
The group V compound semiconductor layer is formed by directly epitaxially growing a group III-V compound semiconductor layer on a group III-V compound semiconductor substrate by a method such as MBE or MOVPE, and forming a group III-V compound semiconductor on the group III-V compound semiconductor layer. Elements serving as donor impurities for the semiconductor substrate, such as Ni, Co, Pd, Pt
It is also possible to form a thin film made of a metal such as by forming a thin film by a method such as vacuum deposition or sputtering and then performing heat treatment to cause re-growth.

The semiconductor layer is made of, for example, GaAs or AlGa.
Layers made of III-V group compound semiconductors such as As and InGaAs are included. In a preferred embodiment of the present invention, the semiconductor layer is crystal lattice matched to the regrown III-V compound semiconductor layer. The height of the energy barrier between the semiconductor layer and the metal or intermetallic compound is regrown III-
It is lower than the height of the energy barrier between the group V compound semiconductor layer and the metal or intermetallic compound. Further, in this semiconductor layer, for example, Si, Ge, Te, S is used as a donor impurity.
A metal such as n may be included. This semiconductor layer is
For example, Ni, Co, P on a III-V group compound semiconductor substrate
An element that forms a thin film of a metal such as d or Pt and lowers the height of the energy barrier, for example, I
It can be formed by forming a thin film of n by a method such as vacuum deposition or sputtering, and then performing heat treatment to regrow it on the regrown III-V compound semiconductor layer. This semiconductor layer can also be directly epitaxially grown on the regrown III-V compound semiconductor layer by a method such as MBE or MOVPE.

The thin film made of metal or intermetallic compound is
It preferably has a sufficiently low electrical resistivity and a melting point of 800 ° C. or higher. The thin film made of this metal or intermetallic compound includes, for example, a single metal such as W and Ta, a binary intermetallic compound such as NiGe, NiSi, and WSi _2, and a ternary intermetallic compound. Those composed of compounds are included. A thin film made of this metal or intermetallic compound is formed, for example, on a III-V group compound semiconductor substrate with N
A thin film made of a metal such as i, Co, Pd, Pt, etc. is formed, a thin film made of, for example, In is formed on the thin film, and a thin film made of Ge or the like is further formed on the thin film. It can be formed on a layer. The thin film made of this metal or intermetallic compound can also be formed on the semiconductor layer by a method such as vacuum deposition or sputtering.

On a thin film made of a metal or an intermetallic compound, a metal having a sufficiently low electric resistivity, such as A, is preferably used.
A thin film made of 1, Au, Au / Ti, or the like may be formed.

The method of forming an ohmic electrode according to the present invention comprises a first thin film, a metal or a first thin film made of a first element which serves as a donor impurity for the III-V compound semiconductor substrate on the III-V compound semiconductor substrate. A second thin film made of a second element that lowers the height of the energy barrier between the intermetallic compound and the III-V compound semiconductor, and a third thin film which forms an intermetallic compound by reaction with the first element. Third consisting of elements
And the step of heat-treating the III-V group compound semiconductor substrate on which the first thin film, the second thin film and the third thin film are formed.

Here, the III-V group compound semiconductor substrate includes
Substrates or layers of, for example, GaAs, AlGaAs or InGaAs are included. Similarly, III-V group compound semiconductors include, for example, GaAs, AlGaAs, or InGaAs. In a preferred embodiment of the present invention, the first thin film, the second thin film and the third thin film are a Ni thin film, an In thin film and a Ge thin film, respectively. Further, in a preferred embodiment of the present invention, the temperature of the heat treatment is 400 to 800 ° C.

[0025]

With the ohmic electrode according to the present invention having the above-described structure, the characteristics required for a device in practice,
That is, it is possible to realize an ohmic electrode satisfying thermal stability, low contact resistance, low film resistance, surface flatness, short diffusion distance, and the like, and the process required for its formation is easy.

According to the ohmic electrode forming method of the present invention having the above-described structure, it is possible to easily form the ohmic electrode satisfying the characteristics practically required for the device.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

[0028] In this embodiment, as shown in FIG. 1, n ⁺ -type on the GaAs substrate 1, the n ⁺ -type GaAs substrate 1 from the regrown n ⁺⁺ type regrown GaAs layer 2, InG
An ohmic electrode having a structure in which the aAs layer 3 and the NiGe thin film 4 are sequentially stacked is formed.

FIG. 2 shows an energy band diagram of the ohmic electrode according to this embodiment. In FIG. 2, E _c and E _v
Represents the energy at the bottom of the conduction band and the energy at the top of the valence band, and E _F represents the Fermi energy.
As can be seen from FIG. 2, the n ⁺⁺ type regrown GaAs layer 2 and N
Since the InGaAs layer 3 is formed between the iGe thin film 4 and the iGe thin film 4, the height of the energy barrier between the n ⁺⁺ regrown GaAs layer 2 and the NiGe thin film 4 is effectively lowered.

Next, a method for forming the ohmic electrode according to this embodiment having the above-mentioned structure will be described.

First, as shown in FIG. 3A, n ⁺ type GaA
After coating a photoresist on the substrate 1, the photoresist is patterned by a photolithography method to form a resist pattern 5 having an opening at a portion corresponding to an ohmic electrode to be formed. The exposure in this photolithography is performed using an optical exposure apparatus such as a reduction projection exposure apparatus (so-called stepper). The resist pattern 5 is formed by
It may be performed using an electron beam resist and an electron beam lithography method.

Next, as shown in FIG. 3B, a Ni thin film 6, an In thin film 7 and a Ge thin film 8 are sequentially formed on the entire surface by a method such as sputtering or vacuum deposition. in this case,
The thickness of the resist pattern 5 is such that these Ni thin films 6, I
It is selected to be sufficiently larger than the total thickness of the n thin film 7 and the Ge thin film 8.

Next, the resist pattern 5 is dissolved and removed by immersing the n ⁺ type GaAs substrate 1 on which the Ni thin film 6, the In thin film 7 and the Ge thin film 8 are formed in this way in an organic solvent such as acetone. Thus, the Ni thin film 6, the In thin film 7 and the Ge thin film 8 formed on the resist pattern 5 are removed. As a result, as shown in FIG. 3C, n ⁺ -type Ga in the opening of the resist pattern 5 is formed.
Ni thin film 6, In thin film 7 and Ge only on As substrate 1
The thin film 8 is left.

Next, the n ⁺ type GaAs substrate 1 on which the Ni thin film 6, In thin film 7 and Ge thin film 8 are formed is subjected to, for example, N by a method such as RTA (Rapid Thermal Annealing) method or a general electric furnace. Heat treatment is performed in a _two- gas atmosphere at a temperature of 400 to 800 ° C. for a few seconds to a few minutes, for example. By this heat treatment, as shown in FIG.
^{When the} GaAs layer is regrown from the ⁺ type GaAs substrate 1 and Ni is diffused into this GaAs layer, an n ⁺⁺ type regrown GaAs layer 2 is formed, and on the n ⁺⁺ type regrown GaAs layer 2. InG due to the reaction between In and GaAs
The aAs layer 3 is formed, and further the InGaAs layer 3 is formed.
The NiGe thin film 4 is formed on the upper surface by the reaction of Ni and Ge.

As described above, the ohmic electrode shown in FIG. 1 is formed.

The heat treatment for forming the above ohmic electrode is performed by the RTA method, and the heat treatment temperature at that time is 5
FIG. 4 shows the change in contact resistance of the ohmic electrode when changing from 00 ° C. to 730 ° C. However, in the sample used for the measurement, the Ni thin film 6, the In thin film 7 and the Ge thin film 8 were formed by the electron beam evaporation method, and the thickness of each of the Ni thin film 6, the In thin film 7 and the Ge thin film 8 was 60.
nm, 3 nm and 100 nm. As a result of observing the Ni thin film 6, the In thin film 7, and the Ge thin film 8 before the heat treatment with a transmission electron microscope, the In thin film 7
Was confirmed to exist at the interface between the Ni thin film 6 and the Ge thin film 8.

As is apparent from FIG. 4, the heat treatment is performed at 700
Good contact resistance can be obtained by carrying out at a temperature of around ℃. As a result of observing the ohmic electrode formed by performing the heat treatment at a temperature of about 700 ° C. with a transmission electron microscope, N formed by the reaction between Ni and Ge was observed.
An iGe thin film is formed on the uppermost surface, and this NiGe thin film and n
It was observed that an InGaAs layer having a low energy barrier was formed between the ⁺⁺ type regrown GaAs layer.
Also, many streaks were observed in the n ⁺⁺ type regrown GaAs layer near the interface between the n ⁺⁺ type regrown GaAs layer and the InGaAs layer, but these streaks were formed at low temperature in NiGa.
This is a lattice defect generated when the GaAs layer and the InGaAs layer are regrown from the As layer.

FIG. 5 shows the change with time of the contact resistance of the ohmic electrode when the sample is heat-treated at 400 ° C. after the ohmic electrode is formed by heat-treating at 700 ° C. by the RTA method in the above-mentioned embodiment, that is, The result of having measured the thermal stability of an ohmic electrode is shown. As is clear from FIG. 5, even if the heat treatment is performed at 400 ° C. for 1 hour or more after the ohmic electrode is formed, the contact resistance hardly changes.

In FIG. 6, the thickness of the Ni thin film 6 and the Ge thin film 8 for forming the ohmic electrode is fixed to 60 nm and 100 nm, respectively, and the In thin film 7 is formed in the above-described embodiment.
The change in the contact resistance of the ohmic electrode when the thickness of is changed is shown. However, the heat treatment for forming the ohmic electrode was performed at 700 ° C. by the RTA method. As is clear from FIG. 6, by setting the thickness of the In thin film 7 to 3 nm or more, the value of contact resistance sharply decreases and the contact resistance is improved. From this fact, I was added to the film for forming the ohmic electrode.
InGa having a low energy barrier including an n thin film 7
It can be seen that forming the As layer is important for improving the contact resistance of the ohmic electrode.

As described above, according to this embodiment, n
^A Ni thin film 6, an In thin film 7, and a Ge thin film 8 are formed in a predetermined pattern on the ⁺ type GaAs substrate 1, and then 400
By performing the heat treatment at a temperature of to 800 ° C., as shown in FIG. 1, on the n ⁺ -type GaAs substrate 1, n ⁺⁺ type regrown G
An ohmic electrode having a structure in which the aAs layer 2, the InGaAs layer 3, and the NiGe thin film 4 are sequentially stacked can be formed. This ohmic electrode has good thermal stability and surface flatness, low contact resistance, low film resistance, short diffusion distance, and the process required for its formation is simple. It is extremely excellent.

Although one embodiment of the present invention has been specifically described above, the present invention is not limited to the above embodiment, and various modifications can be made based on the technical idea of the present invention. .

For example, in the method of forming the ohmic electrode described in the above-mentioned embodiment, the Ni thin film 6, the In thin film 7 and the Ge thin film 8 having a shape corresponding to the ohmic electrode were formed by the so-called lift-off method. Ni thin film 6 and In thin film 7 having shapes corresponding to the electrodes
And Ge thin film 8 are formed on the entire surface of n ⁺ type GaAs substrate 1 by N
After forming the i thin film 6, the In thin film 7 and the Ge thin film 8 in order, these Ni thin film 6, In thin film 7 and Ge thin film 8 are formed.
May be formed by patterning into the shape of the ohmic electrode by an etching method.

Further, in the above-described embodiment, the case where the present invention is applied to the ohmic electrode for the n ⁺ type GaAs substrate 1 has been described, but for example, for the ohmic electrode for the n ⁺ type GaAs layer formed by epitaxial growth or the like. It is also possible to apply the present invention.

[0044]

As described above, according to the ohmic electrode of the present invention, it is possible to realize the ohmic electrode having practically satisfactory characteristics for the III-V compound semiconductor substrate. Further, according to the method for forming an ohmic electrode according to the present invention, it is possible to easily form an ohmic electrode having practically satisfactory characteristics for a III-V group compound semiconductor substrate.

[Brief description of drawings]

FIG. 1 is a sectional view showing an ohmic electrode according to an embodiment of the present invention.

FIG. 2 is an energy band diagram of an ohmic electrode according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a method of forming an ohmic electrode according to an embodiment of the present invention.

FIG. 4 is a graph showing an example of measurement results of heat treatment temperature dependence of contact resistance of an ohmic electrode according to an embodiment of the present invention.

FIG. 5 is a graph showing an example of measurement results of thermal stability of ohmic electrodes according to an example of the present invention.

FIG. 6 is a graph showing an example of the measurement result of the thickness dependence of the contact resistance of the ohmic electrode of the In thin film for forming the ohmic electrode according to the embodiment of the present invention.

FIG. 7 is a cross-sectional view for explaining an example of a conventional ohmic electrode.

FIG. 8 is a cross-sectional view for explaining another example of the conventional ohmic electrode.

FIG. 9 is a cross-sectional view for explaining still another example of the conventional ohmic electrode.

[Explanation of symbols]

1 n ⁺ type GaAs substrate 2 n ⁺⁺ type regrown GaAs layer 3 InGaAs layer 4 NiGe thin film 5 Resist pattern 6 Ni thin film 7 In thin film 8 Ge thin film

Claims (16)

[Claims] 1. A regrown III-V compound semiconductor layer regrown from a III-V compound semiconductor substrate having a higher impurity concentration than that of the III-V compound semiconductor substrate, and the regrown III-V compound. A semiconductor layer formed on the semiconductor layer, and a thin film made of a metal or an intermetallic compound formed on the semiconductor layer, between the semiconductor layer and the thin film made of the metal or an intermetallic compound. The ohmic electrode is characterized in that the height of the energy barrier is lower than the height of the energy barrier between the regrown III-V compound semiconductor layer and the thin film made of the metal or intermetallic compound. 2. The ohmic electrode according to claim 1, wherein the group III-V compound semiconductor substrate and the regrown group III-V compound semiconductor layer are n-type. 3. The ohmic electrode according to claim 1, wherein the III-V compound semiconductor substrate and the regrown III-V compound semiconductor layer have crystal lattices matched with each other. 4. The ohmic electrode according to claim 1, wherein the regrown III-V compound semiconductor layer and the semiconductor layer have crystal lattices matched with each other. 5. The group III-V compound semiconductor substrate is GaA.
The ohmic electrode according to claim 1 or 2, which is made of s, AlGaAs or InGaAs. 6. The regrown III-V compound semiconductor layer is G
The ohmic electrode according to claim 1, which is made of aAs, AlGaAs or InGaAs. 7. The semiconductor layer is GaAs or AlGaAs
7. The ohmic electrode according to claim 1, 2, 5 or 6, which is made of InGaAs. 8. The melting point of the metal or intermetallic compound is 8
It is 00 degreeC or more, The ohmic electrode as described in any one of Claims 1-7 characterized by the above-mentioned. 9. The ohmic electrode according to claim 1, wherein the metal is W or Ta. 10. The intermetallic compound according to claim 1, wherein the intermetallic compound is a binary or ternary intermetallic compound.
The ohmic electrode according to claim 1. 11. The intermetallic compound is NiGe or NiS.
claim, characterized in that a i or WSi ₂ 1 to 7
The ohmic electrode according to claim 1. 12. A III-V compound semiconductor substrate, the above
A first thin film made of a first element that serves as a donor impurity for a III-V group compound semiconductor substrate, and a height of an energy barrier between the metal or intermetallic compound and the III-V group compound semiconductor, A step of sequentially forming a second thin film of the second element and a third thin film of the third element that forms an intermetallic compound by reaction with the first element, and the first thin film and the first thin film. And a step of heat-treating the III-V group compound semiconductor substrate on which the thin film of No. 2 and the third thin film have been formed. 13. The III-V compound semiconductor substrate is Ga.
13. The method for forming an ohmic electrode according to claim 12, wherein the ohmic electrode is made of As, AlGaAs or InGaAs. 14. The III-V compound semiconductor is GaA.
14. The method for forming an ohmic electrode according to claim 12, wherein the ohmic electrode is s, AlGaAs or InGaAs. 15. The ohmic electrode according to claim 12, 13 or 14, wherein the first thin film, the second thin film and the third thin film are a Ni thin film, an In thin film and a Ge thin film, respectively. Forming method. 16. The temperature of the heat treatment is 400 to 800 ° C.
16. The method for forming an ohmic electrode according to claim 12, 13, 14 or 15.