JP3768348B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device made of a group III-V compound semiconductor having a non-alloy ohmic contact and a method for manufacturing the same.
[0002]
[Prior art]
III-V group compound semiconductor devices are applied to various products that require high-speed operation. For example, GaAs MESFETs are widely used in mobile communication systems such as mobile phones, and high electron mobility transistors (HEMTs) are widely used in satellite broadcast receiving antennas.
[0003]
Wiring is extracted from these semiconductor devices by reducing the Schottky barrier width between the metal wiring layer and the compound semiconductor layer by providing an ohmic contact region on the surface of the III-V compound semiconductor layer. . In the above-described semiconductor device that requires high-speed operation, the performance of the ohmic contact directly affects the device characteristics. Therefore, it is desired to form an ohmic contact having a lower contact resistance and a higher ohmic property.
[0004]
Hereinafter, a conventional ohmic contact structure and manufacturing method will be described by taking n-type GaAs, which is a typical III-V group compound semiconductor, as an example.
Since GaAs has many interface states on its surface, when a metal film is formed directly on GaAs, a high Schottky barrier of about 0.8 eV is formed by Fermi level pinning regardless of the type of metal. Therefore, in the case of n-type GaAs, for example, an AuGeNi alloy is deposited on GaAs and alloyed with GaAs to form an ohmic contact layer.
[0005]
In the above system that forms an ohmic contact by alloying, the Schottky barrier layer is thinned by diffusing Ge of the n-type dopant in the vicinity of the GaAs surface in a high concentration, and the ohmic contact is realized by facilitating the tunneling of electrons. To do. However, since it is difficult to control the diffusion of Ge by heat treatment, it is desirable to form an ohmic contact by non-alloy without heat treatment in order to improve controllability and reliability in the manufacturing process.
[0006]
In order to form a non-alloy ohmic contact, it is necessary to cancel the Fermi level pinning and reduce the height of the Schottky barrier by contacting a metal having a small work function difference with GaAs.
The inventors of the present application have attempted to form an ohmic contact by non-alloy from such a viewpoint. In Japanese Patent Application No. 8-248170, the raw material is a tertiary-butyl-gallium-sulfide cubane, Chemical formula: ((t-Bu) GaS) _Four The surface state density of the GaAs surface is reduced to 5 × 10 by depositing a GaS layer on the GaAs by MBE (Molecular Beam Epitaxy) method. ^Ten eV ^-1 cm ^-2 It is shown that it can be reduced.
[0007]
Further, as shown in FIG. 12, when metals (Ti, Al, Au) having different work functions are formed on a GaS layer on GaAs, the IV characteristics due to the combination change remarkably. It is clear that Fermi level pinning on the GaAs surface is released by forming the GaS layer on GaAs.
In the above combination, when the Ti layer having the smallest work function difference from GaAs is formed on the GaS layer, ohmic-like IV characteristics are obtained, and the contact resistivity at this time is about 4 × 10 ^-3 Ωcm ² Met.
[0008]
[Problems to be solved by the invention]
However, Ti layer / GaS layer / n ⁺ In the above-described conventional semiconductor device in which an ohmic contact is formed with a GaAs structure, the contact resistivity can be obtained when the conventional alloy system using AuGeNi is 10 ^-6 Ωcm ² It is extremely high compared to the contact resistance of the base, and it cannot be said that it has sufficient characteristics to replace the alloy type ohmic contact.
[0009]
An object of the present invention is to provide a semiconductor device having a non-alloy ohmic contact that can obtain a contact resistivity comparable to that obtained by alloy ohmic contact and a method for manufacturing the same.
[0010]
[Means for Solving the Problems]
The object is to form at least a Ti-V group compound semiconductor layer and the III-V group compound semiconductor layer, at least Ti. Sulfides, selenides or tellurides containing This is achieved by a semiconductor device comprising an ohmic contact layer comprising a metal layer and a metal layer formed on the ohmic contact layer. By configuring the semiconductor device in this manner, the contact resistance between the III-V compound semiconductor layer and the metal layer is reduced to a value approximately equal to the value obtained by alloy ohmic contact using AuGeNi. can do.
[0011]
Further, the object is to provide a channel layer formed on a semiconductor substrate, an electron supply layer formed on the channel layer, and a contact layer made of a III-V group compound semiconductor formed on the electron supply layer. , Formed on the contact layer, and at least Ti Sulfides, selenides or tellurides containing An ohmic contact layer, a source / drain electrode formed on the ohmic contact layer, and a gate electrode formed on the electron supply layer between the source / drain electrodes. Is also achieved. By configuring the semiconductor device in this manner, the contact resistance between the source / drain electrodes and the contact layer can be reduced to a value almost equal to a value obtained by alloy ohmic contact using AuGeNi. it can. Thereby, a semiconductor device having a low-resistance ohmic contact layer excellent in reliability can be formed with good controllability.
[0012]
In the semiconductor device, the ohmic contact layer is preferably a TiGaS layer or a TiS layer.
In the above semiconductor device, the ohmic contact layer is preferably a TiGaSe layer or a TiSe layer.
In the semiconductor device, the ohmic contact layer is preferably a TiGaTe layer or a TiTe layer.
[0013]
In the semiconductor device, the III-V compound semiconductor layer may be a GaAs layer, an AlGaAs layer, an InGaAs layer, an InAlAs layer, an InGaP layer, an InAlP layer, an InGaAlAs layer, an InGaAlP layer, an InP layer, a GaP layer, or an AlP layer. It is desirable that
The above object is also achieved by providing at least Ti on the III-V compound semiconductor layer. Sulfides, selenides or tellurides containing It is also achieved by a method for manufacturing a semiconductor device, characterized by comprising a step of forming an ohmic contact layer made of a layer containing. By manufacturing the semiconductor device in this manner, an ohmic contact layer having a contact resistance substantially equal to a value obtained by alloy ohmic contact using AuGeNi can be formed on the III-V compound semiconductor layer. it can.
[0014]
In the method for manufacturing a semiconductor device, the ohmic contact layer is preferably grown by a molecular beam epitaxial growth method. The ohmic contact layer can be formed directly on the III-V compound semiconductor layer by the MBE method.
In the method for manufacturing a semiconductor device, a step of forming a GaS layer on the III-V compound semiconductor layer, a step of forming a Ti layer on the GaS layer, the GaS layer, and the Ti It is desirable to have a step of reacting a layer and forming the ohmic contact layer made of a layer containing at least Ti and S on the III-V compound semiconductor layer. The ohmic contact layer can be formed by reacting a GaS layer and a Ti layer.
[0015]
In the method for manufacturing a semiconductor device, a step of forming a GaSe layer on the III-V compound semiconductor layer, a step of forming a Ti layer on the GaSe layer, the GaSe layer, and the Ti It is desirable to have a step of reacting a layer and forming the ohmic contact layer made of a layer containing at least Ti and Se on the III-V compound semiconductor layer. The ohmic contact layer can be formed by reacting a GaSe layer and a Ti layer.
[0016]
In the method of manufacturing a semiconductor device, a step of forming a GaTe layer on the III-V compound semiconductor layer, a step of forming a Ti layer on the GaTe layer, the GaTe layer, and the Ti It is desirable to have a step of reacting a layer and forming the ohmic contact layer made of a layer containing at least Ti and Te on the III-V compound semiconductor layer. The ohmic contact layer can be formed by reacting a GaTe layer and a Ti layer.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
[First Embodiment]
The semiconductor device and the manufacturing method thereof according to the first embodiment of the present invention will be described with reference to FIGS.
1 is a schematic cross-sectional view showing the structure of the semiconductor device according to the present embodiment, FIGS. 2 to 4 are process cross-sectional views showing a method for manufacturing the semiconductor device according to the present embodiment, and FIG. 5 is a reaction pattern in the process of forming an ohmic contact layer. FIG. 6 is a schematic cross-sectional view showing the structure of a measurement pattern used to measure the electrical characteristics of the semiconductor device according to the present embodiment. FIG. 7 is an electrical diagram of the ohmic contact layer in the semiconductor device according to the present embodiment. FIG. 8 is a graph showing the relationship between contact resistivity and heat treatment temperature.
[0018]
First, the structure of the semiconductor device according to the present embodiment will be explained with reference to FIG.
A buffer layer 12 made of undoped GaAs is formed on the GaAs substrate 10. On the buffer layer 12, In _0.2 Ga _0.8 A channel layer 14 made of As is formed. On the channel layer 14, n ⁺ -Al _0.3 Ga _0.7 An electron supply layer 16 made of As is formed. On the electron supply layer 16, n ⁺ A contact layer 18 made of -GaAs is formed. . The contact layer 18 is provided with a recess region 22, and a gate electrode 36 made of Al is formed on the electron supply layer exposed in the recess region 22. On the contact layer 18, an ohmic contact layer 30 made of a TiGaS layer is formed. A source / drain electrode 32 is formed on the ohmic contact layer 30. Thus, a high electron mobility transistor is formed.
[0019]
Here, the semiconductor device according to the present embodiment is characterized in that a TiGaS layer is used as the ohmic contact layer 30 provided in order to realize an ohmic connection between the semiconductor layer and the metal layer. That is, S (sulfur) in the TiGaS layer functions as passivation of the contact layer 18 and contributes to the reduction of the surface state density of GaAs. Further, the TiGaS layer behaves like a metal and the ohmic contact resistance value itself is reduced. Therefore, by configuring the semiconductor device in this way, the contact characteristics can be greatly improved.
[0020]
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS.
First, a buffer layer 12 made of undoped GaAs having a thickness of about 500 nm and an In layer having a thickness of about 15 nm are formed on the GaAs substrate 10 by MBE. _0.2 Ga _0.8 Channel layer 14 made of As, film thickness of about 15 nm, donor concentration 2 × 10 ¹⁸ cm ^-3 N ⁺ -Al _0.3 Ga _0.7 An electron supply layer 16 made of As, a film thickness of about 10 nm, and a donor concentration of 2 × 10 ¹⁸ cm ^-3 N ⁺ The contact layer 18 made of -GaAs is epitaxially grown sequentially (FIG. 2A). The growth conditions are, for example, a substrate temperature of 580 ° C., a GaAs growth rate of 1 μm / h, and an AlGaAs growth rate of 1.3 μm / h.
[0021]
Next, the GaAs substrate 10 on which the epitaxial crystal layer is grown in this way is introduced into an MBE apparatus for forming a GaS layer, and trisdimethylaminoarsine (chemical formula: As [N (CH _Three ) ₂ ] _Three ) Is used to clean the substrate surface. Trisdimethylaminoarsenic has an effect of removing the oxide film at a low temperature, and the surface oxide film can be removed by irradiating the substrate surface with trisdimethylaminoarsenic. The cleaning conditions are, for example, a substrate temperature of 500 ° C., a trisdimethylaminoarsenic flow rate of 0.2 sccm, and a processing time of 5 minutes.
[0022]
N ⁺ An amorphous GaS layer 20 having a thickness of about 15 nm is deposited on the contact layer 18 made of GaAs by MBE (FIG. 2B). For example, ((t-Bu) GaS) of a raw material placed in a PBN crucible of a Knudsen cell heated to 100 ° C. with a substrate temperature of 350 ° C. _Four Is irradiated onto the substrate by opening the shutter, and the GaS layer 20 is grown.
[0023]
Thereafter, the GaS layer 20 and the contact layer 18 are etched to form a recess region 22 for forming a gate electrode on the electron supply layer 16 (FIG. 2C).
Next, an SiON film 24 having a thickness of about 100 nm is formed on the entire surface by, eg, CVD (FIG. 3A). The SiON film 24 functions as an interlayer insulating film.
Subsequently, an opening 26 for forming an ohmic contact region is formed in the SiON film 24 on the contact layer 18.
[0024]
Thereafter, a Ti (titanium) layer having a thickness of about 10 nm, a Pt (platinum) layer having a thickness of about 40 nm, and an Au (gold) layer having a thickness of about 300 nm are sequentially deposited on the entire surface.
Next, the conductive layer 28 made of Au layer / Pt layer / Ti layer is left only in the opening 26 by lift-off (FIG. 3B).
Subsequently, for example, heat treatment is performed at 300 ° C. for 10 minutes to form an ohmic contact layer 30 that is a reaction layer of the GaS layer 20 and the Ti layer, and a source / drain electrode 32 made of Au layer / Pt layer / Ti layer. .
[0025]
In this heat treatment, as shown in FIGS. 5A and 5B, a substitution reaction occurs between Ti in the Ti layer 28a and Ga in the GaS layer 20, and n ⁺ On the contact layer 18 made of -GaAs, an ohmic contact layer 30 made of a TiGaS layer is formed. On the ohmic contact layer 30, a TiGa layer 28c in which a part of Ti is replaced with Ga is formed. When the TiGaS layer is formed in this manner, S (sulfur) in the TiGaS layer functions as a passivation of the contact layer 18 and the surface state density of GaAs is reduced. In addition, the TiGaS layer behaves like a metal. As a result, an ohmic contact is formed between the Pt layer and the contact layer 18.
[0026]
Thereafter, an opening 34 for forming a gate electrode is formed in the SiON film 24 on the recess region 22.
Next, an Al (aluminum) layer having a film thickness of about 200 nm is deposited on the entire surface by, for example, a vacuum evaporation method and lifted off to form a gate electrode 36 made of an Al layer in the opening 34.
[0027]
Thereby, the HEMT in which the contact resistance and ohmic property of the ohmic contact layer 30 are improved can be formed.
In order to measure the electrical characteristics in the ohmic contact layer 30 thus formed, a measurement pattern as shown in FIG. 6 was formed.
The measurement pattern shown in FIG. 6 is formed on the GaAs substrate 40 with n. ⁺ The GaAs layer 42 is epitaxially grown, the GaS layer 44 and the conductive layer 46 are formed by the same method as described above, and then heat treatment for forming an ohmic contact layer is performed. For some samples, heat treatment for forming an ohmic contact layer was not performed for comparison.
[0028]
When the current-voltage characteristics of the measurement pattern thus formed were measured, as shown in FIG. 7, the contact resistivity of the sample that was not heat-treated was about 4 × 10. ^-3 Ωcm ² However, the contact resistivity of the heat-treated sample was about 4 × 10 ^-6 Ωcm ² Could be reduced to. This value is obtained in the case of an alloy system using conventional AuGeNi. ^-6 Ωcm ² It is comparable to the contact resistance of the stand.
[0029]
FIG. 8 is a graph showing the relationship between contact resistivity and heat treatment time. In the figure, ◯ indicates the case where the heat treatment temperature is 350 ° C., and ● indicates the case where the heat treatment temperature is 300 ° C.
As shown in the figure, when the heat treatment temperature is 300 ° C., the contact resistivity gradually decreases for the first approximately sufficient time, but thereafter, the contact resistivity increases. This is because, in the initial stage of the heat treatment, the contact resistivity is lowered by forming a TiGaS layer on the contact layer 18, but when the heat treatment is further continued, Ti diffuses into the contact layer 18, This is considered to increase the resistance value.
[0030]
Further, when the heat treatment temperature is 350 ° C., the contact resistivity is about 3 × 10 5 by the heat treatment for about 1 minute. ^-6 Ωcm ² However, it increases rapidly as the heat treatment time increases.
Thus, the contact resistivity of the ohmic contact layer 30 varies greatly depending on the heat treatment conditions and the thickness of the GaS layer. Therefore, it is desirable to appropriately set the heat treatment conditions for forming the ohmic contact layer 30 according to the film thickness of the GaS layer and the like. That is, when Ti diffuses into the contact layer 18, the resistance value in the contact layer 18 is increased. Therefore, the heat treatment condition is that at least a substitution reaction between Ti in the Ti layer and Ga in the GaS layer occurs. In this case, it is necessary to set in a range in which Ti in the Ti layer does not diffuse into the contact layer 18.
[0031]
Thus, according to this embodiment, n ⁺ Since the ohmic contact layer 30 made of the TiGaS layer is formed on the contact layer 18 made of GaAs, the contact resistivity in the contact region is almost equal to the contact resistivity obtained in the case of an alloy system using AuGeNi. Can be reduced. Thereby, an ohmic contact layer excellent in reliability can be formed with good controllability.
[0032]
In the above embodiment, a GaS layer and a Ti layer are deposited on GaAs, and the ohmic contact layer 30 made of the TiGaS layer is formed by heat treatment. However, all the Ga in the GaS layer 20 is replaced by Ti, and the TiS layer is formed. An ohmic contact layer 30 may be formed. Since the effect similar to the above can be obtained if Ti containing S having an effect of passivating the surface level of GaAs and Ti having a small work function difference with respect to GaAs is included, at least the ohmic contact layer 30 has Ti. And S may be included.
[0033]
As another element having an effect of passivating the surface level of GaAs, for example, Se (selenium) or Te (tellurium) can be used.
That is, a GaSe layer or GaTe layer and a Ti layer are deposited on the GaAs contact layer 18 and subjected to heat treatment to form an ohmic contact layer 30a made of a TiGaSe layer (or TiSe layer) (FIG. 9), or Also by forming the ohmic contact layer 30b made of a TiGaTe layer (or TiTe layer) (FIG. 10), the same effect as in the present embodiment can be obtained.
[0034]
When depositing these films, as a raw material, for example, tertiary-butyl-gallium-selenide cubane, chemical formula: ((t-Bu) GaSe) _Four ), Tertiary-butyl-gallium-telluride cubane, chemical formula: ((t-Bu) GaTe) _Four ), Solid Ga, solid Se, or solid Te.
[0035]
[Second Embodiment]
A semiconductor device and a manufacturing method thereof according to the second embodiment of the present invention will be described with reference to FIGS.
FIG. 11 is a schematic cross-sectional view showing the structure and manufacturing method of the semiconductor device according to the present embodiment.
[0036]
In the semiconductor device and the manufacturing method thereof according to the first embodiment, the ohmic contact layer 32 made of the TiGaS layer is formed on the contact layer 18 by reacting the GaS layer and the Ti layer. It cannot be obtained unless the GaS layer and Ti layer are reacted. That is, the low resistance ohmic contact layer 30 similar to that described above can also be formed by directly growing a TiGaS layer on GaAs.
[0037]
That is, in the step shown in FIG. 2B, instead of forming the GaS layer 20, a TiGaS layer is formed directly to form an ohmic contact layer 30 (FIG. 11A), and source / drain electrodes are formed thereon. By depositing 32, an ohmic contact layer having low contact resistivity and excellent reliability can be formed with good controllability (FIG. 11B).
[0038]
The TiGaS layer 48 is formed by using solid Ga, Ti (St-Bu). _Four It is possible to apply the MBE method using
As described above, according to the present embodiment, the ohmic contact layer 30 made of the TiGaS layer is formed directly on the contact layer 18 made of GaAs, so that the contact resistivity in the contact region is made of an alloy system using AuGeNi. It can be reduced to almost the same as the contact resistivity obtained. Thereby, an ohmic contact layer excellent in reliability can be formed with good controllability.
[0039]
In the above embodiment, the TiGaS layer 48 is applied as the ohmic contact layer 30, but the same effect can be obtained by forming a TiS layer instead of the TiGaS layer as shown in the first embodiment. Can do. The same effect can be obtained by forming an ohmic contact layer 30 made of a TiGaSe layer (or TiSe layer) or a TiGaTe layer (or TiTe layer) on GaAs.
[0040]
[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications can be made.
For example, in the first and second embodiments described above, the case where the ohmic contact layer is formed on GaAs has been described as an example, but the same effect can be obtained by using other III-V group compound semiconductors that are the same group as GaAs. be able to. For example, even with a compound semiconductor such as AlGaAs, InGaAs, InAlAs, InGaP, InAlP, InGaAlAs, InGaAlP, InP, GaP, or AlP, a low-resistance ohmic contact layer can be formed by the above-described structure.
[0041]
In the first and second embodiments, the ohmic contact layer according to the present invention is applied to the HEMT. However, various semiconductor devices having an ohmic contact between a group III-V compound semiconductor and a metal layer are used. Can be applied.
[0042]
【The invention's effect】
As described above, according to the present invention, the III-V group compound semiconductor layer and the III-V group compound semiconductor layer are formed on at least Ti. Sulfides, selenides or tellurides containing An ohmic contact layer and a metal layer formed on the ohmic contact layer constitute a semiconductor device. Therefore, the contact resistance between the III-V compound semiconductor layer and the metal layer is made of an alloy system using AuGeNi. It can be reduced to a level almost equal to the value obtained by the ohmic contact.
[0043]
Further, a channel layer formed on the semiconductor substrate, an electron supply layer formed on the channel layer, a contact layer made of a III-V group compound semiconductor formed on the electron supply layer, and formed on the contact layer And at least Ti Sulfides, selenides or tellurides containing Since the semiconductor device is constituted by the ohmic contact layer made of the above, and the source / drain electrode formed on the ohmic contact layer and the gate electrode formed on the electron supply layer between the source / drain electrodes, the source / drain electrode The contact resistance between the contact layer and the contact layer can be reduced to a value approximately equal to a value obtained by an alloy ohmic contact using AuGeNi. Thereby, a semiconductor device having a low-resistance ohmic contact layer excellent in reliability can be formed with good controllability.
[0044]
Further, on the III-V compound semiconductor layer, at least Ti Sulfides, selenides or tellurides containing By manufacturing a semiconductor device by a method for manufacturing a semiconductor device having a step of forming an ohmic contact layer, a value obtained by alloy ohmic contact using AuGeNi on a group III-V compound semiconductor layer is almost the same. An ohmic contact layer having equal contact resistance can be formed.
[0045]
In the method for manufacturing a semiconductor device, the ohmic contact layer can be formed directly on the III-V compound semiconductor layer by the MBE method.
In the method for manufacturing a semiconductor device, the ohmic contact layer includes a step of forming a GaS layer on the III-V compound semiconductor layer, a step of forming a Ti layer on the GaS layer, a GaS layer, and a Ti layer. And the step of reacting with each other.
[0046]
In the method for manufacturing a semiconductor device, the ohmic contact layer includes a step of forming a GaS layer on the III-V group compound semiconductor layer, a step of forming a Ti layer on the GaSe layer, a GaS layer, and a Ti layer. And the step of reacting with each other.
In the method for manufacturing a semiconductor device, the ohmic contact layer includes a step of forming a GaS layer on the III-V compound semiconductor layer, a step of forming a Ti layer on the GaTe layer, a GaS layer, and a Ti layer. And the step of reacting with each other.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing a structure of a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a process cross-sectional view (part 1) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention;
FIG. 3 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention;
FIG. 4 is a process cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view showing a reaction form in the process of forming an ohmic contact layer.
FIG. 6 is a schematic cross-sectional view showing a structure of a measurement pattern used for measuring electrical characteristics of the semiconductor device according to the first embodiment of the present invention.
FIG. 7 is a graph showing electrical characteristics of the ohmic contact layer in the semiconductor device according to the first embodiment of the present invention;
FIG. 8 is a graph showing the relationship between contact resistivity and heat treatment temperature.
FIG. 9 is a schematic sectional view (No. 1) showing a semiconductor device and a method for manufacturing the same according to a modification of the first embodiment;
FIG. 10 is a schematic cross-sectional view (part 2) illustrating the semiconductor device and the method for manufacturing the same according to a modification of the first embodiment;
FIG. 11 is a schematic cross-sectional view showing the structure of the semiconductor device according to the second embodiment of the present invention and the method for manufacturing the same.
FIG. 12 is a graph showing current-voltage characteristics of a contact portion in a conventional semiconductor device.
[Explanation of symbols]
10 ... GaAs substrate
12 ... Buffer layer
14 ... Channel layer
16 ... electron supply layer
18 ... contact layer
20 ... GaS layer
22 ... Recess area
24 ... SiON film
26 ... opening
28 ... Conductive layer
30 ... Ohmic contact layer
32 ... Source / drain electrodes
34 ... Opening
36 ... Gate electrode
40 ... GaAs substrate
42 ... n ⁺ -GaAs layer
44 ... GaS layer
46 ... conductive layer

Claims (11)

A III-V compound semiconductor layer;
An ohmic contact layer formed on the III-V group compound semiconductor layer and comprising at least Ti- containing sulfide, selenide, or telluride ;
A semiconductor device comprising: a metal layer formed on the ohmic contact layer. A channel layer formed on a semiconductor substrate;
An electron supply layer formed on the channel layer;
A contact layer made of a III-V compound semiconductor formed on the electron supply layer;
An ohmic contact layer formed on the contact layer and comprising a sulfide, selenide or telluride containing at least Ti;
And source / drain electrodes formed on the ohmic contact layer,
And a gate electrode formed on the electron supply layer between the source / drain electrodes. The semiconductor device according to claim 1 or 2,
The ohmic contact layer is a TiGaS layer or a TiS layer. A semiconductor device, wherein: The semiconductor device according to claim 1 or 2,
The ohmic contact layer is a TiGaSe layer or a TiSe layer. A semiconductor device, wherein: The semiconductor device according to claim 1 or 2,
The ohmic contact layer is a TiGaTe layer or a TiTe layer. A semiconductor device, wherein: The semiconductor device according to any one of claims 1 to 5,
The III-V group compound semiconductor layer is a GaAs layer, AlGaAs layer, InGaAs layer, InAlAs layer, InGaP layer, InAlP layer, InGaAlAs layer, InGaAlP layer, InP layer, GaP layer or AlP layer. apparatus. A method of manufacturing a semiconductor device, comprising: forming an ohmic contact layer made of a sulfide, selenide, or telluride containing at least Ti on a group III-V compound semiconductor layer. The method of manufacturing a semiconductor device according to claim 7.
The ohmic contact layer is grown by molecular beam epitaxy. A method of manufacturing a semiconductor device, comprising: The method of manufacturing a semiconductor device according to claim 7.
Forming a GaS layer on the III-V compound semiconductor layer;
Forming a Ti layer on the GaS layer;
A step of reacting the GaS layer and the Ti layer to form the ohmic contact layer made of a layer containing at least Ti and S on the III-V compound semiconductor layer. Manufacturing method. The method of manufacturing a semiconductor device according to claim 7.
Forming a GaSe layer on the III-V compound semiconductor layer;
Forming a Ti layer on the GaSe layer;
A step of reacting the GaSe layer and the Ti layer to form the ohmic contact layer made of a layer containing at least Ti and Se on the III-V compound semiconductor layer. Manufacturing method. The method of manufacturing a semiconductor device according to claim 7.
Forming a GaTe layer on the III-V compound semiconductor layer;
Forming a Ti layer on the GaTe layer;
A step of reacting the GaTe layer and the Ti layer to form the ohmic contact layer made of a layer containing at least Ti and Te on the III-V group compound semiconductor layer. Manufacturing method.

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