CN107276569A - Short pulse amplitude measurement method based on multiple pulses peak holding and realize circuit - Google Patents

Short pulse amplitude measurement method based on multiple pulses peak holding and realize circuit Download PDF

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Publication number
CN107276569A
CN107276569A CN201710590027.4A CN201710590027A CN107276569A CN 107276569 A CN107276569 A CN 107276569A CN 201710590027 A CN201710590027 A CN 201710590027A CN 107276569 A CN107276569 A CN 107276569A
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operational amplifier
pulse
resistance
peak holding
peak
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CN107276569B (en
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吴冠豪
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Exploration and Technology (Beijing) Co., Ltd.
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Tsinghua University
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/153Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
    • H03K5/1532Peak detectors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/04Shaping pulses by increasing duration; by decreasing duration

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

The present invention relates to a kind of short pulse amplitude measurement method based on multiple pulses peak holding and realize circuit, it is characterised in that including herein below:1) pulse stretcher is carried out to tested nanosecond burst pulse;2) amplitude amplification is carried out to the pulse signal of broadening;3) storage capacitor is repeatedly charged successively using the signal of multiple process broadenings and amplification, carries out peak holding, realize energy supposition;4) amplitude sampling is carried out to the waveform after multiple peak holding, obtains the amplitude information of nanosecond burst pulse.The present invention is repeatedly charged on the basis of narrow pulse peak keeps principle using the signal of multiple process broadenings and amplification to storage capacitor, carry out peak holding, so it is equivalent to the energy for being exaggerated tested nanosecond burst pulse, and turn avoid the noise of echo, the problem of solving not enough nanosecond pulse broadening and too low signal to noise ratio, can be widely applied to the peak holding of nanosecond burst pulse.

Description

Short pulse amplitude measurement method based on multiple pulses peak holding and realize circuit
Technical field
The present invention is on a kind of short pulse amplitude measurement method based on multiple pulses peak holding and realizes circuit, is related to And laser ranging technique field.
Background technology
The laser pulse of pulse type laser range-measurement system or three-dimensional laser radar system based on time-of-flight method is generally only There are several nanoseconds, the strength information for obtaining echo impulse is to carry out controllable gain amplification, obtain the prerequisite of target gray information.
The method of nanosecond short pulse peak strength is directly obtained disclosed in prior art using with a width of GHz ranks High Speed Analog digital quantizer (AD) is sampled to echo impulse, but the digital conversion chip price of GHz ranks High Speed Analog Expensive and corresponding digital processing circuit design is complicated.Another indirect method disclosed in prior art is using peak holding electricity The crest voltage of short pulse signal is remained a DC voltage by road, during crest voltage is kept, with slow-type analog numeral Converter is sampled to the constant level, less yet with nanosecond burst pulse carrying energy, and typically peak value can not be protected The storage capacitor held in circuit is effectively charged.Nanosecond short pulse is amplified, the energy of pulse carrying can be increased, But higher is required to the gain bandwidth product for amplifying link, and extra noise can be introduced, and cause rear class peak holding electricity Road is unstable.Therefore, traditional peak holding circuit is for nanosecond short pulse and does not apply to.
The content of the invention
In view of the above-mentioned problems, can improve signal to noise ratio it is an object of the invention to provide one kind and enable to rear class peak value to protect Hold the short pulse amplitude measurement method based on multiple pulses peak holding of circuit stability and realize circuit.
To achieve the above object, the present invention takes following technical scheme:A kind of short arteries and veins based on multiple pulses peak holding Rush amplitude measurement method, it is characterised in that including herein below:1) pulse stretcher is carried out to tested nanosecond burst pulse;2) to exhibition Wide pulse signal carries out amplitude amplification;3) storage capacitor is carried out successively using multiple process broadenings and the signal of amplification multiple Charging, carries out peak holding, realizes energy supposition;4) amplitude sampling is carried out to the waveform after multiple peak holding, obtains nanosecond The amplitude information of level burst pulse.
Further, the step 1) pulse stretching use based on traditional RC low-frequency filter circuits or based on operation amplifier The low-frequency filter circuit of device is realized.
Further, the step 2) amplitude amplification realized using voltage feed-back amplifier, makes the pulse after amplification Peak value is identical with tested nanosecond narrow pulse peak.
Further, the step 3) storage capacitor is carried out repeatedly successively using multiple process broadenings and the signal of amplification Charging is specially:Gradually increase carries out the pulse number of peak value of pulse holding, is received when peak holding exports DC voltage with tested Untill second level narrow pulse peak is identical.
Further, the step 4) digital analog converter is used to the waveform progress amplitude after multiple peak holding Part.
To achieve the above object, the present invention also takes following technical scheme:A kind of reality based on multiple pulses peak holding Existing circuit, it is characterised in that this realizes that circuit includes short pulse widening circuit and pulse peak hold circuit;The short pulse exhibition Stretch circuit includes operational amplifier (U1A) and operational amplifier (U1B), is tested nanosecond narrow pulse waveform by resistance (R1) and electricity One end input that resistance (R2) is connected, the other end of the resistance (R1) is connected to the ground;The other end of the resistance (R2) and electricity The one end for holding (C1) is connected, and the other end of the electric capacity (C1) is connected to the ground;The resistance (R2) is connected with the electric capacity (C1) One end be connected with one end of resistance (R3), the other end of the resistance (R3) is reverse defeated with the operational amplifier (U1A) Enter end be connected, the positive input of the operational amplifier (U1A) is connected to the ground, the operational amplifier (U1A) it is reverse defeated Enter one end that end is connected in parallel resistance (R4) and electric capacity (C2), the resistance (R4), the other end of electric capacity (C2) and computing are put The output end of big device (U1A) and the one end for connecting resistance (R5), the other end of the resistance (R5) connect the operational amplifier (U1B) reverse input end, the positive input of the operational amplifier (U1B) is connected to the ground, and resistance (R6) is connected across described The reverse input end and output end of operational amplifier (U1B), the output end of the operational amplifier (U1B) is the short pulse exhibition The output of stretch circuit;Wherein, the VCC and VEE of the operational amplifier (U1A) and operational amplifier (U1B) connect positive electricity respectively Source and negative supply;The pulse peak hold circuit includes numerical control analog switch (U2), operational amplifier (U3A) and operation amplifier Device (U3B);The output end of the operational amplifier (U1B) is connected with the positive input of the operational amplifier (U3A);It is described The output end of operational amplifier (U3A) is connected with the positive level of diode (D1), the negative pole and storage capacitor of the diode (D1) (C3) one end is connected, and the other end of the storage capacitor (C3) is connected to the ground, and (U3A's) of the operational amplifier is reverse defeated Enter end connection diode (D2) positive pole, the output end of the operational amplifier (U3A) connects diode (D2) negative pole, described The positive input of operational amplifier (U3B) connects the negative pole of the diode (D1), the operational amplifier (U3B) it is reverse Input is joined directly together with output end, and one end of resistance (R7) connects the reverse input end of the operational amplifier (U3A), described Resistance (R7) other end connects the reverse input end of the operational amplifier (U3B), the output end of the operational amplifier (U3B) For the output of the pulse peak hold circuit, wherein, the VCC of the operational amplifier (U3A) and operational amplifier (U3B) and VEE connects positive supply and negative supply respectively;The control signal input of the numerical control analog switch (U2) and controlling switch break-make Control signal be connected, the GND ends of the numerical control analog switch (U2) are connected to the ground, the VCC ends of the numerical control analog switch (U) It is connected with positive supply, the input of the numerical control analog switch (U2) is connected with the negative pole of the diode D1, the numerical control mould The output end for intending switch (U2) is connected to the ground, when the input of the numerical control analog switch (U2) is turned on output end, constitutes institute State storage capacitor (C3) discharge loop.
Further, the operational amplifier (U1A) and operational amplifier (U1B) are more than using gain bandwidth product 500MHz Voltage Feedback operational amplifier.
Further, operational amplifier (U3A) and operational amplifier (U3B) use high input impedance operational amplifier.
Further, the numerical control analog switch (U2) uses the numerical control analog switch of high switch isolation degree.
The present invention is due to taking above technical scheme, and it has advantages below:1st, the present invention keeps former in narrow pulse peak Storage capacitor is repeatedly charged using the signal of multiple process broadenings and amplification on the basis of reason, peak holding is carried out, this Sample is equivalent to the energy for being exaggerated tested nanosecond burst pulse, and turn avoid the noise of echo, solves nanosecond pulse exhibition The problem of wide deficiency and too low signal to noise ratio.2nd, 8 analog-digital converters that the present invention is carried using single-chip microcomputer are to many minor peaks Constant voltage is sampled after holding, and cost is low, and data processing is simple.The present invention can be widely applied to nanosecond burst pulse Peak holding.
Brief description of the drawings
Fig. 1 is the short pulse amplitude measurement method schematic and waveform conversion schematic diagram of the present invention, wherein, part on dotted line For short pulse peak measurement methods principle, dotted line bottom is divided into waveform conversion signal, for elaborating short pulse peak value measurement The waveform processing procedures of method;
Fig. 2 is the present invention to the holding of multiple peak value of pulses and the principle schematic of energy accumulation;
Fig. 3 realizes circuit theory diagrams for the present invention's based on multiple pulses peak holding.
Embodiment
Come to carry out the present invention detailed description below in conjunction with accompanying drawing.It should be appreciated, however, that accompanying drawing has been provided only more Understand the present invention well, they should not be interpreted as limitation of the present invention.
As shown in figure 1, the short pulse amplitude measurement method based on multiple pulses peak holding that the present invention is provided, including with Lower content:
1st, pulse stretcher is carried out to tested nanosecond burst pulse.
The purpose for entering line broadening to being tested nanosecond burst pulse is to increase the energy that nanosecond burst pulse is carried, and the present invention is right Tested nanosecond burst pulse carries out pulse stretcher, makes pulse width broadening to 100 times or so of tested nanosecond pulse (with this Exemplified by, the determination of multiple of stretcher can be carried out according to actual use situation), now the amplitude of nanosecond burst pulse can accordingly subtract It is small.Pulse stretching can be carried out using the low-frequency filter circuit based on traditional RC low-frequency filter circuits or based on operational amplifier Realize.
2nd, amplitude amplification is carried out to the pulse signal of broadening.
In order to overcome pulse amplitude reduction problem caused by broadening, it is necessary to carry out amplitude amplification to broadening afterpulse signal. Amplitude amplification can be carried out using the higher voltage feed-back amplifier of gain bandwidth product, and multiplication factor is unsuitable excessive, generally makes Peak value of pulse after amplification is identical with tested nanosecond narrow pulse peak, can be amplified according to actual use situation again Several determinations.
3rd, storage capacitor is repeatedly charged using multiple process broadenings and the signal of amplification, carries out peak holding, it is real Existing energy supposition.
After pulse after above-mentioned broadening and amplification procedure is charged to the storage capacitor in peak holding circuit, peak It is worth the constant voltage of holding circuit output still significantly lower than tested nanosecond narrow pulse peak.At this time, it may be necessary to using multiple warps The signal for crossing broadening and amplification is repeatedly charged to the storage capacitor in peak holding circuit, is carried out peak holding, is realized energy Measure the effect of superposition.In actually debugging, it can gradually increase the pulse number for carrying out peak value of pulse holding, when peak holding electricity Untill road output DC voltage is identical with tested nanosecond narrow pulse peak.It is generally used for the pulse that multiple peak value of pulses are kept Number is 3 to 10, but not limited to this, and the determination that peak value of pulse keeps number can be carried out according to actual use situation.
4th, amplitude sampling is carried out to the waveform after multiple peak holding, obtains the amplitude information of nanosecond burst pulse.
The present invention carries out amplitude sampling using digital-to-analogue conversion device to the waveform after multiple peak holding, obtains nanosecond narrow The amplitude information of pulse, wherein, 8 analog-digital converters that digital-to-analogue conversion device can be carried using single-chip microcomputer are to many secondary peaks Constant voltage is sampled after value is kept.
Carried out specifically as specific embodiment as shown in Fig. 2 the present invention carries out peak holding using three nanosecond burst pulses It is bright, first short pulse peak value measurement cycle, three nanosecond burst pulses respectively through after broadening and amplification to peak holding Storage capacitor in circuit is charged, and the voltage at storage capacitor two ends is reached after the crest voltage of tested nanosecond burst pulse, Amplitude sampling is carried out to storage capacitor voltage using digital-to-analogue conversion device, electric discharge behaviour is carried out to storage capacitor after completing amplitude sampling Make, wait and enter the next short pulse peak value measurement cycle.
As shown in figure 3, the present invention also provides the circuit of realizing based on multiple pulses peak holding, including short pulse broadening electricity Road and pulse peak hold circuit.
Short pulse widening circuit is constituted using double operational, including operational amplifier U1A and operational amplifier U1B, and computing is put Big device U1A is used to enter nanosecond burst pulse line broadening, and operational amplifier U1B is used to be amplified pulse.Due to the present invention It is that nanosecond burst pulse is operated, so the bandwidth to operational amplifier has higher requirements, operational amplifier of the invention U1A and operational amplifier U1B is more than 500MHz Voltage Feedback operational amplifier using gain bandwidth product.
Tested nanosecond narrow pulse waveform is inputted by resistance R1 one end being connected with resistance R2, the resistance R1 other end and Ground is connected, and is used as the impedance matching resistor of input signal;The resistance R2 other end is connected with electric capacity C1 one end, and electric capacity C1's is another One end is connected to the ground, and resistance R2 and electric capacity C1 constitutes low-pass filter network;One end that resistance R2 is connected with electric capacity C1 and resistance R3 One end be connected, the resistance R3 other end is connected with operational amplifier U1A reverse input end;Operational amplifier U1A forward direction Input is connected to the ground;Operational amplifier U1A reverse input end is connected in parallel resistance R4 and electric capacity C2 one end, electric capacity C2 with Electric capacity C1 controls the degree of nanosecond burst pulse broadening together.Resistance R4, the electric capacity C2 other end and operational amplifier U1A Output end and the one end for connecting resistance R5, resistance R5 other end concatenation operation amplifier U1B reverse input end;Operation amplifier Device U1B positive input is connected to the ground;Resistance R6 is connected across operational amplifier U1B as the feedback resistance of control gain amplifier Reverse input end and output end;Operational amplifier U1B output end is the output of nanosecond burst pulse widening circuit.Wherein, The VCC and VEE of operational amplifier U1A and operational amplifier connect positive supply and negative supply respectively.
Pulse peak hold circuit includes numerical control analog switch U2, operational amplifier U3A, operational amplifier U3B.Computing is put Big device U1B output end is connected with the U3A of operational amplifier positive input;Operational amplifier U3A output end and two poles Pipe D1 positive level is connected, and diode D1 negative pole is connected with storage capacitor C3 one end, storage capacitor the C3 other end and ground phase Even;The diode D2 positive poles of the U3A of operational amplifier reverse input end connection, operational amplifier U3A output end connection two Pole pipe D2 negative poles;Operational amplifier U3B positive input connection diode D1 negative pole, operational amplifier U3B's is reverse defeated Enter end to be joined directly together with output end;The U3A reverse input ends of resistance R7 one end concatenation operation amplifier, the resistance R7 other ends connect Connect operational amplifier U3B reverse input end;Operational amplifier U3B output end is the output of peak holding circuit, with rear class The input connection of digital analog converter.Wherein, operational amplifier U3A and operational amplifier U3B VCC and VEE is connected just respectively Power supply and negative supply.
Numerical control analog switch U2 control signal inputs Control is connected with the control signal of controlling switch break-make, numerical control Analog switch U2 GND ends are connected to the ground, and numerical control analog switch U2 VCC ends are connected with positive supply;Numerical control analog switch U2's Input IN is connected with diode D1 negative pole;Numerical control analog switch U2 output end OUT is connected to the ground;Numerical control analog switch U2 Input IN and output end OUT when turning on, constitute storage capacitor C3 discharge loop.
Storage capacitor C3 is the storage capacitor for carrying out peak holding, and numerical control analog switch U2 controls carry out electric discharge behaviour to it Make.When peak holding circuit will carry out peak holding to pulse, when the control signal input to numerical control analog switch U2 Control input low levels, numerical control analog switch U2 input IN and output end OUT disconnect, and make multiple burst pulses to energy storage Electric capacity C3 charges;When terminating sampling, to numerical control analog switch U2 control model input Control input high levels, number Analog switch U2 input IN and output end OUT conducting is controlled, storage capacitor C3 is discharged, arriving for next subpulse is waited Come.The operation opportunity of storage capacitor C3 value and discharge and recharge is most important parameter in circuit in peak holding circuit, for Storage capacitor C3 value can be determined by emulation with experiment.
In a preferred embodiment, operational amplifier U3A and operational amplifier U3B use high input impedance computing There is amplifier, the amplifier of pulse peak hold circuit high input resistance can reduce the decrease speed for keeping voltage.
In a preferred embodiment, numerical control analog switch U uses the numerical control analog switch of high switch isolation degree.
The various embodiments described above are merely to illustrate the present invention, wherein the structure of each part, connected mode and manufacture craft etc. are all It can be varied from, every equivalents carried out on the basis of technical solution of the present invention and improvement should not be excluded Outside protection scope of the present invention.

Claims (9)

1. a kind of short pulse amplitude measurement method based on multiple pulses peak holding, it is characterised in that including herein below:
1) pulse stretcher is carried out to tested nanosecond burst pulse;
2) amplitude amplification is carried out to the pulse signal of broadening;
3) storage capacitor is repeatedly charged successively using the signal of multiple process broadenings and amplification, carries out peak holding, it is real Existing energy supposition;
4) amplitude sampling is carried out to the waveform after multiple peak holding, obtains the amplitude information of nanosecond burst pulse.
2. the short pulse amplitude measurement method as claimed in claim 1 based on multiple pulses peak holding, it is characterised in that institute State step 1) pulse stretching entered using low-frequency filter circuit based on traditional RC low-frequency filter circuits or based on operational amplifier Row is realized.
3. the short pulse amplitude measurement method as claimed in claim 1 based on multiple pulses peak holding, it is characterised in that institute State step 2) amplitude amplification realized using voltage feed-back amplifier, makes the peak value of pulse after amplification and the narrow arteries and veins of tested nanosecond Rush peak value identical.
4. the short pulse amplitude measurement method as claimed in claim 1 based on multiple pulses peak holding, it is characterised in that institute State step 3) using multiple process broadenings and the signal of amplification, to storage capacitor progress, repeatedly charging is specially successively:Gradually increase The pulse number of peak value of pulse holding is carried out, is all mutually with tested nanosecond narrow pulse peak when peak holding exports DC voltage Only.
5. the short pulse amplitude measurement method as claimed in claim 1 based on multiple pulses peak holding, it is characterised in that institute State step 4) amplitude sampling is carried out to the waveform after multiple peak holding using digital-to-analogue conversion device.
6. a kind of realize circuit based on multiple pulses peak holding, it is characterised in that this realizes that circuit includes short pulse broadening Circuit and pulse peak hold circuit;
The short pulse widening circuit includes operational amplifier (U1A) and operational amplifier (U1B), is tested nanosecond burst pulse ripple One end that shape is connected by resistance (R1) with resistance (R2) is inputted, and the other end of the resistance (R1) is connected to the ground;The resistance (R2) the other end is connected with the one end of electric capacity (C1), and the other end of the electric capacity (C1) is connected to the ground;The resistance (R2) with The connected one end of the electric capacity (C1) is connected with one end of resistance (R3), the other end and the operation amplifier of the resistance (R3) The reverse input end of device (U1A) is connected, and the positive input of the operational amplifier (U1A) is connected to the ground, the operation amplifier The reverse input end of device (U1A) is connected in parallel one end of resistance (R4) and electric capacity (C2), the resistance (R4), electric capacity (C2) it is another The output end of one end and operational amplifier (U1A) and the one end for connecting resistance (R5), the other end connection of the resistance (R5) The reverse input end of the operational amplifier (U1B), the positive input of the operational amplifier (U1B) is connected to the ground, resistance (R6) reverse input end and output end of the operational amplifier (U1B), the output end of the operational amplifier (U1B) are connected across For the output of the short pulse widening circuit;Wherein, the VCC of the operational amplifier (U1A) and operational amplifier (U1B) and VEE connects positive supply and negative supply respectively;
The pulse peak hold circuit includes numerical control analog switch (U2), operational amplifier (U3A) and operational amplifier (U3B);The output end of the operational amplifier (U1B) is connected with the positive input of the operational amplifier (U3A);The fortune The output end for calculating amplifier (U3A) is connected with the positive level of diode (D1), the negative pole and storage capacitor of the diode (D1) (C3) one end is connected, and the other end of the storage capacitor (C3) is connected to the ground, and (U3A's) of the operational amplifier is reverse defeated Enter end connection diode (D2) positive pole, the output end of the operational amplifier (U3A) connects diode (D2) negative pole, described The positive input of operational amplifier (U3B) connects the negative pole of the diode (D1), the operational amplifier (U3B) it is reverse Input is joined directly together with output end, and one end of resistance (R7) connects the reverse input end of the operational amplifier (U3A), described Resistance (R7) other end connects the reverse input end of the operational amplifier (U3B), the output end of the operational amplifier (U3B) For the output of the pulse peak hold circuit, wherein, the VCC of the operational amplifier (U3A) and operational amplifier (U3B) and VEE connects positive supply and negative supply respectively;The control signal input of the numerical control analog switch (U2) and controlling switch break-make Control signal be connected, the GND ends of the numerical control analog switch (U2) are connected to the ground, the VCC ends of the numerical control analog switch (U) It is connected with positive supply, the input of the numerical control analog switch (U2) is connected with the negative pole of the diode D1, the numerical control mould The output end for intending switch (U2) is connected to the ground, when the input of the numerical control analog switch (U2) is turned on output end, constitutes institute State storage capacitor (C3) discharge loop.
7. circuit is realized based on multiple pulses peak holding as claimed in claim 6, it is characterised in that the operation amplifier Device (U1A) and operational amplifier (U1B) are more than 500MHz Voltage Feedback operational amplifier using gain bandwidth product.
8. circuit is realized based on multiple pulses peak holding as claimed in claim 6, it is characterised in that operational amplifier (U3A) and operational amplifier (U3B) use high input impedance operational amplifier.
9. circuit is realized based on multiple pulses peak holding as described in claim 6 or 7 or 8, it is characterised in that the number Control numerical control analog switch of the analog switch (U2) using high switch isolation degree.
CN201710590027.4A 2017-07-19 2017-07-19 Short pulse amplitude measuring method based on multiple pulse peak value holding and realization circuit Active CN107276569B (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109085559A (en) * 2018-09-08 2018-12-25 天津大学 Ping-pong structure peak holding and automatic discharge circuit based on simulation control
CN109143204A (en) * 2018-09-08 2019-01-04 天津大学 The peak holding and automatic discharge circuit of numerically controlled ping-pong structure
CN111313899A (en) * 2019-12-17 2020-06-19 北京清网华科技股份有限公司 Analog signal peak value monitoring and measuring device and measuring method thereof
CN112147476A (en) * 2020-08-24 2020-12-29 杭州柯林电气股份有限公司 Pulse peak holding circuit and partial discharge monitoring circuit
CN113406602A (en) * 2021-05-21 2021-09-17 中山大学 Pulse peak holding circuit and control method

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1789947A (en) * 2005-12-19 2006-06-21 中国人民解放军总装备部军械技术研究所 Field online integrated tester for pulse laser emitter
US20090322379A1 (en) * 2008-06-27 2009-12-31 Fujitsu Microelectronics Limited Peak hold circuit
CN102394570A (en) * 2011-10-26 2012-03-28 中国兵器工业集团第二一四研究所苏州研发中心 Monolithic integrated narrow pulse peak holding circuit
CN106342398B (en) * 2008-08-07 2012-10-03 中国空空导弹研究院 Burst pulse peak holding circuit
CN103236830A (en) * 2013-04-14 2013-08-07 中国科学院近代物理研究所 Narrow pulse peak holding device
CN104022759A (en) * 2014-06-13 2014-09-03 中国兵器工业集团第二一四研究所苏州研发中心 High precision monolithic integration narrow pulse peak-holding circuit
CN104660225A (en) * 2015-01-19 2015-05-27 中国船舶重工集团公司第七一九研究所 Nuclear pulse peak value holding circuit

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1789947A (en) * 2005-12-19 2006-06-21 中国人民解放军总装备部军械技术研究所 Field online integrated tester for pulse laser emitter
CN100373147C (en) * 2005-12-19 2008-03-05 中国人民解放军总装备部军械技术研究所 Field online integrated tester for pulse laser emitter
US20090322379A1 (en) * 2008-06-27 2009-12-31 Fujitsu Microelectronics Limited Peak hold circuit
CN106342398B (en) * 2008-08-07 2012-10-03 中国空空导弹研究院 Burst pulse peak holding circuit
CN102394570A (en) * 2011-10-26 2012-03-28 中国兵器工业集团第二一四研究所苏州研发中心 Monolithic integrated narrow pulse peak holding circuit
CN103236830A (en) * 2013-04-14 2013-08-07 中国科学院近代物理研究所 Narrow pulse peak holding device
CN104022759A (en) * 2014-06-13 2014-09-03 中国兵器工业集团第二一四研究所苏州研发中心 High precision monolithic integration narrow pulse peak-holding circuit
CN104660225A (en) * 2015-01-19 2015-05-27 中国船舶重工集团公司第七一九研究所 Nuclear pulse peak value holding circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
冯刚等: "用于重频窄脉冲激光能量检测的峰值保持电路", 《电子涉及工程》 *
江月松: "《光电技术实验》", 31 October 2012 *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109085559A (en) * 2018-09-08 2018-12-25 天津大学 Ping-pong structure peak holding and automatic discharge circuit based on simulation control
CN109143204A (en) * 2018-09-08 2019-01-04 天津大学 The peak holding and automatic discharge circuit of numerically controlled ping-pong structure
CN109085559B (en) * 2018-09-08 2022-05-20 天津大学 Table tennis structure peak value holding and automatic discharging circuit based on analog control
CN109143204B (en) * 2018-09-08 2022-05-20 天津大学 Peak value holding and automatic discharging circuit of digital control ping-pong structure
CN111313899A (en) * 2019-12-17 2020-06-19 北京清网华科技股份有限公司 Analog signal peak value monitoring and measuring device and measuring method thereof
CN112147476A (en) * 2020-08-24 2020-12-29 杭州柯林电气股份有限公司 Pulse peak holding circuit and partial discharge monitoring circuit
CN113406602A (en) * 2021-05-21 2021-09-17 中山大学 Pulse peak holding circuit and control method
CN113406602B (en) * 2021-05-21 2024-04-26 中山大学 Pulse peak hold circuit and control method

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