CN207248982U - A kind of burst pulse voltage sampling circuit - Google Patents
A kind of burst pulse voltage sampling circuit Download PDFInfo
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- CN207248982U CN207248982U CN201721109072.5U CN201721109072U CN207248982U CN 207248982 U CN207248982 U CN 207248982U CN 201721109072 U CN201721109072 U CN 201721109072U CN 207248982 U CN207248982 U CN 207248982U
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Abstract
The utility model discloses a kind of burst pulse voltage sampling circuit, circuit includes：Discharge cell is integrated, produces integral voltage for carrying out integration to input pulse, and discharge the integral voltage according to discharge signal；Controlling of sampling unit, it is connected with the integration discharge cell, for periodically sending discharge signal to the integration discharge cell, and the integral voltage, the input voltage according to corresponding to the integral voltage determines input pulse are sampled in the electric discharge initial time of the integration discharge cell.The utility model can directly sample small voltage and carry out the integral voltage after cycle integrated, the low level voltage value of line voltage is avoided to be submerged in due to be attenuated too small in the noise of ADC, the sampling precision of motor driver output line voltage can be particularly greatly improved under motor low-speed situations, and the utility model cost is low, the increased circuit of hardware is less, compared to high-precision ADC chips are used, cost can be greatly saved.
Description
Technical field
It the utility model is related to voltage sample field, more particularly to a kind of burst pulse voltage sampling circuit.
Background technology
The average voltage size of the output line of motor driver the side such as controls in the dead area compensation of driver, torque pulsation
Face plays the role of important, particularly when motor speed is low, to dead area compensation and torque pulsation performance requirement higher, more at this time
Seek the average voltage of the output line of accurate sample motor driver.
The characteristics of output line voltage waveform is that low level is very small (within ± 5V), and high level is very high (hundreds of volts),
Voltage span is very big.Above voltage is sampled, most simple common way is to ignore low level, is replaced with 0V, and high level is then
Busbar voltage is directly used, hardware cost need not be increased at this time, as long as software processing.Another voltage sampling method be by
Output voltage after gain reduction, be sent into successive approximation register (SAR,
Successiveapproximationregister analog-digital converter (ADC, Analog-to-Digital)
Converter in), by ADC come the output line voltage of sample motor driver.
Due to motor driver output line voltage at low speeds, it may appear that burst pulse output line voltage waveform, if
Using the first above-mentioned scheme, because IGBT (the Insulated Gate Bipolar in the inversion unit of motor driver
Transistor, insulated gate bipolar transistor) and inverse parallel fly-wheel diode all there are the forward conduction voltage drop of itself, because
This, directly has large error to estimate the low and high level amplitude of output line voltage with 0V and busbar voltage, directly affects control
Performance processed；According to second scheme, analog voltage after gain reduction is ensureing that high level falls into the input of SAR ADC
After range ability, it can not ensure that low level can be come out by efficiently sampling at the same time, and low level is in whole cycle during burst pulse
Time accounting is grown, if sampling will definitely not produce large error to the average value of output line voltage.
Utility model content
The technical problems to be solved in the utility model is, for the drawbacks described above of the prior art, there is provided a kind of burst pulse
Voltage sampling circuit.
Technical solution is used by the utility model solves its technical problem：Construct a kind of burst pulse voltage sample electricity
Road, including：
Discharge cell is integrated, integral voltage is produced for carrying out integration to input pulse, and according to discharge signal to described
Integral voltage discharges；
Controlling of sampling unit, is connected with the integration discharge cell, for periodically to the integration discharge cell hair
Veer away electric signal, and samples the integral voltage in the electric discharge initial time of the integration discharge cell, according to the integration electricity
Pressure determines the input voltage corresponding to input pulse.
Preferably, the controlling of sampling unit includes：
Subelement is sampled, is connected with the integration discharge cell, for the touching in control subelement in electric discharge initial time
Give the sampling integral voltage；
Subelement is controlled, is connected respectively with the integration discharge cell, the sampling subelement, for periodically to institute
The discharge signal that integration discharge cell sends scheduled duration is stated, and described in electric discharge initial time triggering sampling subelement sampling
Integral voltage, and the input voltage according to corresponding to the integral voltage determines input pulse.
Preferably, the integration discharge cell includes：
Discharge subelement, is connected with the controlling of sampling unit, for sending discharge signal in the controlling of sampling unit
When from the switching-on state of off-state；
Subelement is integrated, is connected with the electric discharge subelement, the controlling of sampling unit, in the electric discharge subelement
When being off, integration is carried out to input pulse and produces integral voltage；And it is on shape in the electric discharge subelement
During state, discharged by the electric discharge subelement the integral voltage.
Preferably, the electric discharge subelement includes the switch chip in parallel with the integrating capacitor in the integration subelement,
The control terminal of the switch chip is connected to the controlling of sampling unit.
Stream list is opened up preferably, further including and being connected between the controlling of sampling unit and the control terminal of the switch chip
Member, for driving the switch chip after the discharge signal is carried out power amplification.
Preferably, the stream unit of opening up includes triode, pull-up resistor, first resistor, the emitter of the triode connects
Ground, the collector of the triode connect the control terminal of the switch chip, and the collector of the triode is also through the pull-up
Resistance connects power supply, and the base stage of the triode connects the controlling of sampling unit through the first resistor.
Preferably, the integration subelement includes：First operational amplifier, integrating capacitor, integrating resistor, second resistance；
Input terminal of the first end of the integrating resistor as the integration subelement, the second end of the integrating resistor connect
The out-phase input terminal of first operational amplifier is connected to, the integrating capacitor is connected to the out-phase of first operational amplifier
Between input terminal and output terminal, the in-phase input end of first operational amplifier is grounded via the second resistance, and described
Output terminal of the output terminal of one operational amplifier as the integration subelement.
Preferably, further include the gain reduction unit being connected with the input terminal of the integration discharge cell；
The gain reduction unit is used to export the input pulse extremely after the line voltage of motor driver is decayed
The integration discharge cell.
Preferably, the gain reduction unit include the second operational amplifier, 3rd resistor, the 4th resistance, the 5th resistance,
6th resistance, the 3rd resistor, the first end of the 4th resistance are respectively as two input terminals of the gain reduction unit, institute
State 3rd resistor, the second end of the 4th resistance is respectively connected to two input terminals of the second operational amplifier, second computing
The in-phase input end of amplifier is connected to first operational amplifier via the 5th resistance eutral grounding, the 6th resistance
Between out-phase input terminal and output terminal, the output of the output terminal of second operational amplifier as the gain reduction unit
End.
Implement the burst pulse voltage sampling circuit of the utility model, have the advantages that：The utility model is by week
After phase discharging action, it can directly sample small voltage and carry out the integral voltage after cycle integrated, avoid the low level electricity of line voltage
Pressure value is submerged in the noise of ADC due to be attenuated too small, and electricity can be particularly greatly improved under motor low-speed situations
The sampling precision of machine driver output line voltage, and the utility model cost is low, the increased circuit of hardware is less, compared to use
High-precision ADC chips, can greatly save cost.
Brief description of the drawings
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, drawings in the following description are only
It is the embodiment of the utility model, for those of ordinary skill in the art, without creative efforts, also
Other attached drawings can be obtained according to the attached drawing of offer：
Fig. 1 is the circuit diagram of the utility model burst pulse voltage sampling circuit；
Fig. 2 is the circuit diagram of the preferred embodiment of the utility model burst pulse voltage sampling circuit；
Fig. 3 is discharge signal sequence diagram.
Embodiment
For the ease of understanding the utility model, the utility model is more fully retouched below with reference to relevant drawings
State.The exemplary embodiments of the utility model are given in attached drawing.But the utility model can come in fact in many different forms
It is existing, however it is not limited to embodiment described herein.On the contrary, the purpose for providing these embodiments is the public affairs made to the utility model
Open content more thorough and comprehensive.
It should be noted that word " equal ", " identical " " at the same time " or other similar terms, are not limited to mathematical term
In it is absolute equal or identical, can be close on engineering significance or acceptable when implementing right described in this patent
Error range in." connected " or " connection ", not only include two entities being connected directly, also include by having
Other entities of beneficial improvement are indirectly connected.
Unless otherwise defined, all of technologies and scientific terms used here by the article is led with belonging to the technology of the utility model
The normally understood implication of technical staff in domain is identical.It is simply in the term used in the description of the utility model herein
The purpose of description specific embodiment, it is not intended that in limitation the utility model.
The term comprising ordinal number such as " first " that is used in this specification, " second " can be used for illustrating various inscapes,
But these inscapes are from the restriction of these terms.It is only that using the purpose of these terms and distinguishes an inscape
In other inscapes.For example, on the premise of the interest field of the utility model is not departed from, the first inscape can be named
For the second inscape, similarly, the second inscape can also be named as the first inscape.
With reference to figure 1, the total thinking of the utility model is：Integration is carried out to input pulse and produces integral voltage, and to described
Integral voltage is periodically discharged, and samples the integral voltage in electric discharge initial time, true according to the integral voltage
Determine the input voltage corresponding to input pulse.
For this reason, the utility model provides a kind of burst pulse voltage sample system, including：
Inversion unit 101, is connected with the DC power supply inside motor driver, for the direct current of DC power supply to be changed
For alternating current, which is the utility model voltage to be sampled；
Gain reduction list 102, is connected with inversion unit 101, for defeated after the alternating current of inversion unit 101 is decayed
Go out input pulse to integration discharge cell 103；
Discharge cell 103 is integrated, is connected with the gain reduction unit 102, for carrying out integration generation to input pulse
Integral voltage, and discharged according to discharge signal the integral voltage.
Controlling of sampling unit 104：It is connected with integration discharge cell 103, for periodically to the integration discharge cell
103 send discharge signal, and sample the integral voltage in the electric discharge initial time of the integration discharge cell 103, according to institute
State integral voltage and determine input voltage corresponding to input pulse.
In order to better understand the above technical scheme, in conjunction with appended figures and specific embodiments to upper
State technical solution to be described in detail, it should be understood that the specific features in the utility model embodiment and embodiment are to this
Apply for the detailed description of technical solution, rather than the restriction to technical scheme, in the case where there is no conflict, this practicality
Technical characteristic in new embodiment and embodiment can be mutually combined.
With reference to figure 2, the unit in Fig. 1 is described in detail below.201 represent inversion unit, i.e. motor in figure
The inverter bridge structure of driver, it includes three-phase bridge arm, the corresponding line voltage all the way of output voltage difference between any two-phase bridge arm,
The wherein sampling of line voltage all the way is only illustrated in figure, the sampling of other two-way line voltages is similarly.
Burst pulse voltage sampling circuit in the present embodiment specifically includes：
Gain reduction unit 202, for exporting input pulse after the line voltage of motor driver is decayed to described
Integrate discharge cell 3；
Discharge cell 203 is integrated, is connected with the gain reduction unit 202, for carrying out integration generation to input pulse
Integral voltage, and discharged according to discharge signal the integral voltage；
Controlling of sampling unit 204, is connected with the integration discharge cell 203, for periodically discharging to the integration
Unit 203 sends discharge signal, and samples the integral voltage, root in the electric discharge initial time of the integration discharge cell 203
The input voltage corresponding to input pulse is determined according to the integral voltage, specifically, determining the input according to the following formula (1)
Voltage：
Wherein, V1Represent the integral voltage of the sampling of controlling of sampling unit 204, V2Represent the input voltage, R1Represent
The resistance value of integrating resistor R7 in the integration discharge cell 203, C1Represent the integrating capacitor in the integration discharge cell 203
Capacitance, T1Represent discharge cycle, i.e. controlling of sampling unit 204 sends the week of discharge signal to the integration discharge cell 203
Phase, T2Represent electric discharge duration.
Wherein, the discharge cycle T of integral voltage1A switch periods T corresponding to specially described input pulseS, specifically
For be by a switch periods TSInterior integral voltage is considered as a switch periods TSInterior input voltage (line voltage after decay)
Average value.
Wherein, duration setting of discharging is too short, and follow-up integrator start value can be caused not start from scratch, influence finally to integrate
As a result；Duration setting of discharging is too long, can cause to be forced to be set to 0 in the follow-up integrator start value some time, can also influence most
Whole integral result.In the present embodiment, discharge duration T2According to the discharge time constant of integrating capacitor itself and the slew rate of amplifier
It is configured.Specifically, the duration T that discharges first2With the discharge loop of integrating capacitor determined by discharge time constant it is related, extremely
It is greater than 5*RC less, RC represents the product of integration capacitor value and integrating resistor R7；On this basis, according to the slew rate of amplifier into
Row adjustment, the slew rate of amplifier it is faster, it is necessary to discharge time it is shorter.After amplifier determines, it usually needs micro- again according to surveying
Electric discharge duration is adjusted, general final electric discharge duration is arranged to 10*RC~50*RC.
In addition, in order to ensure the accuracy calculated, can first can be discharged several times before initial samples.Therefore,
Preferably, the controlling of sampling unit 204 is used in each switch periods TSThe introversive integration discharge cell 203 is sent
Scheduled duration T2Electric discharge；And each electric discharge after discharge signal transmission times reaches preset times (such as 3 times)
Initial time sample the integral voltage.
With continued reference to Fig. 2, specifically, the controlling of sampling unit 204 includes：
Subelement 2042 is sampled, is connected with the integration discharge cell 203, for single in control in electric discharge initial time
Integral voltage described in the triggering down-sampling of member 2041；
Subelement 2041 is controlled, is connected, is used for respectively with the integration discharge cell 203, the sampling subelement 2042
Periodically scheduled duration T is sent to integration discharge cell 2032Discharge signal, and electric discharge initial time triggering sampling
Subelement 2042 samples the integral voltage, and the input voltage according to corresponding to the integral voltage determines input pulse.
Specifically, the because discharge cycle T of integral voltage1A switch periods corresponding to specially described input pulse
TS, so control 2041 need of subelement ensure in a switch periods TSA discharge signal is inside sent, at the time of transmission
It is not limited, can be with switch periods TSSwitching instant it is synchronous, such as switch periods TSCounting underflow point be or count
Overflow point.
In the present embodiment, sampling subelement 2042 can use SAR ADC, and control subelement 2041 uses CPU.
With continued reference to Fig. 2, specifically, the integration discharge cell 203 includes：
Discharge subelement 2032, is connected with the controlling of sampling unit 204, for being sent out in the controlling of sampling unit 204
Veer away electric signal when from the switching-on state of off-state；
Subelement 2031 is integrated, is connected with the electric discharge subelement 2032, for being in the electric discharge subelement 2032
During off-state, integration is carried out to input pulse and produces integral voltage；And it is on shape in the electric discharge subelement 2032
During state, discharged by the electric discharge subelement 2032 integral voltage.
Wherein, the electric discharge subelement 2032 includes switch chip S1.Due to the driving force of the discharge signal of CPU outputs
It is weaker, can not driving switch chip S1.Preferably, the burst pulse voltage sampling circuit in the present embodiment, which further includes, opens up stream unit
205, for driving the switch chip S1 after the discharge signal is carried out power amplification.
Specifically, the triode Q1 for opening up stream unit 205 including NPN type, pull-up resistor R8, first resistor R1, described
Triode Q1 emitter ground connection, the base stage of the triode Q1 through the first resistor R1 connections CPU to receive discharge signal,
The collector of the triode Q1 connects the control terminal and SAR ADC of the switch chip S1, the current collection of the triode Q1
Pole also connects power supply through the pull-up resistor R8, and the collector of triode Q1, which exports discharge signal and triggered to switch chip S1, to discharge.
Wherein, the integration subelement 2031 includes：First operational amplifier A 1, integrating capacitor C1, integrating resistor R7,
Input terminal of the first end of two resistance R2, the integrating resistor R7 as the integration subelement 2031, the integrating resistor R7
Second end be connected to the out-phase input terminal of first operational amplifier A 1, the integrating capacitor C1 is connected to first fortune
Between the out-phase input terminal and output terminal of calculating amplifier A1, the in-phase input end of first operational amplifier A 1 is via described the
Two resistance R2 are grounded, and the output terminal of first operational amplifier A 1 is as the output terminal for integrating subelement 2031, switch
Chip S1 is in parallel with the integrating capacitor C1, and the control terminal of the switch chip S1 is connected to the controlling of sampling unit 204.
With continued reference to Fig. 2, specifically, the gain reduction unit 202 includes the second operational amplifier A 2,3rd resistor
R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 3rd resistor R3, the 4th resistance R4 first end respectively as
Two input terminals of the gain reduction unit 202, the 3rd resistor R3, the second end of the 4th resistance R4 are respectively connected to
Two input terminals of two operational amplifier As 2, the in-phase input end of second operational amplifier A 2 is via the 5th resistance R5
Ground connection, the 6th resistance R6 is connected between the out-phase input terminal and output terminal of first operational amplifier A 1, and described the
Output terminal of the output terminal of two operational amplifier As 2 as the gain reduction unit 202.
The operation principle of the utility model is analyzed in detail below.
When motor speed is relatively low, within the single switch cycle, high level pulse occurs in the output line voltage of inverter bridge
Width is narrow, and the state of low level pulse width length, after gain reduction unit 202, the output of the second operational amplifier A 2 is still
It is so very narrow for high level, the very wide narrow pulse waveform of low level.Integrating capacitor C1 in Fig. 2 exports gain reduction unit 202
Pulse is integrated, and integrates a switch periods TSAfterwards, discharge signal is sent by CPU, discharge signal is specially a pulse, is touched
Send out switch chip S1 conducting, integrating capacitor C1 is discharged by branch where switch chip S1, the purpose of electric discharge be prevent from integrating it is defeated
Go out saturation.
Wherein, the width of the discharging time of integral voltage, discharge cycle and discharge signal, is controlled by CPU completely, CPU
I/O port flow controlling switch chip S1 after unit by expanding, and then realize electric discharge to integrating capacitor C1.CPU internal discharge signals
Sequential such as Fig. 3, TSFor the switch periods of IGBT in inverter bridge, Uab, Ubc, Uca are the three-phase line voltage of motor driver output,
The delivery time of discharge signal is arranged to the counting underflow point of each switch periods, discharge time length according to integrating capacitor C1 from
The discharge time constant of body and the slew rate of amplifier are configured.
After completing arrangement above, CPU is after controlling of sampling flow is entered, the counting underflow point hair in each switch periods
Go out discharge signal, do not trigger ADC samplings in first three switch periods, triggered into during the 4th switch periods in discharging time
ADC is sampled, and calculates line voltage average value.Pushed away specifically, CPU is sampled according to ADC at this time integrated value is counter, you can
It is as follows to the average value of output line voltage, formula：
Wherein, time T0Represent charging duration, it is clear that its size is equal to discharge cycle T1Subtract electric discharge duration T2, and discharge
Cycle T1Equal to switch periods TS, so final T0For TSSubtract T2.Other specification refers to the explanation of above-mentioned formula (1), herein not
Repeat again.
Certainly, the above-mentioned V of calculating2Input voltage after the representative decay of gain reduction unit 202, if to calculate inverse
Become the line voltage of bridge, pushed away according to the attenuation multiple of gain reduction unit 202 is counter.
In conclusion implementing the burst pulse voltage sampling circuit of the utility model, have the advantages that：This practicality is new
Type can directly sample small voltage and carry out the integral voltage after cycle integrated, avoid line voltage after periodic discharging acts
Low level voltage value is submerged in the noise of ADC due to be attenuated too small, can be big particularly under motor low-speed situations
The big sampling precision for improving motor driver output line voltage, and the utility model cost is low, the increased circuit of hardware is less, phase
Compared with high-precision ADC chips are used, cost can be greatly saved.
The embodiment of the utility model is described above in conjunction with attached drawing, but the utility model is not limited to
The embodiment stated, above-mentioned embodiment is only schematical, rather than restricted, this area it is common
Technical staff is not departing from the utility model aims and scope of the claimed protection situation under the enlightenment of the utility model
Under, many forms can be also made, these are belonged within the protection of the utility model.
Claims (9)
- A kind of 1. burst pulse voltage sampling circuit, it is characterised in that including：Discharge cell is integrated, integral voltage is produced for carrying out integration to input pulse, and according to discharge signal to the integration Voltage discharges；Controlling of sampling unit, is connected with the integration discharge cell, is put for periodically being sent to the integration discharge cell Electric signal, and the integral voltage is sampled in the electric discharge initial time of the integration discharge cell, it is true according to the integral voltage Determine the input voltage corresponding to input pulse.
- 2. burst pulse voltage sampling circuit according to claim 1, it is characterised in that the controlling of sampling unit includes：Subelement is sampled, is connected with the integration discharge cell, under triggering of the electric discharge initial time in control subelement Sample the integral voltage；Subelement is controlled, is connected respectively with the integration discharge cell, the sampling subelement, for periodically to the product Discharge cell is divided to send the discharge signal of scheduled duration, and in the electric discharge initial time triggering sampling subelement sampling integration Voltage, and the input voltage according to corresponding to the integral voltage determines input pulse.
- 3. burst pulse voltage sampling circuit according to claim 1, it is characterised in that the integration discharge cell includes：Discharge subelement, be connected with the controlling of sampling unit, for the controlling of sampling unit transmission discharge signal when from The switching-on state of off-state；Subelement is integrated, is connected with the electric discharge subelement, the controlling of sampling unit, for being in the electric discharge subelement During off-state, integration is carried out to input pulse and produces integral voltage；And when the electric discharge subelement is in the conduction state, Discharged by the electric discharge subelement the integral voltage.
- 4. burst pulse voltage sampling circuit according to claim 3, it is characterised in that the electric discharge subelement includes and institute The switch chip of the integrating capacitor parallel connection in integration subelement is stated, the control terminal of the switch chip is connected to the controlling of sampling Unit.
- 5. burst pulse voltage sampling circuit according to claim 4, it is characterised in that further include and be connected to the sampling control Stream unit is opened up between the control terminal of unit processed and the switch chip, for the discharge signal to be carried out power amplification rear-guard Move the switch chip.
- 6. burst pulse voltage sampling circuit according to claim 5, it is characterised in that the stream unit of opening up includes three poles Pipe, pull-up resistor, first resistor, the emitter ground connection of the triode, the collector of the triode connect the switch core The control terminal of piece, the collector of the triode also connect power supply through the pull-up resistor, and the base stage of the triode is through described One resistance connects the controlling of sampling unit.
- 7. burst pulse voltage sampling circuit according to claim 3, it is characterised in that the integration subelement includes：The One operational amplifier, integrating capacitor, integrating resistor, second resistance；Input terminal of the first end of the integrating resistor as the integration subelement, the second end of the integrating resistor are connected to The out-phase input terminal of first operational amplifier, the integrating capacitor are connected to the out-phase input of first operational amplifier Between end and output terminal, the in-phase input end of first operational amplifier is grounded via the second resistance, first fortune Calculate output terminal of the output terminal of amplifier as the integration subelement.
- 8. burst pulse voltage sampling circuit according to claim 1, it is characterised in that further include single with the integration electric discharge The gain reduction unit of the input terminal connection of member；The gain reduction unit is used to after the line voltage of motor driver is decayed export the input pulse to described Integrate discharge cell.
- 9. burst pulse voltage sampling circuit according to claim 7, it is characterised in that further include single with the integration electric discharge The gain reduction unit of the input terminal connection of member, the gain reduction unit are used to decline the line voltage of motor driver The input pulse is exported after subtracting to the integration discharge cell；The gain reduction unit includes the second operational amplifier, 3rd resistor, the 4th resistance, the 5th resistance, the 6th resistance, institute State 3rd resistor, the first end of the 4th resistance respectively as the gain reduction unit two input terminals, the 3rd resistor, The second end of 4th resistance is respectively connected to two input terminals of the second operational amplifier, the same phase of second operational amplifier Input terminal via the 5th resistance eutral grounding, the 6th resistance be connected to first operational amplifier out-phase input terminal and Between output terminal, the output terminal of the output terminal of second operational amplifier as the gain reduction unit.
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| CN201721109072.5U CN207248982U (en) | 2017-08-31 | 2017-08-31 | A kind of burst pulse voltage sampling circuit |
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| CN201721109072.5U CN207248982U (en) | 2017-08-31 | 2017-08-31 | A kind of burst pulse voltage sampling circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107478899A (en) * | 2017-08-31 | 2017-12-15 | 苏州汇川技术有限公司 | A kind of burst pulse voltage sampling circuit and method |
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2017
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107478899A (en) * | 2017-08-31 | 2017-12-15 | 苏州汇川技术有限公司 | A kind of burst pulse voltage sampling circuit and method |
| CN107478899B (en) * | 2017-08-31 | 2023-12-26 | 苏州汇川技术有限公司 | Narrow pulse voltage sampling circuit and method |
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