CN107146776A - 包括抗静电芯片附连材料的半导体器件 - Google Patents

包括抗静电芯片附连材料的半导体器件 Download PDF

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Publication number
CN107146776A
CN107146776A CN201710111548.7A CN201710111548A CN107146776A CN 107146776 A CN107146776 A CN 107146776A CN 201710111548 A CN201710111548 A CN 201710111548A CN 107146776 A CN107146776 A CN 107146776A
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Prior art keywords
chip
substrate
semiconductor devices
antistatic
attaches
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CN201710111548.7A
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English (en)
Inventor
V·施特鲁茨
F-P·卡尔茨
R·M·沙勒
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of CN107146776A publication Critical patent/CN107146776A/zh
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    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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Abstract

一种半导体器件包括：衬底、半导体芯片和位于所述衬底与所述半导体芯片之间的抗静电芯片附连材料。所述抗静电芯片附连材料包括非导电粘合剂材料与炭黑或石墨的混合物。在一种示例中，所述抗静电芯片附连材料具有101Ω·cm与1010Ω·cm之间的电阻率。

Description

包括抗静电芯片附连材料的半导体器件
技术领域
本发明涉及一种半导体器件以及一种用于制造半导体器件的方法。
背景技术
电流传感器、电流变换器、磁耦合器和其他电磁场器件可集成到半导体器件封装体中。该器件可在电磁场产生部件(例如集成电路、线圈、电源轨等)的电势与感测由电磁场产生部件产生的电磁场的传感器或其他部件(例如集成电路)的电势之间包括电隔离。半导体器件封装体内的绝缘强度可与在半导体器件封装体内使用的芯片附连层的局部放电可靠性有关。
由于这些以及其他原因，有本发明的需要。
发明内容
半导体器件的一个示例包括：衬底、半导体芯片和位于所述衬底与所述半导体芯片之间的抗静电芯片附连材料。所述抗静电芯片附连材料包括非导电粘合剂材料与炭黑或石墨的混合物。
根据一个可选实施例，所述抗静电芯片附连材料具有101Ω·cm与1010Ω·cm之间的电阻率。
根据一个可选实施例，所述抗静电芯片附连材料包括1％与20％重量比之间的炭黑或石墨。
根据一个可选实施例，所述衬底包括引线框架。
根据一个可选实施例，所述非导电粘合剂材料包括环氧树脂。
根据一个可选实施例，所述抗静电芯片附连材料包括芯片附连膜。
根据一个可选实施例，所述抗静电芯片附连材料包括后侧涂层。
根据一个可选实施例，所述半导体芯片包括磁场传感器。
根据另一方面，提供了一种半导体器件，包括：包括导电材料的衬底；绝缘体；半导体芯片；位于所述衬底与所述绝缘体之间的第一抗静电芯片附连材料；以及位于所述绝缘体与所述半导体芯片之间的第二抗静电芯片附连材料，其中，所述第一和第二抗静电芯片附连材料包括非导电粘合剂材料与炭黑或石墨片的混合物。
根据一个可选实施例，所述第一和第二抗静电芯片附连材料具有101Ω·cm与1010Ω·cm之间的电阻率。
根据一个可选实施例，所述第一和第二抗静电芯片附连材料包括1％与10％重量比之间的炭黑或石墨片。
根据一个可选实施例，所述衬底包括引线框架。
根据一个可选实施例，所述非导电粘合剂材料包括环氧树脂。
根据一个可选实施例，所述第一和第二抗静电芯片附连材料包括芯片附连膜。
根据一个可选实施例，所述半导体芯片包括磁场传感器，以便感测流过衬底的电流。
根据一个可选实施例，所述绝缘体包括玻璃、体硅或陶瓷。
根据另一方面，提供了一种用于制造半导体器件的方法，所述方法包括：将第一抗静电材料施加到第一衬底上，所述第一抗静电材料包括非导电粘合剂材料与炭黑或石墨片的混合物；将半导体芯片放置到所述第一抗静电材料上；以及固化所述第一抗静电材料，以便将所述半导体芯片附连至所述衬底。
根据一个可选实施例，所述方法还包括：将所述非导电粘合剂材料与所述炭黑或石墨片混合，以便提供具有101Ω·cm与1010Ω·cm之间的电阻率的第一抗静电材料。
根据一个可选实施例，所述方法还包括：将所述非导电粘合剂材料与1％与2％重量比之间的炭黑或石墨片混合，以便提供所述第一抗静电材料。
根据一个可选实施例，所述第一衬底包括绝缘衬底，所述方法还包括：将第二抗静电材料施加到包括导电材料的第二衬底上，所述第二抗静电材料包括非导电粘合剂材料与炭黑或石墨片的混合物；将所述第一衬底放置到所述第二抗静电材料上；以及固化所述第二抗静电材料，以便将所述第一衬底附连至所述第二衬底。
附图说明
图1是示出半导体器件的一个示例的剖视图，所述半导体器件包括抗静电芯片附连材料。
图2是示出半导体器件的另一个示例的剖视图，所述半导体器件包括抗静电芯片附连材料。
图3是示出图2的半导体器件的一个示例的剖视图，所述半导体器件在抗静电芯片附连材料中包括空隙。
图4A是示出电流传感器的一个示例的透视图，所述电流传感器移除了封装材料，并且图4B是示出该电流传感器的剖视图。
图5是示出用于制造半导体器件的方法的一个示例的流程图，所述半导体器件包括抗静电芯片附连材料。
具体实施方式
在下文的详细描述中，参考了构成本文的一部分的附图，并且在附图中通过图示的方式示出了可实践本公开的具体实施例。在这方面，诸如“顶部”、“底部”、“前”、“后”、“前部”、“后部”等等的方向性术语是参考正被描述的附图的取向来使用的。因为实施例中的部件可以以多种不同取向放置，因此方向性术语用于图示的目的使用而绝非是限制的目的。应当理解，可利用其他实施例并且在不脱离本公开的范围的情况下做出结构或逻辑上的变化。因此，下文的详细描述不应以限制的意义理解，本公开的范围由所附权利要求限定。
除非特别声明，否则应该理解的是，本文所描述的各种示例性实施例的特征可彼此结合起来。
如本文所使用的，术语“电耦接”并不旨在于意味着元件必须直接耦接在一起，而是可在“电耦接”元件之间提供中间元件。
当半导体芯片附连于衬底时，半导体芯片与衬底之间的芯片附连材料可包括空隙。在部件之间包括电隔离的半导体器件中，空隙减小芯片附连层的局部放电电阻。因此，如上面所描述的，使用抗静电芯片附连材料来保持合适的局部放电电阻，即使在芯片附连材料中存在空隙。
图1是示出作为一个示例的半导体器件100的剖视图，该半导体器件包括抗静电芯片附连材料。半导体器件100包括衬底102、抗静电芯片附连材料104和半导体芯片106。抗静电芯片附连材料104在衬底102的上表面上。半导体芯片106在抗静电芯片附连材料104的上表面上，以便将半导体芯片106附连至衬底102。
在一种示例中，衬底102是绝缘衬底，例如玻璃衬底、陶瓷衬底、体硅衬底或另一种合适的介电材料衬底。在另一种示例中，衬底102是导电衬底，例如引线框架或另一种合适的导电衬底。半导体芯片106可包括磁场传感器，例如霍尔传感器、磁阻元件(例如大磁阻元件、隧穿磁阻元件)或其他合适的器件。
抗静电芯片附连层104包括非导电粘合剂材料与炭黑(即炭粉末)或石墨(例如石墨片)的混合物。非导电粘合剂材料自身可具有1014Ω·cm的电阻率。非导电粘合剂材料可包括环氧树脂或其他合适的非导电材料。炭黑或石墨被添加至非导电粘合剂材料，以便将形成的抗静电芯片附连材料的电阻率减小到101Ω·cm与1010Ω·cm之间，例如106Ω·cm。在一种示例中，为了使抗静电芯片附连材料具有期望的电阻率，该抗静电芯片附连材料可包括1％与20％重量比之间，例如1％与10％重量比之间或1％与2％重量比之间的炭黑或石墨。
抗静电芯片附连材料104可以采用芯片附连膜(DAF,Die attach film)、后侧涂层、可分布胶水或其他合适的形式。为了制造半导体器件100，抗静电芯片附连材料被施加至衬底102和/或半导体芯片106。然后，布置半导体芯片106和衬底102，使得抗静电芯片附连材料在半导体芯片106与衬底102之间。然后，抗静电芯片附连材料可被固化，以便将半导体芯片106固定地附连至衬底102。
图2是示出作为另一示例的半导体器件200的剖视图，该半导体器件包括抗静电芯片附连材料。半导体器件200包括衬底202、第一抗静电芯片附连材料204、绝缘体206、第二抗静电芯片附连材料208和半导体芯片210。第一抗静电芯片附连材料204在衬底202的上表面上。绝缘体206在第一抗静电附连材料204的上表面上，以便将绝缘体206附连至衬底202。第二抗静电芯片附连材料208在绝缘体206的上表面上。半导体210在第二抗静电芯片附连材料208的上表面上，以便将半导体芯片210附连至绝缘体206。
在这种示例中，衬底202包括导电材料，例如引线框架。绝缘体206包括玻璃、陶瓷、体硅或其他合适的绝缘材料。半导体芯片210可包括电磁场传感器，以便感测由通过衬底202的电流产生的电磁场。在一种示例中，半导体芯片210包括磁场传感器，例如霍尔传感器或磁阻元件，以感测流过衬底202的电流。第一抗静电芯片附连材料204和第二抗静电芯片附连材料208与前面参考图1描述的抗静电芯片附连材料104类似。
图3是示出作为一种示例的半导体器件250的剖视图，该半导体器件在抗静电芯片附连材料中包括空隙。除了半导体器件250在第一抗静电芯片附连材料204中包括空隙252并且在第二抗静电芯片附连材料208中包括空隙254以外，半导体器件250与前面参考图2描述和示出的半导体器件200类似。空隙252与254可由于用于施加抗静电芯片附连材料的工艺形成。
抗静电芯片附连材料204和208防止空隙252和254对半导体器件250的运行产生不利影响。在运行中，高电势(例如大于500V)可施加到衬底202，而低电势(例如小于24V)可施加到半导体芯片210。绝缘体206和抗静电芯片附连材料204和208提供半导体芯片210与衬底202之间的电隔离。抗静电芯片附连材料204和208通过使电荷流过空隙周围的抗静电芯片附连材料来防止空隙252和254内的局部电场。通过使用抗静电附连材料204和208，空隙252和254不会显著减小半导体器件250的局部放电电阻。
用作芯片附连材料的导电粘合剂材料(例如包括银或金填料的粘合剂材料)还可通过充当围绕空隙的法拉第笼来防止空隙252和254中的局部电场。然而，导电粘合剂材料的高导电性会不利地影响半导体器件250的运行，因为显著的旁路电流会流过导电粘合剂材料而不是流过衬底。会流过导电粘合剂材料的该旁路电流可影响由半导体芯片210提供的传感器的准确性。因为抗静电芯片附连材料204和208具有比导电粘合剂材料更低的电阻率，因此可忽略的旁路电流流过抗静电芯片附连材料，从而由半导体芯片210提供的传感器的准确性不会被不利地影响。
图4A是示出去除了封装材料的电流传感器300的一个示例的透视图。图4B是示出电流传感器300的剖视图。电流传感器300包括引线框架302、第一抗静电芯片附连材料308、绝缘体310、第二抗静电芯片附连材料312、半导体芯片314、连接线316和封装材料318。引线框架302包括电流轨304和引线306。
第一抗静电附连材料308在电流轨304的上表面上。绝缘体310在第一抗静电芯片附连材料308上，以便将绝缘体310附连至电流轨304。第二抗静电芯片附连材料312在绝缘体310的上表面上。半导体芯片314在第二抗静电芯片附连材料312上，以便将半导体芯片314附连至绝缘体310。半导体芯片314的上表面上的电触点通过连接线316电耦接到对应的引线306。封装材料318封装连接线316,、半导体芯片314、第二抗静电芯片附连材料312、绝缘体310、第一抗静电芯片附连材料308、和引线框架302的一部分。引线框架302的下表面的至少部分保持暴露，以便允许到引线306与电流轨302的电连接。
引线框架302可包括金属，例如铜、铝或其他合适的金属。绝缘体310可包括玻璃、陶瓷、体硅或其他合适的绝缘材料。半导体芯片314包括磁场传感器，以便感测流过电流轨304的电流。第一抗静电芯片附连材料308和第二抗静电芯片附连材料312与前面参考图1描述的抗静电芯片附连材料104类似。
在运行中，高电势(例如，最高可达1500V)可施加到电流轨304，而低电势(例如0V到5V)可施加到引线306，进而施加到半导体芯片314。绝缘体310和抗静电芯片附连材料308和312提供半导体芯片314与电流轨304之间的电隔离。抗静电芯片附连材料308和312如前面参考图3所述和所示地防止抗静电芯片附连材料的空隙内的局部电场。因此，电流传感器300的局部放电电阻不会受到抗静电芯片附连材料308和312内的空隙的不利影响。
图5是示出用于制造包括抗静电芯片附连材料的半导体器件的方法400的一个示例的流程图。在步骤402中，方法400包括将第一抗静电材料施加到第一衬底上，第一抗静电材料包括非导电粘合剂材料和炭黑或石墨片的混合物。在步骤404中，方法400包括将半导体芯片放置到第一抗静电材料上。在步骤406中，方法400包括固化第一抗静电材料，以便将半导体芯片附连至衬底。在一种示例中，方法400包括将非导电粘合剂材料与炭黑或石墨片混合，以便提供具有101Ω·cm与1010Ω·cm之间的电阻率的第一抗静电材料。在另一种示例中，方法400包括将非导电粘合剂材料与1％与20％重量比之间、例如1％与10％重量比之间或1％与2％重量比之间的炭黑或石墨片混合，以便提供第一抗静电材料。
第一衬底可包括绝缘衬底，并且方法400可进一步包括将第二抗静电材料施加到包括导电材料的第二衬底上。第二抗静电材料包括非导电粘合剂材料与炭黑或石墨片的混合物。第一衬底可放置在第二抗静电材料上，并且第二抗静电材料可被固化，以便附连第一衬底到第二衬底。
尽管本文已经示出并描述了具体示例，但是在不脱离本公开的范围的情况下，各种替代的和/或等同的实施方式可用来替代示出并描述的具体示例。本申请旨在覆盖本文所讨论的具体示例的任何调整或变化。因此，本公开旨在于仅由权利要求及其等同方案限定。

Claims (20)

1.一种半导体器件，包括：
衬底；
半导体芯片；以及
位于所述衬底与所述半导体芯片之间的抗静电芯片附连材料，所述抗静电芯片附连材料包括非导电粘合剂材料与炭黑或石墨的混合物。
2.根据权利要求1所述的半导体器件，其中，所述抗静电芯片附连材料具有101Ω·cm与1010Ω·cm之间的电阻率。
3.根据权利要求1所述的半导体器件，其中，所述抗静电芯片附连材料包括1％与20％重量比之间的炭黑或石墨。
4.根据权利要求1所述的半导体器件，其中，所述衬底包括引线框架。
5.根据权利要求1所述的半导体器件，其中，所述非导电粘合剂材料包括环氧树脂。
6.根据权利要求1所述的半导体器件，其中，所述抗静电芯片附连材料包括芯片附连膜。
7.根据权利要求1所述的半导体器件，其中，所述抗静电芯片附连材料包括后侧涂层。
8.根据权利要求1所述的半导体器件，其中，所述半导体芯片包括磁场传感器。
9.一种半导体器件，包括：
包括导电材料的衬底；
绝缘体；
半导体芯片；
位于所述衬底与所述绝缘体之间的第一抗静电芯片附连材料；以及
位于所述绝缘体与所述半导体芯片之间的第二抗静电芯片附连材料，
其中，所述第一和第二抗静电芯片附连材料包括非导电粘合剂材料与炭黑或石墨片的混合物。
10.根据权利要求9所述的半导体器件，其中，所述第一和第二抗静电芯片附连材料具有101Ω·cm与1010Ω·cm之间的电阻率。
11.根据权利要求9所述的半导体器件，其中，所述第一和第二抗静电芯片附连材料包括1％与10％重量比之间的炭黑或石墨片。
12.根据权利要求9所述的半导体器件，其中，所述衬底包括引线框架。
13.根据权利要求9所述的半导体器件，其中，所述非导电粘合剂材料包括环氧树脂。
14.根据权利要求9所述的半导体器件，其中，所述第一和第二抗静电芯片附连材料包括芯片附连膜。
15.根据权利要求9所述的半导体器件，其中，所述半导体芯片包括磁场传感器，以便感测流过衬底的电流。
16.根据权利要求9所述的半导体器件，其中，所述绝缘体包括玻璃、体硅或陶瓷。
17.一种用于制造半导体器件的方法，所述方法包括：
将第一抗静电材料施加到第一衬底上，所述第一抗静电材料包括非导电粘合剂材料与炭黑或石墨片的混合物；
将半导体芯片放置到所述第一抗静电材料上；以及
固化所述第一抗静电材料，以便将所述半导体芯片附连至所述衬底。
18.根据权利要求17所述的方法，还包括：
将所述非导电粘合剂材料与所述炭黑或石墨片混合，以便提供具有101Ω·cm与1010Ω·cm之间的电阻率的第一抗静电材料。
19.根据权利要求17所述的方法，还包括：
将所述非导电粘合剂材料与1％与2％重量比之间的炭黑或石墨片混合，以便提供所述第一抗静电材料。
20.根据权利要求17所述的方法，其中，所述第一衬底包括绝缘衬底，所述方法还包括：
将第二抗静电材料施加到包括导电材料的第二衬底上，所述第二抗静电材料包括非导电粘合剂材料与炭黑或石墨片的混合物；
将所述第一衬底放置到所述第二抗静电材料上；以及
固化所述第二抗静电材料，以便将所述第一衬底附连至所述第二衬底。
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