CN107078124B - 用于具有半导体芯片的电子系统的封装 - Google Patents

用于具有半导体芯片的电子系统的封装 Download PDF

Info

Publication number
CN107078124B
CN107078124B CN201580059417.8A CN201580059417A CN107078124B CN 107078124 B CN107078124 B CN 107078124B CN 201580059417 A CN201580059417 A CN 201580059417A CN 107078124 B CN107078124 B CN 107078124B
Authority
CN
China
Prior art keywords
chip
plane
semiconductor
slab
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201580059417.8A
Other languages
English (en)
Chinese (zh)
Other versions
CN107078124A (zh
Inventor
O·J·洛佩兹
J·A·纳奎尔
T·E·葛瑞布斯
S·J·莫洛伊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CN107078124A publication Critical patent/CN107078124A/zh
Application granted granted Critical
Publication of CN107078124B publication Critical patent/CN107078124B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/17—Containers or parts thereof characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/658—Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/074—Connecting or disconnecting of anisotropic conductive adhesives
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
CN201580059417.8A 2014-11-11 2015-11-11 用于具有半导体芯片的电子系统的封装 Active CN107078124B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/537,943 2014-11-11
US14/537,943 US9305852B1 (en) 2014-11-11 2014-11-11 Silicon package for embedded electronic system having stacked semiconductor chips
PCT/US2015/060208 WO2016077488A1 (en) 2014-11-11 2015-11-11 Package for electronic system having semiconductor chips

Publications (2)

Publication Number Publication Date
CN107078124A CN107078124A (zh) 2017-08-18
CN107078124B true CN107078124B (zh) 2020-11-06

Family

ID=55589080

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580059417.8A Active CN107078124B (zh) 2014-11-11 2015-11-11 用于具有半导体芯片的电子系统的封装

Country Status (5)

Country Link
US (2) US9305852B1 (https=)
EP (1) EP3218930B1 (https=)
JP (1) JP6709785B2 (https=)
CN (1) CN107078124B (https=)
WO (1) WO2016077488A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9893058B2 (en) * 2015-09-17 2018-02-13 Semiconductor Components Industries, Llc Method of manufacturing a semiconductor device having reduced on-state resistance and structure
EP3279935B1 (en) * 2016-08-02 2019-01-02 ABB Schweiz AG Power semiconductor module
US20200235067A1 (en) * 2019-01-22 2020-07-23 Texas Instruments Incorporated Electronic device flip chip package with exposed clip
US11031321B2 (en) * 2019-03-15 2021-06-08 Infineon Technologies Ag Semiconductor device having a die pad with a dam-like configuration
US11024564B2 (en) 2019-06-19 2021-06-01 Texas Instruments Incorporated Packaged electronic device with film isolated power stack
EP3944304A1 (en) * 2020-07-20 2022-01-26 Nexperia B.V. A semiconductor device and a method of manufacture
CN114899171B (zh) * 2022-04-29 2025-10-03 佛山市国星光电股份有限公司 一种无焊线功率器件
CN115188853A (zh) * 2022-08-15 2022-10-14 西安西热产品认证检测有限公司 一种低温双面光伏组件

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004128356A (ja) * 2002-10-04 2004-04-22 Fujitsu Ltd 半導体装置
CN103180240A (zh) * 2010-10-26 2013-06-26 美敦力公司 包括电源的晶片规格封装件

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4568958A (en) * 1984-01-03 1986-02-04 General Electric Company Inversion-mode insulated-gate gallium arsenide field-effect transistors
EP1501126A1 (en) * 2003-11-05 2005-01-26 Infineon Technologies AG Semiconductor chip having a cavity for stacked die application
US7279786B2 (en) * 2005-02-04 2007-10-09 Stats Chippac Ltd. Nested integrated circuit package on package system
US9147649B2 (en) * 2008-01-24 2015-09-29 Infineon Technologies Ag Multi-chip module
US8358014B2 (en) * 2009-05-28 2013-01-22 Texas Instruments Incorporated Structure and method for power field effect transistor
WO2012021310A1 (en) * 2010-08-09 2012-02-16 Rambus Inc. Disaggregated semiconductor chip assembly and packaging technique
US9337116B2 (en) * 2010-10-28 2016-05-10 Stats Chippac, Ltd. Semiconductor device and method of forming stepped interposer for stacking and electrically connecting semiconductor die
US8994048B2 (en) * 2010-12-09 2015-03-31 Stats Chippac, Ltd. Semiconductor device and method of forming recesses in substrate for same size or different sized die with vertical integration
CN102169872B (zh) * 2011-01-26 2013-07-03 上海腾怡半导体有限公司 集成电感的电源模块
GB2492551A (en) * 2011-07-04 2013-01-09 Accuric Ltd Current regulator
US9589929B2 (en) * 2013-03-14 2017-03-07 Vishay-Siliconix Method for fabricating stack die package
JP2014209091A (ja) * 2013-03-25 2014-11-06 ローム株式会社 半導体装置
TWI518844B (zh) * 2013-12-11 2016-01-21 矽品精密工業股份有限公司 封裝結構及其製法
CN105575913B (zh) * 2016-02-23 2019-02-01 华天科技（昆山）电子有限公司 埋入硅基板扇出型3d封装结构

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004128356A (ja) * 2002-10-04 2004-04-22 Fujitsu Ltd 半導体装置
CN103180240A (zh) * 2010-10-26 2013-06-26 美敦力公司 包括电源的晶片规格封装件

Also Published As

Publication number Publication date
EP3218930A4 (en) 2018-07-25
US9305852B1 (en) 2016-04-05
WO2016077488A1 (en) 2016-05-19
EP3218930B1 (en) 2020-05-27
JP6709785B2 (ja) 2020-06-17
US20160172338A1 (en) 2016-06-16
CN107078124A (zh) 2017-08-18
US10109614B2 (en) 2018-10-23
JP2017535960A (ja) 2017-11-30
EP3218930A1 (en) 2017-09-20

Similar Documents

Publication Publication Date Title
CN107078124B (zh) 用于具有半导体芯片的电子系统的封装
US11177246B2 (en) Photo-sensitive silicon package embedding self-powered electronic system
CN105981170B (zh) 具有半导体芯片端子的dc-dc转换器
US10121716B2 (en) Silicon package for embedded semiconductor chip and power converter
CN103426837B (zh) 半导体封装及形成半导体封装的方法
TW201310603A (zh) 背對背堆疊晶粒
CN108155168B (zh) 电子器件
JP5596740B2 (ja) 打抜きリードフレームを備えるカスコード接続された高電圧ｉｉｉ族窒化物整流器パッケージ
US20180331083A1 (en) Power Converter Monolithically Integrating Transistors, Carrier, and Components
CN107546191A (zh) 具有单列直插引线模块的半导体功率器件及其制备方法
US20200135632A1 (en) Die isolation on a substrate
US10153220B2 (en) Silicon package having electrical functionality by embedded passive components
US20240258372A1 (en) Electronic component and package including stress release structure as lateral edge portion of semiconductor body
CN112530919B (zh) 公共源极平面网格阵列封装
CN117790417A (zh) 半导体电路和器件制造方法、晶圆复合体和半导体器件

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant