CN106953635A - A kind of frequency source modeling method and system - Google Patents

A kind of frequency source modeling method and system Download PDF

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Publication number
CN106953635A
CN106953635A CN201710093030.5A CN201710093030A CN106953635A CN 106953635 A CN106953635 A CN 106953635A CN 201710093030 A CN201710093030 A CN 201710093030A CN 106953635 A CN106953635 A CN 106953635A
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frequency
output
crossover
obtains
integrator
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孙永波
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Jianghan University
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Jianghan University
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

The invention discloses a kind of frequency source modeling, including:Frequency division module, for carrying out scaling down processing to reference source, obtains crossover frequency;Detector amplefier, for carrying out detection amplification to the crossover frequency, obtains first frequency;Integrator, for being integrated processing to the first frequency, obtains second frequency;Frequency multiplier, for carrying out multiple amplification to the crossover frequency, obtains the 3rd frequency;Simulation excitation generator, for according to the second frequency and the 3rd frequency, obtaining output frequency;Central controller, for the work of complex control system, and obtains the relation between the output frequency and the crossover frequency.Solve to exist in existing frequency source modeling method and can not accurately obtain the technical problem of output frequency.

Description

A kind of frequency source modeling method and system
Technical field
The present invention relates to signal processing technology field, more particularly to a kind of frequency source modeling method and system.
Background technology
The dynamic changing process of frequency source plays an important role in the research to frequency source, therefore, how to frequency Source is modeled, it appears particularly important.
In the prior art, to the modeling method of frequency source, empirical value analysis is commonly relied on, does not consider that frequency source was modeled In journey situations such as the change of actual parameter, thus output frequency can not be accurately obtained.
It can be seen that, the technical problem of output frequency can not accurately be obtained by existing in existing frequency source modeling method.
The content of the invention
The present invention provides a kind of frequency source emulation mode and system, to solve to exist in existing frequency source modeling method The technical problem of output frequency can not accurately be obtained.
The embodiments of the invention provide a kind of frequency source modeling, including:
Frequency division module, for carrying out scaling down processing to reference source, obtains crossover frequency;
Detector amplefier, for carrying out detection amplification to the crossover frequency, obtains first frequency;
Integrator, for being integrated processing to the first frequency, obtains second frequency;
Frequency multiplier, for carrying out multiple amplification to the crossover frequency, obtains the 3rd frequency;
Simulation excitation generator, for according to the second frequency and the 3rd frequency, obtaining output frequency;
Central controller, for the work of complex control system, and obtain the output frequency and the crossover frequency it Between relation.
Optionally, it is described that detection amplification is carried out to the crossover frequency, first frequency is obtained, including:
Obtain the first transmission function and discrimination gradient of the detector amplefier;
According to first transmission function, discrimination gradient, first frequency is obtained.
Optionally, it is described that processing is integrated to the first frequency, second frequency is obtained, including:
Obtain the second transmission function of the integrator;
According to second transmission function, the second frequency is obtained.
Optionally, it is described to be used to carry out multiple amplification to the crossover frequency using frequency multiplier, obtain the 3rd frequency, bag Include:
Obtain the Clock Multiplier Factor of the frequency multiplier;
According to the Clock Multiplier Factor, the 3rd frequency is obtained.
Optionally, according to the second frequency and the 3rd frequency, output frequency is obtained;Including:
Obtain the open-loop gain of the system;
Obtain the error of the reference source, detector amplefier, integrator, simulation excitation generator and frequency multiplier output end;
Obtain the voltage-controlled slope of the simulation excitation generator;
According to the open-loop gain, error and voltage-controlled slope, the output frequency is obtained.
Optionally, the computing formula of the open-loop gain is:
Wherein, G0=KDETKOSCM, M are Clock Multiplier Factor, KDETIt is oblique for detector amplefier frequency discrimination Rate, KOSCFor the voltage-controlled slope of simulation excitation generator;S is detector amplefier for complex Fourier frequency S=j ω=j2 π f, Th Time constant, Ti time constant of integrator.
Optionally, the computing formula of the output frequency is:
Wherein, εREF, εDET, εINT, εOSC, εMULRespectively reference source, detector amplefier, integrator, simulation excitation generator and frequency multiplier output The error at end, fOUTFor output frequency, fREFFor crossover frequency.
Optionally, the system also includes simplifying module, for the computing formula according to the output frequency, simplifies described Relation between output frequency and crossover frequency.
Optionally, the system also includes time constant generator module, the different time constant for producing, and applies In the detector amplefier and integrator.
Optionally, the system also includes frequency stabilization tester, the stability for measuring the output frequency.
The one or more technical schemes provided in the embodiment of the present invention, at least have the following technical effect that or advantage:
The frequency source modeling that the embodiment of the present application is provided, scaling down processing acquisition is carried out by frequency division module to reference source Crossover frequency;Detector amplefier carries out detection amplification to the crossover frequency and obtains first frequency;Integrator is to the described first frequency Rate is integrated processing and obtains second frequency;Frequency multiplier carries out multiple amplification to the crossover frequency and obtains the 3rd frequency;Emulation Actuation generator obtains output frequency according to the second frequency and the 3rd frequency;Central controller complex control system Work, and obtain the relation between the output frequency and the crossover frequency.Solve in existing frequency source modeling method In the presence of can not accurately obtain the technical problem of output frequency, acquisition frequency source output frequency exactly is realized, emulation is improved Accuracy.
Described above is only the general introduction of technical solution of the present invention, in order to better understand the technological means of the present invention, And can be practiced according to the content of specification, and in order to allow the above and other objects of the present invention, feature and advantage can Become apparent, below especially exemplified by the embodiment of the present invention.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are this hairs Some bright embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can be with root Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the logical construction schematic diagram of frequency source modeling in the embodiment of the present invention;
Fig. 2 is the circuit structure diagram of system Mid Frequency setting in Fig. 1;
Fig. 3 is the judgement schematic diagram of signal in Fig. 2;
Fig. 4 is the strategy protocol figure of modeling in Fig. 1.
Embodiment
The present invention provides this kind of frequency source emulation mode and system, solves and exists in existing frequency source modeling method The technical problem of output frequency can not accurately be obtained.
Technical scheme in the embodiment of the present application, general thought is as follows:
A kind of frequency source modeling, including:Frequency division module, for carrying out scaling down processing to reference source, obtains frequency dividing frequency Rate;Detector amplefier, for carrying out detection amplification to the crossover frequency, obtains first frequency;Integrator, for described One frequency is integrated processing, obtains second frequency;Frequency multiplier, for carrying out multiple amplification to the crossover frequency, obtains the Three frequencies;Simulation excitation generator, for according to the second frequency and the 3rd frequency, obtaining output frequency;Center control Device processed, for the work of complex control system, and obtains the relation between the output frequency and the crossover frequency.
Said system carries out scaling down processing by frequency division module to reference source, obtains crossover frequency, and amplify by detection Device, integrator processing obtain second frequency, carry out multiple amplification to the crossover frequency using frequency multiplier, obtain the 3rd frequency; Then by simulation excitation generator according to the second frequency and the 3rd frequency, output frequency is obtained;Finally obtain institute State the relation between output frequency and the crossover frequency.So as to realize acquisition frequency source output frequency exactly, improve imitative The technique effect of genuine accuracy, the skill of output frequency can not accurately be obtained by solving to exist in existing frequency source modeling method Art problem.
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is A part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
The present embodiment provides a kind of frequency source modeling, refer to Fig. 1, the system includes:
Frequency division module, for carrying out scaling down processing to reference source, obtains crossover frequency;
Detector amplefier, for carrying out detection amplification to the crossover frequency, obtains first frequency;
Integrator, for being integrated processing to the first frequency, obtains second frequency;
Frequency multiplier, for carrying out multiple amplification to the crossover frequency, obtains the 3rd frequency;
Simulation excitation generator, for according to the second frequency and the 3rd frequency, obtaining output frequency;
Central controller, for the work of complex control system, and obtain the output frequency and the crossover frequency it Between relation.
Said system carries out scaling down processing by frequency division module to reference source, obtains crossover frequency, and amplify by detection Device, integrator processing obtain second frequency, carry out multiple amplification to the crossover frequency using frequency multiplier, obtain the 3rd frequency; Then by simulation excitation generator according to the second frequency and the 3rd frequency, output frequency is obtained;Finally obtain institute State the relation between output frequency and the crossover frequency.So as to realize acquisition frequency source output frequency exactly, improve imitative The technique effect of genuine accuracy, the skill of output frequency can not accurately be obtained by solving to exist in existing frequency source modeling method Art problem.
It is described that detection amplification is carried out to the crossover frequency, first frequency is obtained, including:
Obtain the first transmission function and discrimination gradient of the detector amplefier;
According to first transmission function, discrimination gradient, first frequency is obtained.
It is described that processing is integrated to the first frequency, second frequency is obtained, including:
Obtain the second transmission function of the integrator;
According to second transmission function, the second frequency is obtained.
It is described to be used to carry out multiple amplification to the crossover frequency using frequency multiplier, the 3rd frequency is obtained, including:
Obtain the Clock Multiplier Factor of the frequency multiplier;
According to the Clock Multiplier Factor, the 3rd frequency is obtained.
According to the second frequency and the 3rd frequency, output frequency is obtained;Including:
Obtain the open-loop gain of the system;
Obtain the error of the reference source, detector amplefier, integrator, simulation excitation generator and frequency multiplier output end;
Obtain the voltage-controlled slope of the simulation excitation generator;
According to the open-loop gain, error and voltage-controlled slope, the output frequency is obtained.
The computing formula of the open-loop gain is:
Wherein, G0=KDETKOSCM, M are Clock Multiplier Factor, KDETIt is oblique for detector amplefier frequency discrimination Rate, KOSCFor the voltage-controlled slope of simulation excitation generator;S is detector amplefier for complex Fourier frequency S=j ω=j2 π f, Th Time constant, Ti time constant of integrator.
The computing formula of the output frequency is:
Wherein, εREF, εDET, εINT, εOSC, εMULRespectively reference source, detector amplefier, integrator, simulation excitation generator and frequency multiplier output The error at end, fOUTFor output frequency, fREFFor crossover frequency.
System provided in an embodiment of the present invention, also including simplifying module, for the computing formula according to the output frequency, Simplify the relation between the output frequency and crossover frequency.
System provided in an embodiment of the present invention, also including time constant generator module, for producing, the different time is normal Number, and applied to the detector amplefier and integrator.
System provided in an embodiment of the present invention, also including frequency stabilization tester, the stability for measuring the output frequency.
Below, the frequency source modeling that the application is provided is described in detail with reference to Fig. 1-Fig. 4:
F in figure0For the original frequency of high steady reference source, fREF、fOUTRespectively high steady reference source crossover frequency swashs with emulation Encourage generator output frequency.εREF, εDET, εINT, εOSC, εMULRespectively high steady reference source, detector amplefier, integrator, emulation swash Encourage the error of generator and frequency multiplier output end.M is Clock Multiplier Factor, KDETFor detector amplefier discrimination gradient, KOSCSwash for emulation Encourage the voltage-controlled slope of generator.1/(1+STh) be detector amplefier transmission function, wherein S be complex Fourier frequency S=j ω=j2 π f, ThFor time constant.A and TiThe respectively multiplication factor and time constant of integrator, in specific implementation process In, to realize Fig. 1 modeling, time constant generator module can be increased, the module is gone here and there by resistance and condenser type multistage Shunt circuit is constituted, and can produce different time constants, and T and the T of integrator applied to the detector amplefieri
Preferably, in Fig. 1 integrator, to simplify the measurement result of modeling, the amplification of integrator can be set Multiple A is infinity, then the transmission function that integrator can be approx thought when A levels off to infinity is 1/STi.And it is fixed Justice:
G0=KDETKOSCM (1)
Then the open-loop gain of frequency source modeling is in the present invention:
The stable state output frequency of simulation excitation source generator is represented by:
After system reaches stable state in loop work, it is 1 generally to have G (s) convergences, and therefore, formula (3) can be reduced to following Form
(4) formula is further simplified, the stable state output frequency of simulation excitation source generator should be waited in the ideal situation There is a multiple proportion in frequency values after high stable reference source frequency dividing:
Should try one's best to reduce the error of above-mentioned electronic circuitry part and improve open-loop gain G (s).For the ease of obtaining result, In embodiments of the present invention, can by εREF, εDET, εINT, εOSC, εMULEvery error is set to fixed value.To improve in the present invention The performance of frequency source modeling, can make open-loop gain G (s) become big, make the molecule G in formula (2)0=KDETKOSCM becomes big, But actually G0There should be the limit.It is generally acknowledged that the damped coefficient of system is no less than 0.5, then
In one implementation, G is set0=1, while making Th=Ti.The method of realization is:
(1), detector amplefier, simulation excitation generator, the K of frequency multiplier are set respectively by central controllerDET、KOSC、 M, makes G0=KDETKOSCM is equal to 1;
(2), the corresponding time constant T of detector amplefier, integrator is set respectively by central controllerh=Ti
After above-mentioned setting, the open-loop gain of Fig. 1 analogue systems of formula (2) statement is:
It should be noted that reducing time constant Th, the open-loop gain of modeling is increased according to formula (7), this is that have Beneficial to systematic function, this also increases loop filter bandwidth f simultaneouslyh.Height equivalent to one frequency discrimination of steady reference source described in Fig. 1 Device, when its long term drift can be ignored, it is assumed that its power-law noise formula is:
Sy(f)REF=h0+h-1f-1 (8)
The loop work of modeling is in linear condition under theoretical case, if it is considered that simulation excitation generator and height are steady Reference source power spectral density (Sy(f)OSCWith Sy(f)REF) completely uncorrelated, then the power output spectrum density of figure modeling can be with It is expressed as:
According to definition, then ST can be obtainedh=jf/fh, therefore, (8) formula substitute into (9) formula it is seen thatWhen emulation average period very in short-term, (f/fh) > > 1, have
(the f/f when the average period of emulation is extremely longh) < < 1, have
From the foregoing, whole loop is a high-pass filter for simulation excitation generator;Pair with high steady reference It is a low pass filter for source;Its filtering characteristic by loop filter high end cut-off frequencies fhDetermine.(10) pole of formula End situation is Sy(f)0=Sy(f)OSC, the extreme case of (11) formula is Sy(f)0=Sy(f)REF.As can be seen that fhCrossing senior general makes to build The output signal short-term stability of modular system is deteriorated;fhIt is too small that modeling output signal long-term stability will be made to be deteriorated.Building After modular system closed loop, then the loop bandwidth i.e. high end cut-off frequencies f of system can not be learnth, modeling system can be characterized with Q values The stabilization signal for output signal of uniting, and the simulation results for drawing and characterizing system q are measured by frequency stabilization tester, so that Indirect reaction loop bandwidth is high end cut-off frequencies fhValue selection quality.
According to the modeling described in Fig. 1, the frequency range that modeling model is pre-seted is as follows:
(1) it is, to realize the simulated response of high band, the steady reference source of the higher height of selection frequency, after Fig. 1 scaling down processing The signal frequency of acquisition is 50.****MHz.The * * * * (remaining into four) of wherein decimal place are random, are risen for convenience of description See, the F in taking * * * *=1234, i.e. Fig. 1 in the specific implementation process of the present inventionREFFor 50.1234MHz;
(2) the initialization simulation excitation generator output 10MHz frequency signals that, central controller is set;
(3), the initialization frequency multiplier output signal frequency and F that central controller is setREFTheoretical value is identical, i.e., be also 50.1234MHz;
(4), simulation excitation generator output signal frequency and frequency multiplier output signal frequency have linkage to correlate.
Wherein processor be located at DDS1 in the central controller module in Fig. 1, and in processor XTAL ends and Fig. 2, DDS2 RefClk terminates the frequency signal into same clock source, from synchronization during ensureing.
Concrete implementation process is referring to Fig. 2, clock ginseng of the processor when outside input end of clock (XTAL) is as work On the basis of examining, the three adjustable square-wave signals of road phase relation are produced respectively, wherein keying FM signal delivers to DDS1's all the way FSK keying frequency modulation input ports realize frequency modulation, all the way synchronous reference signal be used as synchronous phase demodulation, all the way mapping of judgement signal The lock-in detection of 1 phaselocked loop.
On the basis of reference clocks of the DDS1 when outside clock reference input (RefClk) is as work, pass through processor Serial sequential communication between DDS1, the high and low electricity for the square wave keying frequency modulation square-wave signal that DDS1 is sent according to FSK ends processor Level state chooses the multiple-frequency modulation data presetting frequency conduct that processor is inputted in internal frequency control register (F1, F0) respectively Output, so as to produce the frequency signal 50.1234MHz ± △ f outputs with modulation.Preset frequency-splitting △ f are by two frequencies Numerical value in control register F1, F0 determines, it is 50.1234MHz (the 4th essence after decimal point specifically to consider radiofrequency signal It is close), take △ f=100Hz.
It is similar with the principle that above-mentioned processor controls DDS1 generation multiple-frequency modulation signals, when processor is by serial communication Sequence, DDS2 is passed to by same frequency dividing numerical value, and the 50.1234MHz frequency signals produced without modulation are exported.DDS2 is obtained 50.1234MHz frequency signals send into DDS3 external clock benchmark input end (RefClk), reference when being worked as DDS3 Clock.Processor is communicated according to serial sequential, and output frequency (10MHz) numerical value will be initialized accordingly and passes to DDS3, so that Obtain the output of simulation excitation source generator frequency signal.
Due to DDS3 external reference when base use the frequency-doubled signal that DDS2 is produced, therefore in this programme, when closing in Fig. 1 Central controller in cyclization road is obtained after corresponding phase discrimination signal information, can change corresponding DDS2 multiple-frequency modulation signal Frequency, so can also cause the frequency of DDS3 output signals to change, that is, instead of traditional side by D/A VCXOs Formula changes the output frequency value of local oscillator, and then changes the method for system output frequency.It is worth noting that, for output frequency Signal employs the mode of direct digital synthesizers so that a higher synthesizer of stability is act as in certain application Role.User can be in practical application requirement, pass through user input port in Fig. 2, easily change DDS3 whole machine The frequency values of output signal.
From aforementioned schemes, G can be set0=KDETKOSCM is equal to 1, while making Th=Ti.According to above-mentioned multiple proportion Strategy, the signal frequency for exporting simulation excitation source generator is that the frequency selection after 10MHz, high steady reference source frequency dividing is 50.1234MHz, according to formula (5)M=5 can be obtained.From above-mentioned multiple proportion strategy, due to System output frequency value side is not changed by the way of traditional VCXO by D/A in the analogue system of design drawing 1 Method, so the K in Fig. 1OSCThe voltage-controlled slope of simulation excitation generator can not be known, can only pass through G0=KDETKOSCM is equal to 1 and K is obtained by M=5DET*KOSC=1/5 conclusion.In specific implementation process, central controller can only be passed through according to Fig. 1 K is carried out to detector amplefierDETThe setting of value.Because the time constant in analogue system is only by ThDetermine, so can according to Fig. 1 With by central controller to the control realization of time constant generator to detector amplefier, the pickup time constant T of integratorh With integration time constant TiSetting, and make Th=Ti
Specific judgment basis is as shown in figure 3, the embodiment of the present invention produces three road square waves letters by processor in fig. 2 Number:Synchronous reference signal, keying FM signal, judgement signal, make synchronous reference signal frequency be equal to keying FM signal frequently Rate, and have certain phase delay poor;Make N times of synchronous reference signal frequency of judgement signal frequency or keying frequency modulation simultaneously Signal frequency, and have certain phase delay poor.Specifically, synchronous reference signal frequency is taken to be equal to keying FM signal frequency For 79Hz, and both phase differences are 100 degree;Take simultaneously and judge that with signal frequency N values be 4 times, and with synchronous reference signal phase Difference is 40 degree.
Judgement is the square wave that has fixed frequency and phase relation with signal, synchronous reference signal, keying FM signal in Fig. 3 Data signal;Enabling signal is either 1 or is 0, therefore can be regarded as the square wave data signal of no fixed frequency;Phase demodulation is believed Number by Fig. 1 integrator produce, it be one change direct current signal, therefore can be regarded as no fixed frequency simulation letter Number.
According to Fig. 3 principle and combine Fig. 1, judgement can be set and opened with a certain rising edge of signal as triggering judgement Begin, 10 judgements are completed before the arrival of next rising edge, when then next rising edge arrives, next group is triggered again and is sentenced for 10 times It is disconnected.Due in Fig. 3 judgement be with the frequency of signal, it is known that the time T between i.e. two neighboring rising edge is known, therefore can be with The time interval of 10 judgements of mean allocation one group.
Central controller is judged the phase discrimination signal conveyed by integrator according to above-mentioned triggering Rule of judgment in Fig. 1, When its analog DC signal magnitude is located in the non-enable banded regions shown in Fig. 3, central controller exports the enable letter in Fig. 3 Number be 0, Fig. 1 in the steady measuring instrument of frequency do not work;When its analog DC signal magnitude is located at outside the non-enable banded regions shown in Fig. 3 When, the enable signal that central controller exports in Fig. 3 is that the steady measuring instrument of frequency in 1, Fig. 1 is started working;Emulate Q values actually It is the simulation results value exported when the steady measuring instrument of Fig. 1 intermediate frequencies works, it reflects the property of Fig. 1 analogue system output signals Can,
During whole emulation, central controller initializes all desire arranges values, these parameters are just when starting No longer change, there was only detector amplefier parameter K during dynamic simulationDETValue, detector amplefier time constant ThValue must be by center control Device module processed enters Mobile state setting, and it is then emulation Q values to judge the whether rational criterion of the two parameters.For example, K can be givenDETValue takes scope a 1-100, same ThAlso a 1-100 is taken.When Fig. 1 systems are emulated at the beginning, except setting each road Outside Initialize installation value, in KDETValue and ThValue gamut emulates one time and obtains corresponding Q values, and Q values are located between L and H, definition For L=1 to H=100 (Q values are the bigger the better), it is " modeling area " that can define the Q Value Datas in this section of simulation time, simultaneously fixed Adopted H1=H/10, specifically may refer to Fig. 4.
It should be noted that:Modeling figure in Fig. 4, central controller sets KDETValue and ThValue, and synchronous recording Q values and Phase discrimination signal value J in Fig. 1 and Fig. 3, and make setting KDETValue and ThValue changes in the opposite direction.It is a certain after the completion of modeling Point S location starts emulation.When it is H1 that Q values, which reach P1 points to be emulation Q values, central processing unit judges that the moment of this in Fig. 4 phase demodulation is believed (J1 values here are previous from S points to P points in Fig. 4 to number value J and arithmetic mean of instantaneous value J1 of all phase discrimination signal values before relation The arithmetic average for the phase discrimination signal value that moment all each emulation central processing unit is obtained), work as J<During 1.53*J1, in continuation Parameters simulation is stated, until Q values are less than after H1, and the Q values at certain moment than last Q values are increased, i.e. P points in Fig. 4, then Following strategy can be triggered:
Now central processing unit makes setting KDETValue and ThThe change direction of value is identical, and sets K next timeDETValue (note For K2) compared with this KDETValue (being designated as K1) is increased (i.e. K2>K1);T is set next timehValue (being designated as T2) is then compared with this ThValue (being designated as T1) is increased (i.e. T2>T1);Q values and phase discrimination signal value J are recorded simultaneously.Until according to " the tactful anticipation shown in Fig. 4 Line ", when Q values reach H2.
K each time after the above-mentioned point to PDETValue, ThThe Q values that the reset system of value is obtained are more last be all it is increased, when to Up to after H2, a rear KDETValue, ThThe Q values of the reset system acquisition of value are more last to be reduced, that is, flex point occur, then it is assumed that Effectively, central processing unit recalls the K that P points are set in Fig. 4 to this simulation resultDETValue and ThValue is used as optimal value.
The one or more technical schemes provided in the embodiment of the present invention, at least have the following technical effect that or advantage:
The frequency source modeling that the embodiment of the present application is provided, scaling down processing acquisition is carried out by frequency division module to reference source Crossover frequency;Detector amplefier carries out detection amplification to the crossover frequency and obtains first frequency;Integrator is to the described first frequency Rate is integrated processing and obtains second frequency;Frequency multiplier carries out multiple amplification to the crossover frequency and obtains the 3rd frequency;Emulation Actuation generator obtains output frequency according to the second frequency and the 3rd frequency;Central controller complex control system Work, and obtain the relation between the output frequency and the crossover frequency.Solve in existing frequency source modeling method In the presence of can not accurately obtain the technical problem of output frequency, acquisition frequency source output frequency exactly is realized, emulation is improved Accuracy.
, but those skilled in the art once know basic creation although preferred embodiments of the present invention have been described Property concept, then can make other change and modification to these embodiments.So, appended claims are intended to be construed to include excellent Select embodiment and fall into having altered and changing for the scope of the invention.
Obviously, those skilled in the art can carry out various changes and modification without departing from this hair to the embodiment of the present invention The spirit and scope of bright embodiment.So, if these modifications and modification of the embodiment of the present invention belong to the claims in the present invention And its within the scope of equivalent technologies, then the present invention is also intended to comprising including these changes and modification.

Claims (10)

1. a kind of frequency source modeling, it is characterised in that including:
Frequency division module, for carrying out scaling down processing to reference source, obtains crossover frequency;
Detector amplefier, for carrying out detection amplification to the crossover frequency, obtains first frequency;
Integrator, for being integrated processing to the first frequency, obtains second frequency;
Frequency multiplier, for carrying out multiple amplification to the crossover frequency, obtains the 3rd frequency;
Simulation excitation generator, for according to the second frequency and the 3rd frequency, obtaining output frequency;
Central controller, for the work of complex control system, and is obtained between the output frequency and the crossover frequency Relation.
2. the system as claimed in claim 1, it is characterised in that described to carry out detection amplification to the crossover frequency, the is obtained One frequency, including:
Obtain the first transmission function and discrimination gradient of the detector amplefier;
According to first transmission function, discrimination gradient, first frequency is obtained.
3. the system as claimed in claim 1, it is characterised in that described that processing is integrated to the first frequency, the is obtained Two frequencies, including:
Obtain the second transmission function of the integrator;
According to second transmission function, the second frequency is obtained.
4. the system as claimed in claim 1, it is characterised in that described to be used to carry out again the crossover frequency using frequency multiplier Number amplification, obtains the 3rd frequency, including:
Obtain the Clock Multiplier Factor of the frequency multiplier;
According to the Clock Multiplier Factor, the 3rd frequency is obtained.
5. the system as claimed in claim 1, it is characterised in that according to the second frequency and the 3rd frequency, is obtained defeated Go out frequency;Including:
Obtain the open-loop gain of the system;
Obtain the error of the reference source, detector amplefier, integrator, simulation excitation generator and frequency multiplier output end;
Obtain the voltage-controlled slope of the simulation excitation generator;
According to the open-loop gain, error and voltage-controlled slope, the output frequency is obtained.
6. system as claimed in claim 5, it is characterised in that the computing formula of the open-loop gain is:
Wherein, G0=KDETKOSCM, M are Clock Multiplier Factor, KDETFor detector amplefier discrimination gradient, KOSC For the voltage-controlled slope of simulation excitation generator;S is that complex Fourier frequency S=j ω=j2 π f, Th is that the detector amplefier time is normal Number, Ti time constant of integrator.
7. the system as described in claims 6, it is characterised in that the computing formula of the output frequency is:Wherein, εREF, εDET, εINT, εOSC, εMULRespectively reference source, detector amplefier, integrator, simulation excitation generator and frequency multiplier output end Error, fOUTFor output frequency, fREFFor crossover frequency.
8. the system as claimed in claim 1, it is characterised in that also including simplifying module, for according to the output frequency Computing formula, simplifies the relation between the output frequency and crossover frequency.
9. the system as claimed in claim 1, it is characterised in that the system also includes time constant generator module, is used for Produce different time constants, and applied to the detector amplefier and integrator.
10. the system as described in claims any one of 1-9, it is characterised in that the system also includes frequency stabilization tester, Stability for measuring the output frequency.
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