CN106941353A - A kind of time-domain signal optimization Simulation system - Google Patents

Abstract

The invention discloses a time-domain signal optimization simulation system. The time-domain signal optimization simulation system includes a central controller, a time constant generator, a frequency division module, a detection amplifier, an integrator, a simulation excitation source generator, and a frequency stability test instrument, a strategy controller and a frequency multiplier; the frequency division module, a detection amplifier, and an integrator are sequentially connected in series; the integrator is connected to the central controller; the central controller is respectively connected to the frequency multiplier, The simulated excitation source generator, the strategy controller and the frequency stability tester are connected; the strategy controller is connected with the detection amplifier, and is connected in series with the time constant generator and the detection amplifier successively; the time constant generator is connected with the The integrator is connected; the frequency multiplier is respectively connected with the frequency division module and the simulation excitation source generator; the simulation excitation source generator is connected with the frequency stability tester.

Description

A time-domain signal optimization simulation system

technical field

The invention relates to the field of circuit technology, in particular to a time-domain signal optimization simulation system.

Background technique

With the continuous improvement of science and technology, people are getting higher and higher on the simulation system. The calculation accuracy of the simulation system in the prior art is low, and when simulating a complex system, it is difficult to implement on the circuit, and the accuracy is not easy to guarantee.

Contents of the invention

The present invention provides a time-domain signal optimization simulation system, which solves the above-mentioned technical problems and achieves the technical effects that the simulation system has high calculation precision, and when simulating a complex system, it is difficult to implement on the line, and the precision is easy to guarantee.

The present invention provides a time-domain signal optimization simulation system. The time-domain signal optimization simulation system includes a central controller, a time constant generator, a frequency division module, a detection amplifier, an integrator, a simulation excitation source generator, and a frequency stability tester. , a strategy controller and a frequency multiplier; the frequency division module, a detection amplifier, and an integrator are connected in series in sequence; the integrator is connected to the central controller; the central controller is connected to the frequency multiplier, the simulation respectively The excitation source generator, the strategy controller and the frequency stability tester are connected; the strategy controller is connected with the detection amplifier, and is connected in series with the time constant generator and the detection amplifier successively; the time constant generator is connected with the detection amplifier The integrator is connected; the frequency multiplier is respectively connected with the frequency division module and the simulation excitation source generator; the simulation excitation source generator is connected with the frequency stability tester.

Preferably, the frequency division module receives the original frequency F ₀ of the high stability reference source; the received original frequency F ₀ of the high stability reference source is subjected to frequency division processing by the frequency division module to obtain the frequency division of the high stability reference source Frequency F _REF .

Preferably, the time constant generator module is composed of resistance and capacitance multi-stage series-parallel circuits.

Preferably, when the magnification factor A of the integrator is infinite, the transfer function of the integrator is 1/ST _i ; wherein, S is the complex Fourier frequency S=jω=j2πf, A and T _i are the integrator magnification and time constant.

Preferably, the open-loop gain of the simulation system is:

Among them, G ₀ =K _DET K _OSC M;

S is the complex Fourier frequency S=jω=j2πf;

T _i is the time constant;

_Th is the RC time constant of the equivalent RC filter;

M is the multiplication coefficient of the frequency multiplier;

K _DET is the frequency detection slope of the detection amplifier;

K _OSC is the voltage-controlled slope of the simulated excitation generator.

preferred,

Preferably, the initialization simulation excitation generator set by the central controller outputs a 10MHz frequency signal.

Preferably, the initialization simulation excitation generator set by the central controller outputs a 10MHz frequency signal.

Preferably, the initial frequency multiplier output signal frequency set by the central controller is the same as the theoretical value of F _REF , which is 50.1234 MHz.

Preferably, the frequency of the output signal of the simulation excitation generator is linked to the frequency of the output signal of the frequency multiplier.

Description of drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only of the present invention. some examples.

Fig. 1 is a schematic diagram of a time-domain signal optimization simulation system in a preferred embodiment of the present application;

Fig. 2 is a schematic diagram of a specific realization model in Fig. 1 of the present application;

Fig. 3 is the square wave digital signal diagram that fixed frequency and phase relation are arranged for judging signal, synchronous reference signal, keying FM signal;

Fig. 4 is a trend diagram of strategy prediction of the simulation system of the present application.

detailed description

In order to better understand the above-mentioned technical solution, the above-mentioned technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

Figure 1 is a schematic diagram of a time-domain signal optimization simulation system in a preferred embodiment of the present application. Please refer to Figure 1. The application provides a time-domain signal optimization simulation system, and the time-domain signal optimization simulation system includes a central controller, Time constant generator, frequency division module, detection amplifier, integrator, simulation excitation source generator, frequency stability tester, strategy controller and frequency multiplier;

The frequency division module, the detection amplifier, and the integrator are connected in series sequentially; the integrator is connected to the central controller; the central controller is respectively connected to the frequency multiplier, the simulation excitation source generator, the strategy controller and the The frequency stability tester is connected; the strategy controller is connected with the detection amplifier, and is connected in series with the time constant generator and the detection amplifier in sequence; the time constant generator is connected with the integrator; the frequency multiplier The generator is respectively connected with the frequency division module and the simulation excitation source generator; the simulation excitation source generator is connected with the frequency stability tester.

The frequency division module receives the original frequency F ₀ of the high stability reference source; the received original frequency F ₀ of the high stability reference source is processed by the frequency division module to obtain the frequency division frequency F _REF of the high stability reference source .

In Figure 1, F0 is the original frequency of the high-stable reference source, F _REF , and F _OUT are the frequency division frequency of the high-stable reference source and the output frequency of the simulation excitation generator, respectively. ε _REF , ε _DET , ε _INT , ε _OSC , ε _MUL are the errors at the output terminals of the high stability reference source, detection amplifier, integrator, simulation excitation generator and frequency multiplier, respectively. M is the frequency multiplication coefficient, K _DET is the frequency discrimination slope of the detector amplifier, and K _OSC is the voltage control slope of the simulation excitation generator. 1/(1+ST _h ) is the loop transfer function of the equivalent RC filter, where S is the complex Fourier frequency S=jω=j2πf, and Th is the RC time constant. A and Ti are the magnification factor and time constant of the integrator respectively. Here, in order to realize the simulation in Figure 1, we added a time constant generator module, which is composed of resistance and capacitance multi-stage series-parallel circuits to generate different RC time constant, and applied to T _h of the detector amplifier and T _i of the integrator in Fig. 1.

In the integrator in Figure 1, in order to simplify the simulation situation, the magnification factor A of the integrator is set to infinity. When A is very large, the transfer function of the integrator can be approximately recognized as 1/ST _i . definition:

G ₀ =K _DET K _OSC M (1)

Then the open-loop gain of the simulation system in Figure 1 is:

The steady-state output frequency of the simulated excitation source generator can be expressed as:

After the system reaches a steady state in the loop, it usually has G(s)>1, so formula (3) can be written as:

It can be seen from formula (4) that in an ideal state, the steady-state output frequency of the simulation excitation source generator should be equal to the frequency value of the high-stable reference source after frequency division, and there is a multiple relationship:

When the magnification A of the integrator is infinite, the transfer function of the integrator is 1/ST _i ; wherein, S is the complex Fourier frequency S=jω=j2πf, A and T _i are respectively the magnification of the integrator with the time constant.

The open-loop gain of the simulation system is:

Among them, G ₀ =K _DET K _OSC M;

S is the complex Fourier frequency S=jω=j2πf;

T _i is the time constant;

_Th is the RC time constant of the equivalent RC filter;

M is the multiplication coefficient of the frequency multiplier;

K _DET is the frequency detection slope of the detection amplifier;

K _OSC is the voltage-controlled slope of the simulated excitation generator.

The time constant generator module is composed of resistance and capacitance multi-stage series-parallel circuits.

The initialization simulation excitation generator set by the central controller outputs a 10MHz frequency signal.

The initialization simulation excitation generator set by the central controller outputs a 10MHz frequency signal.

The initial frequency multiplier output signal frequency set by the central controller is the same as the theoretical value of F _REF , which is 50.1234MHz. The output signal frequency of the simulation excitation generator is linked with the output signal frequency of the frequency multiplier.

The steady-state output frequency of the simulated excitation source generator theoretically expressed in formula (5) should have a multiple relationship with the high-stable reference source frequency value, and the above-mentioned relationship is a dynamic balance.

Formula (5) and the setting of the above X parameters are theoretical, because in the actual PLL phase-locked loop formed in Figure 1, due to the frequency difference of the high-stable reference source itself and the errors of each part of the PLL loop, There is always a certain deviation between the output frequency of Figure 1 and its nominal value. This deviation may be caused by the deviation and aging of the simulated excitation generator end, the zero point drift of the integrator, and the phase change of the frequency multiplier. The long-term drift of all ε items may cause the aging phenomenon of the output frequency and become additional noise.

In order to reduce the error of the above-mentioned electronic circuit part, the open-loop gain G(s) should be increased as much as possible. For the convenience of simulation, we uniformly set the errors of ε _REF , ε _DET , ε _INT , ε _OSC , and ε _MUL in Figure 1 as fixed values in the patent. In order to improve the performance of the simulation system in Figure 1, theoretically speaking, the open-loop gain G(s) should be increased as much as possible, so that the molecule G ₀ =K _DET K _OSC M in the formula (2) should be increased, but in fact G0 should be There are limits. It is generally believed that the damping coefficient of the system should not be less than 0.5, then

So for convenience, we set G0=1 and make Th=Ti at the same time. The way to do it is:

(1), K _DET , K _OSC , M of the detection amplifier, the simulation excitation generator, and the frequency multiplier are respectively set by the central controller in Fig. 1, so that G ₀ =K _DET K _OSC M equals 1;

(2) The time constants Th=Ti corresponding to the detection amplifier and the integrator are respectively set by the central controller in FIG. 1 .

After the above settings, the open-loop gain of the simulation system in Figure 1 expressed by formula (2) is:

Reducing the time constant Th, according to formula (7) does increase the open-loop gain of the simulation system, which is beneficial to the system performance, which also increases the loop filter bandwidth fh at the same time. Figure 1. The high-stable reference source is equivalent to a frequency discriminator. When its long-term drift can be ignored, we assume that its power-law spectral noise formula is:

S _y (f) _REF ＝h ₀ +h _-1 f ^-1 (8)

Under theoretical conditions, the loop in Figure 1 works in a linear state. If it can be considered that the simulated excitation generator is completely irrelevant to the power spectral density of the high-stable reference source (Sy(f)OSC and Sy(f)REF), then the system output in Figure 1 The power spectral density can be expressed as:

According to the definition, we have ST _h = jf/f _h , therefore, substituting (8) into (9) we can see When the average period of the simulation is very short, (f/f _h )＞＞1, there is

When the average period of the simulation is extremely long (f/f _h )<<1, there is

Obviously, the whole loop is a high-pass filter for the simulation excitation generator; it is a low-pass filter for the high-stable reference source; its filtering characteristics are determined by the high-end cut-off frequency f _h of the loop filter. The extreme case of formula (10) is S _y (f) ₀ =S _y (f) _OSC , and the extreme case of formula (11) is S _y (f) ₀ =S _y (f) _REF . It can be seen that if fh is too large, the short-term stability of the output signal of the simulation system in Figure 1 will deteriorate; if fh is too small, the long-term stability of the output signal of the simulation system in Figure 1 will deteriorate. After the system in Figure 1 is closed-loop, we cannot know the loop bandwidth of the system, that is, the high-end cutoff frequency fh. We use the Q value to characterize the stable signal of the output signal of the simulation system in Figure 1, and pass the frequency stability test in Figure 1 The simulation test results that characterize the Q value of the system can be obtained by measuring with an instrument, so as to indirectly reflect the selection of the loop bandwidth, that is, the value of the high-end cut-off frequency fh.

About Multiple Relationship Strategies

According to the system in Figure 1, the preset frequency bands of our simulation system model are as follows. For the circuit diagram of the specific implementation model, please refer to Figure 2:

(1) In order to realize the simulation response in the high-frequency band, we choose a high-stable reference source with a high frequency, and the signal frequency obtained after the frequency division processing in Figure 1 is 50.****MHz. Wherein the **** of the decimal place (reserved to four digits) is random, for the convenience of explanation, the F _REF in Figure 1 is 50.1234MHz;

(2) The initialization simulation excitation generator set by the central controller outputs a 10MHz frequency signal;

(3) The initial frequency multiplier output signal frequency set by the central controller is the same as the F _REF theoretical value, that is, also 50.1234MHz;

(4) The output signal frequency of the simulation excitation generator and the output signal frequency of the frequency multiplier are linked.

Wherein, in Fig. 2, the processor is located in the central controller module in Fig. 1, and the XTAL end of the processor is connected to the frequency signal of the same clock source as the RefClk end of DDS1 and DDS2 in Fig. 2 to ensure time synchronization.

Based on the external clock input terminal (XTAL) as the clock reference during operation, the processor generates three square wave signals with adjustable phase relationship, one of which is sent to the FSK key frequency modulation input port of DDS1 to realize frequency modulation. 1. One channel of synchronous reference signal is used for synchronous phase detection, and one channel of judgment signal is used for lock detection of the phase locked loop in FIG. 1 .

Based on the external clock reference input terminal (RefClk) of DDS1 as the reference clock during operation, through the serial timing communication between the processor and DDS1, DDS1 controls the high and low of the FM square wave signal according to the square wave key sent by the processor at the FSK end. The level state selects the multiplier modulation value preset frequency input by the processor in the internal frequency control register (F1, F0) as the output, thereby generating a modulated frequency signal 50.1234MHz±△f output. The preset frequency difference △f is determined by the values in the two frequency control registers F1 and F0. Specifically, considering that the radio frequency signal is 50.1234MHz (the 4th digit after the decimal point is precise), we take △f=100Hz.

Similar to the above-mentioned principle of the processor controlling DDS1 to generate frequency multiplication modulation signals, the processor transmits the same frequency division value to DDS2 through the serial communication sequence to generate a 50.1234MHz frequency signal output without modulation. The 50.1234MHz frequency signal obtained by DDS2 is sent to the external clock reference input terminal (RefClk) of DDS3, which is used as the reference clock when DDS3 works. According to the serial timing communication, the processor transmits the corresponding initialization output frequency (10MHz) value to DDS3, so as to obtain the frequency signal output of the simulation excitation source generator.

Since the external reference time base of DDS3 adopts the frequency multiplication signal generated by DDS2, in this scheme, when the central controller in the closed loop in Figure 1 obtains the corresponding phase detection signal information, it will modify the corresponding DDS2 multiplier The frequency of the frequency modulation signal will also cause the frequency of the DDS3 output signal to change, which replaces the traditional method of changing the output frequency value of the local oscillator through the D/A voltage-controlled crystal oscillator, and then changing the system output frequency. It is worth noting that the direct digital synthesis method is adopted for the output frequency signal, which makes it act as a synthesizer with high stability in a certain application range. Users can easily modify the frequency value of the DDS3 output signal through the user input port in Figure 2 according to the requirements in practical applications.

About time constant setting strategy

It can be known from the foregoing scheme that we set G ₀ =K _DET K _OSC M equal to 1, and make Th=Ti at the same time. According to the multiple relationship strategy above, we make the signal frequency output by the simulation excitation source generator 10MHz, and the frequency after frequency division of the high stability reference source is 50.1234MHz. According to the formula (5) M=5 can be obtained. It can be seen from the above multiple relationship strategy that we did not use the traditional method of changing the system output frequency value through the D/A voltage-controlled crystal oscillator in the design of the simulation system in Figure 1, so the K _OSC simulation excitation generator in Figure 1 The slope of voltage control is unknown, we can only obtain the conclusion of K _DET *K _OSC =1/5 through G ₀ =K _DET K _OSC M equals to 1 and M=5. In the specific implementation process, according to Figure 1, we can only set the K _DET value of the detection amplifier through the central controller. Since the time constant in the simulation system is only determined by Th, according to Figure 1, we realize the setting of the detection time constant Th and integration time constant Ti of the detection amplifier and integrator through the control of the central controller to the time constant generator, and make _Th = T _i .

About the Q value strategy of the simulation system

In Fig. 2, the processor produces three-way square wave signals: synchronous reference signal, keyed FM signal, and judgment signal, so that the frequency of the synchronous reference signal is equal to the frequency of the keyed FM signal, and there is a certain phase delay difference; The frequency of the judgment signal is N times the frequency of the synchronization reference signal or the frequency of the keying FM signal, and there is a certain phase delay difference. Specifically, we take the frequency of the synchronous reference signal to be equal to the frequency of the keyed FM signal to be 79 Hz, and the phase difference between the two is 100 degrees; at the same time, we take the N value of the frequency of the judgment signal to be 4 times, and the phase difference with the synchronous reference signal is 40 degrees.

The specific judgment basis is shown in Figure 3; in Figure 3, the judgment signal, the synchronous reference signal, and the keyed FM signal are square wave digital signals with a fixed frequency and phase relationship; the enable signal is either 1 or 0, so It can be regarded as a square wave digital signal without a fixed frequency; the phase detection signal is generated by the integrator in Figure 1, which is a changing DC signal, so it can be regarded as an analog signal without a fixed frequency.

According to the principle of Figure 3 combined with Figure 1, we set a certain rising edge of the judgment signal as the trigger judgment start, complete 10 judgments before the arrival of the next rising edge, and then trigger the next group of 10 times when the next rising edge arrives. second judgment. Since we know the frequency of the judgment signal in Figure 3 in advance, that is, we know the time T between two adjacent rising edges, a group of 10 time intervals for judgment can be evenly distributed.

In Fig. 1, the central controller judges the phase detection signal delivered by the integrator according to the above-mentioned trigger judgment conditions, and when the magnitude of the analog DC signal is in the non-enabled strip area shown in Fig. 3, the central controller outputs the The enabling signal in Figure 3 is 0, and the frequency stability measuring instrument in Figure 1 does not work; when the magnitude of its analog DC signal is outside the non-enabled band area shown in Figure 3, the central controller outputs the enabling signal in Figure 3 The energy signal is 1, and the frequency stability measuring instrument in Figure 1 starts to work; the simulation Q value is actually the simulation test result value output by the frequency stability measuring instrument in Figure 1 when it is working, and it reflects the performance of the output signal of the simulation system in Figure 1.

During the entire simulation process, the central controller initializes all the desired setting values at the beginning, and these parameters will not change any more. During dynamic simulation, only the detector amplifier parameter K _DET value and the detector amplifier time constant Th value must be controlled by the central controller. The controller module is dynamically set, and the criterion for judging whether these two parameters are reasonable is the simulation Q value. We take a range of 1-10 for the K _DET value, and we also take a range of 1-10 for Th. At the beginning of the simulation of the system in Figure 1, in addition to setting the initial setting values of each channel, we will simulate once in the full range of K _DET value and Th value to obtain the corresponding Q value. The Q value is between L and H, defined as L =1 to H=10 (the larger the Q value, the better), we define the Q value data in this period of simulation as "modeling area", as shown in Figure 4, the modeling diagram in Figure 4, the central controller is set K _DET value and Th value, and record the Q value and the phase detection signal value J in Figure 1 and Figure 3 synchronously, and make the change direction of the K _DET value and Th value opposite. After the modeling is completed, start the simulation at a certain point S. When the Q value reaches point P, that is, when the simulated Q value is H1 (H1=0.8H), the following strategies are triggered:

At this time, the central processing unit sets the K _DET value and the Th value in the same direction, and the next time the K _DET value (denoted as K2) is increased compared with the current K _DET value (denoted as K1) (that is, K2>K1) ; The next time the Th value is set (recorded as T2), it will be increased compared with the current Th value (represented as T1) (ie T2>T1); record the Q value and phase identification signal value J at the same time. Until according to the "strategy prediction line" shown in Figure 4, when the Q value reaches H, the central processing unit judges the critical value of the phase detection signal value J at this moment in Figure 4 and the value of all previous phase detection signals plus the cumulative value J1 relationship (the J1 value here is the sum of all the phase detection signal values obtained by the central processing unit of each simulation from the S point to the moment before the critical value point in Figure 4), when J>2*J1, we think that this The simulation result is valid, and the central processing unit calls out the K _DET value and Th value set at point P in Figure 4 as the optimal value.

Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention without limitation. Although the present invention has been described in detail with reference to examples, those of ordinary skill in the art should understand that the technical solutions of the present invention can be carried out Modifications or equivalent replacements without departing from the spirit and scope of the technical solution of the present invention shall be covered by the claims of the present invention.

Claims (10)

1. a time domain signal optimization simulation system, it is characterized in that, described time domain signal optimization simulation system comprises central controller, time constant generator, frequency division module, detection amplifier, integrator, simulation excitation source generator, frequency Stability tester, strategy controller and frequency multiplier; The frequency division module, the detection amplifier, and the integrator are sequentially connected in series; the integrator is connected to the central controller; The central controller is respectively connected with the frequency multiplier, the simulation excitation source generator, the strategy controller and the frequency stability tester; The strategy controller is connected to the detection amplifier, and is connected in series with the time constant generator and the detection amplifier in sequence; the time constant generator is connected to the integrator; The frequency multiplier is respectively connected with the frequency division module and the simulation excitation source generator; the simulation excitation source generator is connected with the frequency stability tester. 2. The time-domain signal optimization simulation system as claimed in claim 1, wherein the frequency division module receives the original frequency F of the high stability reference source _; the original frequency F of the high stability reference source _received After frequency division processing by the frequency division module, a high stability reference source frequency division frequency F _REF is obtained. 3. The time-domain signal optimization simulation system according to claim 2, wherein the time constant generator module is composed of resistance and capacitance multi-stage series-parallel circuits. 4. time-domain signal optimization simulation system as claimed in claim 2, is characterized in that, when the amplification factor A of described integrator is infinite, the transfer function of described integrator is 1/ST _i ; Wherein, S is Complex Fourier frequency S = jω = j2πf, A and T _i are the magnification and time constant of the integrator respectively. 5. time-domain signal optimization simulation system as claimed in claim 4, is characterized in that, simulation system open-loop gain is: $\mathrm{<span\; class="notranslate">\; G</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; G</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}}{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; ST</span>}}_{\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; ST</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}<span\; class="notranslate">\; ;</span>$ Among them, G ₀ =K _DET K _OSC M; S is the complex Fourier frequency S=jω=j2πf; T _i is the time constant; _Th is the RC time constant of the equivalent RC filter; M is the multiplication coefficient of the frequency multiplier; K _DET is the frequency detection slope of the detection amplifier; K _OSC is the voltage-controlled slope of the simulated excitation generator. 6. the time-domain signal optimization simulation system as claimed in claim 5, is characterized in that, 7. The time-domain signal optimization simulation system according to claim 5, wherein the initialization simulation excitation generator provided by the central controller outputs a 10MHz frequency signal. 8. The time-domain signal optimization simulation system according to claim 5, wherein the initialization simulation excitation generator set by the central controller outputs a 10MHz frequency signal. 9. The time-domain signal optimization simulation system according to claim 5, wherein the output signal frequency of the initialization frequency multiplier set by the central controller is the same as the theoretical value of F _REF , which is 50.1234MHz. 10 . The time-domain signal optimization simulation system according to claim 5 , wherein the frequency of the output signal of the simulation excitation generator is linked to the frequency of the output signal of the frequency multiplier. 11 .