CN105429641B

CN105429641B - A kind of error lock prevention high performance wideband Microwave Frequency Synthesizer

Info

Publication number: CN105429641B
Application number: CN201510943260.7A
Authority: CN
Inventors: 杜勇
Original assignee: Guizhou Aerospace Institute of Measuring and Testing Technology
Current assignee: Guizhou Aerospace Institute of Measuring and Testing Technology
Priority date: 2015-12-16
Filing date: 2015-12-16
Publication date: 2018-09-07
Anticipated expiration: 2035-12-16
Also published as: CN105429641A

Abstract

The invention discloses a kind of error lock prevention wide-band microwave frequency synthesizers, including sequentially connected constant-temperature crystal oscillator, power splitter, simulate frequency multiplier circuit, DDS, phase discriminator and width VCO, power splitter is also consecutively connected to comb spectrum generator and broadband double balanced mixer, broadband VCO is sequentially connected directional coupler two, microwave amplifier two, broadband double balanced mixer and low-pass filter, low-pass filter is connected to phase discriminator and forms closed loop, phase discriminator is connected to loop filter two, loop filter two is connected to the branch two of single-pole double-throw switch (SPDT), FPGA is connect with DDS and single-pole double-throw switch (SPDT) respectively, the circuit constitutes frequency synthesizer circuit, phaselocked loop Lock protection circuit is connected on combiner circuit.The present invention using DDS as broadband phase-looked loop reference signal and comb spectrum generator as offset source by the way of, realize low complexity in circuits, broadband, high frequency resolution, low phase noise, low spurious inhibit frequency synthesizer.

Description

A kind of error lock prevention high performance wideband Microwave Frequency Synthesizer

Technical field

The invention belongs to frequency synthesizers, and in particular to a kind of error lock prevention wide-band microwave frequency synthesizer.

Background technology

It realizes high performance wide-band microwave frequency synthesizer, need to integrate and be realized using multi-frequency synthesis mode.With Past wide-band microwave frequency synthesizer is always in output bandwidth, frequency resolution, spurious reduction, phase noise, circuit complexity journey It is accepted or rejected between the key indexes such as degree, it is difficult to take into account all indexs comprehensively.In addition, broadband high resolution frequency combiner circuit one As be required for phaselocked loop Lock protection circuit.Traditional phaselocked loop Lock protection circuit is the method using preset voltage, realization side Formula is the voltage-frequency characteristic according to VCO, exports corresponding preset voltage to the voltage-controlled end of VCO using digital analog converter, incites somebody to action VCO is drawn to needing near locking frequency, achievees the purpose that prevent phaselocked loop mistake from locking.This Lock protection circuit is lacked there are below It falls into：Firstly, since the voltage-controlled sensitivity of broadband VCO is very high, generally 500MHz/V or so, VCO output frequencies are to tuning electricity Press very sensitive, and there are individual differences with the voltage-frequency characteristic between model VCO, using this open loop of preset voltage Mode draws VCO frequency, and precision is not high, and consistency is poor, even can not achieve the purpose of error lock prevention sometimes；Secondly, it realizes pre- The analog-digital converter for setting voltage output is digital device, when being worked due to digital device, is easy higher to electromagnetic environment requirements Phase-locked loop circuit interferes, and influences the purity of frequency spectrum of output signal.

Invention content

The technical problem to be solved by the present invention is to：There is provided a kind of error lock prevention wide-band microwave frequency synthesizer, stability and can Good by property, Electro Magnetic Compatibility is more preferable, of the existing technology to solve the problems, such as.

The technical solution that the present invention takes is：A kind of error lock prevention wide-band microwave frequency synthesizer, including sequentially connected perseverance Warm crystal oscillator, power splitter, simulation frequency multiplier circuit, DDS, phase discriminator and broadband VCO, power splitter branch two are also consecutively connected to comb spectrum Generator and broadband double balanced mixer, broadband VCO output ends are sequentially connected directional coupler two, microwave amplifier two and broadband Double balanced mixer, double balanced mixer medium frequency output end are connected to low-pass filter, and first low pass filter output is connected to mirror Phase device RF signal input end, phase detector error voltage output end are connected to the input terminal of loop filter two, loop filter Two are connected to the branch two of single-pole double-throw switch (SPDT), and FPGA control signal wires are connect with DDS control terminals, the output of FPGA control circuit It is signally attached to the control terminal of single-pole double-throw switch (SPDT), which constitutes a part for frequency synthesizer circuit, and frequency is closed At being connected with phaselocked loop Lock protection circuit on circuit.

Preferably, above-mentioned phaselocked loop Lock protection circuit include sequentially connected clock shake, fractional frequency division phase discriminator, loop filtering Device one, the branch one of single-pole double-throw switch (SPDT), broadband VCO, directional coupler one and microwave amplifier one, one backspace of microwave amplifier It is connected to fractional frequency division phase discriminator and forms closed loop, the control terminal of fractional frequency division phase discriminator is connected to FPGA control circuit output signal Fractional-N PLL circuit, is realized the Novel error-proofing lock circuit of closed loop error lock prevention by end, the novel phaselocked loop error lock prevention electricity It route in its closed loop characteristic, will not be influenced by same model broadband VCO voltage-frequency characteristic individual differences, it can be achieved that frequency is led Draw precision height, it is small to output signal spectrum impurities affect to wait excellent properties.

Beneficial effects of the present invention：Compared with prior art, the present invention use DDS as broadband phase-looked loop reference signal with And mode of the comb spectrum generator as offset source, the high frequency resolution characteristic of DDS, the low phase of comb spectrum generator are made an uproar The narrow-band filtering characteristic of sound characteristics and phase-locked loop circuit is combined, and realizes low complexity in circuits, broadband, high-frequency point The frequency synthesizer that resolution, low phase noise, low spurious inhibit, in addition, using this new paragon of Lock protection circuit of closed loop, solution It has determined the problems such as existing open loop Lock protection circuit Electro Magnetic Compatibility is poor, and frequency pulling precision is not high.

Description of the drawings

Fig. 1 is the circuit theory connection block diagram of the present invention.

Specific implementation mode

Below in conjunction with the accompanying drawings and invention is described further in specific embodiment.

Embodiment 1：As shown in Figure 1, a kind of error lock prevention wide-band microwave frequency synthesizer, including constant-temperature crystal oscillator 18, constant temperature are brilliant 18 output end 31 of shaking is connected to the combining end of power splitter 17, and the output branch 1 of power splitter 17 is connected to directly simulation frequency multiplication The input terminal of circuit 15, the output end for directly simulating frequency multiplier circuit 15 are connected to the reference input of DDS 14, and DDS's 14 is defeated Go out to be signally attached to the reference signal input terminal of phase discriminator 12, the output branch 2 35 of power splitter 17 is connected to comb spectrum generator 16 input terminal, the output end of comb spectrum generator 16 are connected to the rf inputs of broadband double balanced mixer 10, broadband VCO 5 oriented couplers 28 and the amplified local oscillator input for being signally attached to broadband double balanced mixer 10 of microwave amplifier 29 End, the medium frequency output end of broadband double balanced mixer 10 are connected to the input terminal of low-pass filter 11, low-pass filter 11 it is defeated Outlet is connected to the RF signal input end of phase discriminator 12, and the error voltage output end of phase discriminator 12 is connected to loop filter two Input terminal, the output end of loop filter 2 13 is connected to the branch two of single-pole double-throw switch (SPDT) 4, the control of FPGA control circuit 19 Signal wire processed is connect with the control terminal of DDS 14, is constituted high performance wideband microwave synthesizer circuit, is connected on frequency synthesizer circuit It is connected to phaselocked loop Lock protection circuit, the output signal of FPGA control circuit 19 is connected to the control terminal of single-pole double-throw switch (SPDT).

Embodiment 2：Phaselocked loop Lock protection circuit includes that clock shakes 1 in embodiment 1, and shake 1 output end of clock is connected to decimal point The reference edge of frequency phase discriminator 2, the output signal of broadband VCO 5 after directional coupler 1 and microwave amplifier 1 by being connected to The charge pump output of the RF signal input end of fractional frequency division phase discriminator 2, fractional frequency division phase discriminator 2 passes through loop filter 1 It is connected to the branch one of single-pole double-throw switch (SPDT) 4 afterwards, single-pole double-throw switch (SPDT) main road is connected to the voltage tuning end of broadband VCO 5, The output signal of FPGA control circuit 19 is connected to the control terminal of fractional frequency division phase discriminator.

Frequency synthesizer controls principle：According to the frequency point of required output, can be reflected for fractional frequency division by FPGA control circuit Phase device is arranged the output frequency of corresponding frequency dividing ratio and corresponding DDS, when beginning, is opened single-pole double throw by FPGA control circuit It closes and connects branch one so that broadband VCO is locked on N times of Zhong Zhen（N can be that decimal is alternatively integer）, according to FPGA's Setting, broadband VCO output frequencies and anticipated output frequency are very close at this time, when FPGA detects that fractional frequency division phase discriminator locks After indication signal, by switch connection branch two, at this point, by comb spectrum generator as offset source phaselocked loop by quick lock in Required frequency point realizes the function of error lock prevention.Reference signal using DDS as broadband phase-looked loop circuit, due to the high frequency of DDS Rate resolution character can make the broadband signal of output have very high frequency resolution, remaining frequency in addition to broadband phase-looked loop is closed It is all made of direct analog frequency synthesis mode at circuit, the advantage of direct analog frequency synthesis mode is the phase of output signal Noise is very low, in this way, output broadband signal can be made to obtain excellent phase noise performance, frequency multiplication numbers of the DDS in phaselocked loop It is 1, is acted on using the narrow-band filtering of cycle of phase-locked loop filter, can get excellent spurious reduction index, comb spectrum is occurred The frequency synthesis mode of phase demodulation, may be implemented broad band performance after device is mixed as offset source with broadband VCO output signals.

The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain Within protection scope of the present invention, therefore, protection scope of the present invention should be based on the protection scope of the described claims lid.

Claims

1. a kind of error lock prevention wide-band microwave frequency synthesizer, it is characterised in that：Including sequentially connected constant-temperature crystal oscillator, power splitter, Frequency multiplier circuit, DDS, phase discriminator and broadband VCO are simulated, power splitter branch two is also consecutively connected to comb spectrum generator and broadband is double Balanced mixer, broadband VCO output ends are sequentially connected directional coupler two, microwave amplifier two and broadband double balanced mixer, Double balanced mixer medium frequency output end is connected to low-pass filter, and it is defeated that first low pass filter output is connected to phase discriminator radiofrequency signal Enter end, phase detector error voltage output end is connected to the input terminal of loop filter two, and it is double that loop filter two is connected to hilted broadsword The branch two of throw switch, FPGA control signal wires are connect with DDS control terminals, and the output signal of FPGA control circuit is connected to hilted broadsword The control terminal of commutator, the FPGA control circuit constitute a part for frequency synthesizer circuit, locking phase are connected on combiner circuit Ring Lock protection circuit；Phaselocked loop Lock protection circuit include sequentially connected clock shake, fractional frequency division phase discriminator, loop filter one, Branch one, broadband VCO, directional coupler one and the microwave amplifier one of single-pole double-throw switch (SPDT), one backspace of microwave amplifier connection Closed loop is formed to fractional frequency division phase discriminator, the control terminal of fractional frequency division phase discriminator is connected to FPGA control circuit output signal end.