CN105141310B - Polycyclic broadband low phase noise frequency synthesizer - Google Patents

Polycyclic broadband low phase noise frequency synthesizer Download PDF

Info

Publication number
CN105141310B
CN105141310B CN201510563879.5A CN201510563879A CN105141310B CN 105141310 B CN105141310 B CN 105141310B CN 201510563879 A CN201510563879 A CN 201510563879A CN 105141310 B CN105141310 B CN 105141310B
Authority
CN
China
Prior art keywords
frequency
loop
output
phase
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201510563879.5A
Other languages
Chinese (zh)
Other versions
CN105141310A (en
Inventor
田玲
刘泊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Southeast University
Original Assignee
Southeast University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Southeast University filed Critical Southeast University
Priority to CN201510563879.5A priority Critical patent/CN105141310B/en
Publication of CN105141310A publication Critical patent/CN105141310A/en
Application granted granted Critical
Publication of CN105141310B publication Critical patent/CN105141310B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

本发明公开了一种多环宽带低相噪频率合成器,属于微波/毫米波领域,可以应用于宽频带的测试仪表。多环宽带低相噪频率合成器的实现方法,是在传统多环锁相频率合成结构的基础上,将粗调环由传统的整数分频锁相环换成同加法环一样的混频结构锁相环,并增加了梳状谱发生器模块为其提供低相噪的输入混频信号,以实现更加优良的相位噪声性能,同时使用倍频器、分频器和DDS来扩展输出频率范围。该方法可以替代宽带仪表中YIG振荡器的性能,具有低相噪、低杂散、低功耗、低成本和宽频带的特点。

The invention discloses a multi-ring broadband low-phase noise frequency synthesizer, which belongs to the microwave/millimeter wave field and can be applied to wide-band test instruments. The realization method of the multi-loop broadband low-phase noise frequency synthesizer is based on the traditional multi-loop phase-locked frequency synthesis structure, and the coarse tuning loop is replaced by the same frequency mixing structure as the addition loop from the traditional integer frequency division phase-locked loop Phase-locked loop, and added comb spectrum generator module to provide low phase noise input mixing signal to achieve better phase noise performance, while using frequency multiplier, frequency divider and DDS to expand the output frequency range . The method can replace the performance of the YIG oscillator in the broadband instrument, and has the characteristics of low phase noise, low spur, low power consumption, low cost and wide frequency band.

Description

多环宽带低相噪频率合成器Multi-loop Broadband Low Phase Noise Frequency Synthesizer

技术领域technical field

本发明属于微波/毫米波器件技术领域,涉及宽频带的测试仪表,尤其涉及一种多环宽带低相噪频率合成器。The invention belongs to the technical field of microwave/millimeter wave devices, relates to a wide-band test instrument, in particular to a multi-ring wide-band low-phase noise frequency synthesizer.

背景技术Background technique

无线通信测试仪器主要包括矢量信号源、频谱仪、矢量网络分析仪、信道模拟器等,这些测试仪器一直以来均被欧美等发达国家垄断。频率合成技术是这些通信仪表的重要部件,其输出频率范围、相位噪声性能直接决定系统的性能指标。故宽频带、低相噪、低成本、低杂散的频率合成器的方法尤为重要。Wireless communication test instruments mainly include vector signal sources, spectrum analyzers, vector network analyzers, channel simulators, etc. These test instruments have been monopolized by developed countries such as Europe and the United States for a long time. Frequency synthesis technology is an important part of these communication instruments, and its output frequency range and phase noise performance directly determine the performance index of the system. Therefore, the method of frequency synthesizer with wide frequency band, low phase noise, low cost and low spur is particularly important.

无线信道模拟器是一种可以在室内模拟无线信道的路径损耗、快衰落、慢衰落、时延扩展、多普勒扩展、噪声、干扰的测试仪表,宽带频率合成器是该测试仪表的核心部件,其性能指标直接影响多天线信道模拟器的性能指标。The wireless channel simulator is a test instrument that can simulate the path loss, fast fading, slow fading, delay spread, Doppler spread, noise and interference of the wireless channel indoors. The broadband frequency synthesizer is the core component of the test instrument , its performance index directly affects the performance index of the multi-antenna channel simulator.

本发明提出了一种多环宽频段低相噪频率合成器的设计方法,该方法可以取代传统仪表中的YIG振荡器,具有低功耗、低成本、低相噪、低杂散、易于集成的优点。The invention proposes a design method of a multi-ring wide-band low-phase noise frequency synthesizer, which can replace the YIG oscillator in the traditional instrument, and has low power consumption, low cost, low phase noise, low spurious, and easy integration The advantages.

发明内容Contents of the invention

发明目的:频率合成器是微波通信仪表中最重要的部件,本发明提出了一种多环宽频带低相噪频率合成器的实现方法,该方法具有低相噪、宽频带、低杂散的特点,可以大大降低仪器的成本和功耗。Purpose of the invention: the frequency synthesizer is the most important component in the microwave communication instrument. The present invention proposes a method for realizing a multi-ring broadband low-phase noise frequency synthesizer. The method has the advantages of low phase noise, broadband, and low spurious Features, can greatly reduce the cost and power consumption of the instrument.

本发明提供了一种多环宽频带低相噪频率合成器。主要技术方案如下:The invention provides a multi-ring broadband low-phase noise frequency synthesizer. The main technical solutions are as follows:

1)一种应用于多环宽带频率合成器的实现方法,该方法的主体采用混频锁相环的多环频率合成结构,输出频率范围由加法环模块决定,加法环模块的输出频率范围为3~6GHz,然后通过倍频器和分频器将频率范围扩展至0.375~18GHz,而低频部分0.001~0.375GHz频段由参考时钟为1GHz的DDS来输出,最终,实现指标要求的0.001~18GHz的输出频率范围。1) An implementation method applied to a multi-loop broadband frequency synthesizer, the main body of the method adopts a multi-loop frequency synthesis structure of a frequency mixing phase-locked loop, and the output frequency range is determined by the addition loop module, and the output frequency range of the addition loop module is 3~6GHz, and then expand the frequency range to 0.375~18GHz through the frequency multiplier and frequency divider, and the low frequency part of the 0.001~0.375GHz frequency band is output by the DDS with a reference clock of 1GHz. Finally, the 0.001~18GHz required by the index is realized. output frequency range.

2)一种应用于多环宽带频率合成器的实现方法,多环结构的输出频率分辨率等于细调环模块的输出频率分辨率,细调环模块采用小数分频锁相环,鉴相频率为50MHz,采用48位小数分频器,则小数分频锁相环输出频率分辨率1.78×10-7Hz,经过分频比为12的分频器后,分辨率达到1.48×10-8Hz,经过频率扩展模块倍频分频后,在输出频率范围内,其频率分辨率仍能达到0.0001Hz。2) An implementation method applied to a multi-loop broadband frequency synthesizer. The output frequency resolution of the multi-loop structure is equal to the output frequency resolution of the fine-tuning loop module. The fine-tuning loop module uses a fractional frequency division phase-locked loop, and the phase detection frequency 50MHz, using a 48-bit fractional frequency divider, the fractional frequency division PLL output frequency resolution is 1.78×10 -7 Hz, and after passing through a frequency divider with a frequency division ratio of 12, the resolution reaches 1.48×10 -8 Hz , after frequency multiplication and frequency division by the frequency expansion module, within the output frequency range, its frequency resolution can still reach 0.0001Hz.

3)一种应用于多环宽带频率合成器的实现方法,其特征在于该方法包含了参考环路、细调环路、粗调环路、加法环路、梳状谱发生器模块和频率扩展模块。3) an implementation method applied to a multi-ring broadband frequency synthesizer, characterized in that the method includes a reference loop, a fine tuning loop, a rough tuning loop, an addition loop, a comb spectrum generator module and a frequency extension module.

4)粗调环路与传统多环方案的差异在于增加了一个混频电路和DAC的控制电路。粗调环路采用混频锁相环结构,其输入参考频率是由参考环路生成的125MHz、250MHz、375MHz和500MHz这四个频点,混频输入频率是由梳状谱发生器模块生成的3GHz、3.5GHz、4GHz、4.5GHz、5GHz、5.5GHz和6GHz这七个频点,粗调环模块将这两组输入频率相加,得到以125MHz为频率步进的3~6GHz输出频率,并提供给加法环模块作为混频输入频率。在粗调环路中,采用DAC来预调谐VCO的方法来辅助环路锁定,具体实现方法是通过加法器与低通环路滤波器的输出电压相加,作用于VCO的电压调谐端,DAC的输出电压调谐VCO,使其振荡在所需要的输出频率附近,使得锁相环环路能够捕捉并锁定。采用低相位噪声的鉴相器、混频器器件和DAC芯片,进一步相抵系统的相位噪声性能。4) The difference between the coarse tuning loop and the traditional multi-loop solution lies in the addition of a mixing circuit and a DAC control circuit. The coarse tuning loop adopts a frequency mixing phase-locked loop structure, and its input reference frequency is 125MHz, 250MHz, 375MHz and 500MHz generated by the reference loop, and the mixing input frequency is generated by a comb spectrum generator module There are seven frequency points of 3GHz, 3.5GHz, 4GHz, 4.5GHz, 5GHz, 5.5GHz and 6GHz. The coarse tuning loop module adds these two sets of input frequencies to obtain an output frequency of 3-6GHz with a frequency step of 125MHz, and Provided to the adding loop block as the mixing input frequency. In the coarse tuning loop, the DAC is used to pre-tune the VCO to assist the loop locking. The specific implementation method is to add the output voltage of the low-pass loop filter through the adder and act on the voltage tuning terminal of the VCO. The DAC The output voltage of the VCO is tuned to make it oscillate near the required output frequency, so that the phase-locked loop can capture and lock. Phase detectors, mixer devices and DAC chips with low phase noise are used to further offset the phase noise performance of the system.

5)细调环路主要由小数分频锁相环和输出分频器组成。参考环路提供的100MHz信号经参考分频器二分频生成50MHz作为小数分频锁相环的鉴相参考频率使用,小数分频锁相环采用48位小数分频器和1.5~3GHz宽带VCO来实现,可以输出分辨率为1.78×10-7Hz的1.5~3GHz信号,该信号经过输出分频器12分频后,生成分辨率为1.48×10-8Hz的125~250MHz的低杂散输出信号。细调环路的输出信号是用作加法环路的鉴相参考信号,其相位噪声影响加法环模块输出信号的带内相位噪声,故其输出必须是低相噪、低杂散的信号。5) The fine-tuning loop is mainly composed of a fractional frequency division phase-locked loop and an output frequency divider. The 100MHz signal provided by the reference loop is divided by two by the reference frequency divider to generate 50MHz as the phase detection reference frequency of the fractional frequency division phase-locked loop. The fractional frequency division phase-locked loop adopts a 48-bit fractional frequency divider and a 1.5-3GHz wideband VCO To achieve this, it can output a 1.5-3GHz signal with a resolution of 1.78×10 -7 Hz. After the signal is divided by 12 by the output frequency divider, it can generate a low-spurious 125-250MHz signal with a resolution of 1.48×10 -8 Hz. output signal. The output signal of the fine-tuning loop is used as the phase detection reference signal of the adding loop, and its phase noise affects the in-band phase noise of the output signal of the adding loop module, so its output must be a signal with low phase noise and low spurious.

6)加法环路其输入参考频率是由细调环模块输出的高分辨率125~250MHz频率,混频输入频率是由粗调环模块输出的以125MHz为步进的3~6GHz频率,加法模块将这两组输入频率相加,得到高分辨率的3~6GHz输出频率。加法环环路的带内输出相位噪声主要由混频输入信号的输出相位噪声决定,在这主要由粗调环路带内输出相位噪声决定,带外输出相位噪声则主要由VCO决定。6) The input reference frequency of the addition loop is a high-resolution 125-250MHz frequency output by the fine-tuning loop module, and the mixing input frequency is a 3-6GHz frequency output by the coarse-tuning loop module with a step of 125MHz. Add these two groups of input frequencies to get a high-resolution 3-6GHz output frequency. The in-band output phase noise of the adding loop is mainly determined by the output phase noise of the mixing input signal, which is mainly determined by the in-band output phase noise of the coarse tuning loop, and the out-of-band output phase noise is mainly determined by the VCO.

7)参考环路使用高稳定度、低相位噪声的OCXO产生100MHz的参考频率,100MHz信号经过功分器,一路输出给细调环做参考源信号使用,另一路经过一个固定分频比为10的锁相环生成1GHz信号,该锁相环的1GHz VCO4使用的是高性能的VCSO,1GHz信号经过功分器,一路输出给系统中的DDS芯片做时钟信号,另一路经过二分频器生成500MHz信号,500MHz信号经过功分器,一路输出给梳状谱发生器模块使用,另一路经过分频比可变的分频器后,由四通道的开关滤波器组提取出125MHz、250MHz、375MHz和500MHz信号给粗调环做输入参考信号使用。7) The reference loop uses an OCXO with high stability and low phase noise to generate a 100MHz reference frequency. The 100MHz signal passes through a power divider, and one output is used as a reference source signal for the fine-tuning loop, and the other passes through a fixed frequency division ratio of 10. The phase-locked loop of the phase-locked loop generates a 1GHz signal. The 1GHz VCO4 of the phase-locked loop uses a high-performance VCSO. The 1GHz signal passes through a power divider, and one way is output to the DDS chip in the system as a clock signal, and the other way is generated by a two-frequency divider. 500MHz signal, the 500MHz signal passes through the power divider, one output to the comb spectrum generator module, and the other one passes through the frequency divider with variable frequency division ratio, and 125MHz, 250MHz, 375MHz are extracted by the four-channel switching filter bank And the 500MHz signal is used as the input reference signal for the coarse adjustment loop.

8)梳状谱发生器模块的功能是为粗调环模块提供低相位噪声的混频输入信号。梳状谱发生器模块主要由驱动放大器、梳状谱发生器和调谐带通滤波器三部分组成。参考模块提供的500MHz输入信号先经过驱动放大器放大,为梳状谱发生器提供大功率激励信号,梳状谱发生器生成500MHz的大量谐波,然后由调谐带通滤波器提取其中3GHz、3.5GHz、4GHz、5GHz、5.5GHz和6GHz这七个频率信号,并输出给粗调环模块作为混频输入信号使用。其中,调谐带通滤波器也可换做开关滤波器组。8) The function of the comb spectrum generator module is to provide a mixed frequency input signal with low phase noise for the coarse tuning loop module. The comb spectrum generator module is mainly composed of three parts: drive amplifier, comb spectrum generator and tuned bandpass filter. The 500MHz input signal provided by the reference module is first amplified by the drive amplifier to provide a high-power excitation signal for the comb spectrum generator. The comb spectrum generator generates a large number of 500MHz harmonics, and then the 3GHz and 3.5GHz are extracted by the tuned bandpass filter. , 4GHz, 5GHz, 5.5GHz and 6GHz, these seven frequency signals are output to the coarse tuning loop module as mixing input signals. Among them, the tuned bandpass filter can also be replaced by a switch filter bank.

附图说明Description of drawings

图1为多环宽频带低相噪频率合成器的结构图;Fig. 1 is the structural diagram of multi-ring broadband low phase noise frequency synthesizer;

图2为多环宽频带低相噪频率合成器的细化结构图。Figure 2 is a detailed structure diagram of a multi-ring broadband low-phase-noise frequency synthesizer.

具体实施方式Detailed ways

多环宽频带低相噪频率合成器的实现装置,其特征包含了参考环路、细调环路、粗调环路、加法环路、梳状谱发生器模块和频率扩展模块。A realization device of a multi-loop broadband low-phase noise frequency synthesizer is characterized by comprising a reference loop, a fine-tuning loop, a rough-tuning loop, an addition loop, a comb spectrum generator module and a frequency extension module.

参考环路包括鉴相器1、低通环路滤波器3、VCO4、分频器5、可编程分频器6、开关滤波器组7、分频器2和OCXO10。粗调环路包括鉴相器11、低通环路滤波器12、加法器15、DAC16、VCO17、混频器14和低通滤波器13。细调环路包括鉴相器18、低通环路滤波器19、VCO20、小数分频器22和分频器21。加法环路包括鉴相器23、低通环路滤波器25、加法器26、DAC27、VCO28、混频器29和低通滤波器24。梳状谱发生器模块包括梳状谱发生器8和可调带通滤波器9。频率扩展模块包括倍频分频开关滤波器组模块30和DDS31。The reference loop includes phase detector 1, low-pass loop filter 3, VCO4, frequency divider 5, programmable frequency divider 6, switch filter bank 7, frequency divider 2 and OCXO10. The coarse tuning loop includes a phase detector 11 , a low-pass loop filter 12 , an adder 15 , a DAC 16 , a VCO 17 , a mixer 14 and a low-pass filter 13 . The fine tuning loop includes phase detector 18 , low pass loop filter 19 , VCO 20 , fractional frequency divider 22 and frequency divider 21 . The summing loop includes a phase detector 23 , a low-pass loop filter 25 , an adder 26 , a DAC 27 , a VCO 28 , a mixer 29 and a low-pass filter 24 . The comb spectrum generator module includes a comb spectrum generator 8 and an adjustable bandpass filter 9 . The frequency extension module includes frequency multiplication and frequency division switch filter bank module 30 and DDS31.

参考环路合成高稳定度、低相位噪声的参考信号给其他模块做参考信号,其输出的100MHz参考信号提供给细调环模块,1GHz提供给频率扩展模块的DDS,500MHz参考信号提供给梳状谱发生器模块,125MHz、250MHz、375MHz和500MHz参考信号提供给粗调环模块。然后,梳状谱发生器模块生成500MHz参考信号的大量谐波分量,并用调谐带通滤波器提取其中3~6GHz范围内的7个频点(3GHz、3.5GHz、4GHz、4.5GHz、5GHz、5.5GHz、6GHz)作为粗调环模块的混频输入信号,粗调环模块将参考模块提供的参考频率和梳状谱发生器模块的输出频率相加,生成以125MHz为频率步进的3~6GHz输出频率,并作为加法环模块的混频输入信号,细调环模块输出高频率分辨率的125~250MHz信号作为加法环模块的参考信号,加法环模块将粗调环模块输出频率和细调环模块输出频率相加,生成高分辨率的3~6GHz信号,最后,通过频率扩展模块生成0.001~18GHz的信号。The reference loop synthesizes a high-stability, low-phase-noise reference signal for other modules as a reference signal. The 100MHz reference signal output by it is provided to the fine-tuning loop module, 1GHz is provided to the DDS of the frequency extension module, and the 500MHz reference signal is provided to the comb The spectrum generator module, 125MHz, 250MHz, 375MHz and 500MHz reference signals are provided to the coarse tuning loop module. Then, the comb spectrum generator module generates a large number of harmonic components of the 500MHz reference signal, and uses a tuned bandpass filter to extract seven frequency points (3GHz, 3.5GHz, 4GHz, 4.5GHz, 5GHz, 5.5 GHz, 6GHz) as the mixing input signal of the coarse tuning loop module, the coarse tuning loop module adds the reference frequency provided by the reference module and the output frequency of the comb spectrum generator module to generate 3-6GHz with a frequency step of 125MHz The output frequency is used as the mixing input signal of the adding loop module, and the fine tuning loop module outputs a high frequency resolution 125-250MHz signal as the reference signal of the adding loop module, and the adding loop module outputs the frequency of the coarse tuning loop module and the fine tuning loop module The output frequencies of the modules are added to generate a high-resolution 3-6GHz signal, and finally, a 0.001-18GHz signal is generated through the frequency expansion module.

Claims (3)

1.一种多环宽带低相噪频率合成器,其特征在于,所述频率合成器包括:参考环路、细调环路、粗调环路、加法环路、梳状谱发生器模块和频率扩展模块;其中,所述梳状谱发生器模块的功能是为粗调环路提供低相位噪声的混频输入信号;梳状谱发生器模块由驱动放大器、梳状谱发生器和调谐带通滤波器三部分组成;参考环路提供的500MHz输入信号先经过驱动放大器放大,为梳状谱发生器提供大功率激励信号,梳状谱发生器生成500MHz的大量谐波,然后由调谐带通滤波器提取其中3GHz、3.5GHz、4GHz、4.5GHz、5GHz、5.5GHz和6GHz这七个频率信号,并输出给粗调环路作为混频输入信号使用;其中:1. a kind of multi-loop broadband low phase noise frequency synthesizer, it is characterized in that, described frequency synthesizer comprises: reference loop, fine tuning loop, coarse tuning loop, addition loop, comb spectrum generator module and Frequency extension module; Wherein, the function of described comb spectrum generator module is to provide the mixed frequency input signal of low phase noise for rough tuning loop; Comb spectrum generator module is made up of driving amplifier, comb spectrum generator and tuning band The pass filter is composed of three parts; the 500MHz input signal provided by the reference loop is first amplified by the drive amplifier to provide a high-power excitation signal for the comb spectrum generator. The comb spectrum generator generates a large number of 500MHz harmonics, and then the tuned bandpass The filter extracts the seven frequency signals of 3GHz, 3.5GHz, 4GHz, 4.5GHz, 5GHz, 5.5GHz and 6GHz, and outputs them to the coarse tuning loop as a mixing input signal; where: 所述粗调环路包括鉴相器(11)、低通环路滤波器(12)、加法器(15)、DAC(16)、VCO(17)、混频器(14)和低通滤波器(13);粗调环路采用混频锁相环结构,其输入参考频率是由参考环路生成的125MHz、250MHz、375MHz和500MHz这四个频点,混频输入频率是由梳状谱发生器模块生成的3GHz、3.5GHz、4GHz、4.5GHz、5GHz、5.5GHz和6GHz这七个频点,粗调环路将这两组输入频率相加,得到以125MHz为频率步进的3~6GHz输出频率,并提供给加法环路作为混频输入频率;在粗调环路中,采用DAC(16)来预调谐VCO(17)的方法来辅助环路锁定,具体实现方法是通过加法器(15)与低通环路滤波器(12)的输出电压相加,作用于VCO(17)的电压调谐端,DAC(16)的输出电压调谐VCO(17),使其振荡在所需要的输出频率附近,使得锁相环环路能够捕捉并锁定;粗调环路噪声性能决定系统输出相位噪声性能,采用低相位噪声的鉴相器和混频器,并用低噪声的稳压芯片来提供电源电压,并采用低噪声的DAC芯片;The coarse tuning loop includes a phase detector (11), a low-pass loop filter (12), an adder (15), a DAC (16), a VCO (17), a mixer (14) and a low-pass filter device (13); the coarse tuning loop adopts a frequency mixing phase-locked loop structure, and its input reference frequency is these four frequency points of 125MHz, 250MHz, 375MHz and 500MHz generated by the reference loop, and the mixing input frequency is determined by the comb spectrum For the seven frequency points of 3GHz, 3.5GHz, 4GHz, 4.5GHz, 5GHz, 5.5GHz and 6GHz generated by the generator module, the coarse tuning loop adds these two sets of input frequencies to obtain 3~ 6GHz output frequency, which is provided to the adding loop as the mixing input frequency; in the rough tuning loop, the DAC (16) is used to pre-tune the VCO (17) to assist loop locking, and the specific implementation method is through the adder (15) is added with the output voltage of low-pass loop filter (12), acts on the voltage tuning terminal of VCO (17), and the output voltage tuning VCO (17) of DAC (16) makes it oscillate in required Near the output frequency, the phase-locked loop can be captured and locked; the noise performance of the coarse adjustment loop determines the phase noise performance of the system output, and a phase detector and mixer with low phase noise are used, and a low-noise voltage regulator chip is used to provide Power supply voltage, and adopts low-noise DAC chip; 所述细调环路包括鉴相器(18)、低通环路滤波器(19)、VCO(20)、小数分频器(22)和分频器(21);细调环路的功能是为加法环路提供高分辨率的鉴相参考频率;参考环路提供的100MHz信号经参考分频器二分频生成50MHz作为小数分频锁相环的鉴相参考频率使用,小数分频锁相环采用48位小数分频器和1.5~3GHz宽带VCO来实现,可以输出分辨率为1.78×10-7Hz的1.5~3GHz信号,该信号经过输出分频器十二分频后,生成分辨率为1.48×10-8Hz的125~250MHz的低杂散输出信号,细调环路的输出信号是用作加法环路的鉴相参考信号,其相位噪声影响加法环路输出信号的带内相位噪声;Described fine-tuning loop comprises phase detector (18), low-pass loop filter (19), VCO (20), fractional frequency divider (22) and frequency divider (21); The function of fine-tuning loop It provides a high-resolution phase detection reference frequency for the addition loop; the 100MHz signal provided by the reference loop is divided by the reference frequency divider to generate 50MHz as the phase detection reference frequency of the fractional frequency phase-locked loop, and the fractional frequency lock The phase loop is implemented by a 48-bit fractional frequency divider and a 1.5-3GHz wideband VCO, which can output a 1.5-3GHz signal with a resolution of 1.78×10 -7 Hz. After the signal is divided by 12 by the output frequency divider, a resolution 1.48×10 -8 Hz low spurious output signal of 125 ~ 250MHz, the output signal of the fine adjustment loop is used as the phase detection reference signal of the addition loop, and its phase noise affects the in-band of the output signal of the addition loop phase noise; 所述加法环路包括鉴相器(23)、低通环路滤波器(25)、加法器(26)、DAC(27)、VCO(28)、混频器(29)和低通滤波器(24);加法环路其输入参考频率是由细调环路输出的高分辨率125~250MHz频率,混频输入频率是由粗调环路输出的以125MHz为步进的3~6GHz频率,加法环路将这两组输入频率相加,得到高分辨率的3~6GHz输出频率;加法环路的带内输出相位噪声主要由混频输入信号的输出相位噪声决定,整个环路带内输出相位噪声由粗调环路决定,带外输出相位噪声则主要由加法环路的VCO决定;The adding loop comprises a phase detector (23), a low-pass loop filter (25), an adder (26), a DAC (27), a VCO (28), a mixer (29) and a low-pass filter (24); Its input reference frequency of the addition loop is the high-resolution 125~250MHz frequency that the fine-tuning loop outputs, and the frequency mixing input frequency is the 3~6GHz frequency that takes 125MHz as the step by the rough-tuning loop output, The addition loop adds these two sets of input frequencies to obtain a high-resolution 3-6GHz output frequency; the in-band output phase noise of the addition loop is mainly determined by the output phase noise of the mixed frequency input signal, and the in-band output of the entire loop The phase noise is determined by the coarse adjustment loop, and the out-of-band output phase noise is mainly determined by the VCO of the addition loop; 所述参考环路包括鉴相器(1)、低通环路滤波器(3)、VCO(4)、分频器(5)、可编程分频器(6)、开关滤波器组(7)、分频器(2)和OCXO(10);该参考环路使用高稳定度、低相位噪声的恒温晶体振荡器OCXO(10)产生100MHz的参考频率,100MHz信号经过功分器,一路输出给细调环路做参考源信号使用,另一路经过一个固定分频比为10的锁相环生成1GHz信号,该锁相环的1GHzVCO(4)使用的是高性能的压控声表面波振荡器VCSO,1GHz信号经过功分器,一路输出给系统中的DDS芯片做时钟信号,另一路经过二分频器生成500MHz信号,500MHz信号经过功分器,一路输出给梳状谱发生器模块使用,另一路经过分频比可变的可编程分频器(6)后,由四通道的开关滤波器组(7)提取出125MHz、The reference loop includes a phase detector (1), a low-pass loop filter (3), a VCO (4), a frequency divider (5), a programmable frequency divider (6), a switch filter bank (7 ), frequency divider (2) and OCXO (10); the reference loop uses a high stability, low phase noise constant temperature crystal oscillator OCXO (10) to generate a 100MHz reference frequency, and the 100MHz signal passes through the power divider and outputs all the way The fine-tuning loop is used as a reference source signal, and the other channel generates a 1GHz signal through a phase-locked loop with a fixed frequency division ratio of 10. The 1GHz VCO (4) of the phase-locked loop uses a high-performance voltage-controlled surface acoustic wave oscillation VCSO, the 1GHz signal passes through the power divider, one way is output to the DDS chip in the system as a clock signal, the other way passes through the two frequency divider to generate a 500MHz signal, the 500MHz signal passes through the power divider, and one way is output to the comb spectrum generator module for use , and the other channel passes through a programmable frequency divider (6) with a variable frequency division ratio, and extracts 125MHz, 250MHz、375MHz和500MHz信号给粗调环路做输入参考信号使用;其中,125MHz是由500MHz四分频得到,250MHz是由500MHz二分频得到,375MHz是由500MHz四分频后,取125MHz的三次谐波得到。The 250MHz, 375MHz and 500MHz signals are used as input reference signals for the coarse tuning loop; among them, 125MHz is obtained by dividing the frequency of 500MHz by four, 250MHz is obtained by dividing the frequency of 500MHz by two, and 375MHz is obtained by dividing the frequency of 500MHz by four and taking three times of 125MHz Harmonics get. 2.根据权利要求1所述的一种多环宽带低相噪频率合成器,其特征在于,主体采用混频锁相环的多环频率合成结构,输出频率范围为0.001~18GHz;多环结构的频率合成器输出范围由加法环路决定,加法环路的输出频率范围为3~6GHz,然后通过倍频器和分频器将频率范围扩展至0.375~18GHz,而低频部分由直接数字频率合成器DDS来实现,输出频率范围为0.001~0.375GHz,最终,实现0.001~18GHz的输出频率范围。2. A kind of multi-loop broadband low-phase noise frequency synthesizer according to claim 1, characterized in that, the main body adopts a multi-loop frequency synthesis structure of frequency mixing phase-locked loop, and the output frequency range is 0.001~18GHz; the multi-loop structure The output range of the frequency synthesizer is determined by the addition loop, the output frequency range of the addition loop is 3-6GHz, and then the frequency range is extended to 0.375-18GHz through the frequency multiplier and frequency divider, and the low frequency part is synthesized by direct digital frequency Realized by DDS, the output frequency range is 0.001-0.375GHz, and finally, the output frequency range is 0.001-18GHz. 3.根据权利要求1所述的一种多环宽带低相噪频率合成器,其特征在于,多环结构的输出频率分辨率等于细调环路的输出频率分辨率,细调环路采用小数分频锁相环,鉴相频率为50MHz,采用48位小数分频器,则小数分频锁相环输出频率分辨率1.78×10-7Hz,经过分频比为12的分频器后,分辨率达到1.48×10-8Hz,经过频率扩展模块倍频分频后,在输出频率范围内,其频率分辨率仍能达到0.0001Hz。3. a kind of multi-loop broadband low-phase noise frequency synthesizer according to claim 1, is characterized in that, the output frequency resolution of multi-loop structure is equal to the output frequency resolution of fine-tuning loop, and fine-tuning loop adopts decimal Frequency-division phase-locked loop, the phase detection frequency is 50MHz, and a 48-bit fractional frequency divider is used, so the output frequency resolution of the fractional frequency-division phase-locked loop is 1.78×10 -7 Hz. After passing through the frequency divider with a frequency division ratio of 12, The resolution reaches 1.48×10 -8 Hz. After frequency multiplication and frequency division by the frequency expansion module, the frequency resolution can still reach 0.0001 Hz within the output frequency range.
CN201510563879.5A 2015-09-07 2015-09-07 Polycyclic broadband low phase noise frequency synthesizer Active CN105141310B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510563879.5A CN105141310B (en) 2015-09-07 2015-09-07 Polycyclic broadband low phase noise frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510563879.5A CN105141310B (en) 2015-09-07 2015-09-07 Polycyclic broadband low phase noise frequency synthesizer

Publications (2)

Publication Number Publication Date
CN105141310A CN105141310A (en) 2015-12-09
CN105141310B true CN105141310B (en) 2018-10-26

Family

ID=54726546

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510563879.5A Active CN105141310B (en) 2015-09-07 2015-09-07 Polycyclic broadband low phase noise frequency synthesizer

Country Status (1)

Country Link
CN (1) CN105141310B (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105553475B (en) * 2015-12-18 2018-11-20 中国电子科技集团公司第四十一研究所 High frequency points frequency source combiner circuit based on digital frequency division and harmonic mixing
CN105610437A (en) * 2015-12-18 2016-05-25 中国电子科技集团公司第四十一研究所 Loop filtering apparatus for fast broadband frequency hopping synthesizer module
CN106656049B (en) * 2016-11-24 2023-04-07 成都西科微波通讯有限公司 High-performance frequency synthesizer
CN106533439B (en) * 2017-01-09 2023-06-06 成都西蒙电子技术有限公司 Low phase noise frequency synthesizer
CN108933597A (en) * 2018-07-31 2018-12-04 四川众为创通科技有限公司 A kind of thin step frequency synthesizer of broadband Low phase noise and frequency combining method
CN109687846B (en) * 2018-12-19 2022-12-23 南京国博电子股份有限公司 Low-phase-noise broadband active monolithic integration broadband comb spectrum generator
CN109995366B (en) * 2019-04-11 2023-03-10 中国电子科技集团公司第二十六研究所 X-waveband signal synthesis method and X-waveband agile frequency synthesizer
CN110289858B (en) * 2019-06-27 2023-02-28 四川众为创通科技有限公司 Broadband fine stepping agile frequency conversion combination system
CN113726363B (en) * 2021-08-05 2023-03-14 中国科学院上海天文台 Antenna absolute link time delay monitoring system
WO2023178552A1 (en) * 2022-03-23 2023-09-28 京东方科技集团股份有限公司 Frequency generator
US12021539B1 (en) * 2022-03-26 2024-06-25 Signal Hound, Llc Phase locked loop frequency synthesizer with translation reference loop
CN114978156B (en) * 2022-06-28 2023-05-05 成都西科微波通讯有限公司 Method for realizing fine stepping frequency

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101820283A (en) * 2010-04-16 2010-09-01 上海复高软件开发有限公司 Frequency synthesis device with digital added analogue framework
CN101944910A (en) * 2009-07-07 2011-01-12 晨星软件研发(深圳)有限公司 Double-phase-locked loop circuit and control method thereof
CN102263554A (en) * 2010-05-26 2011-11-30 中国科学院微电子研究所 PLL Frequency Synthesizer Architecture for Improving In-Band Phase Noise Performance

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8953730B2 (en) * 2012-04-20 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Auto frequency calibration for a phase locked loop and method of use

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101944910A (en) * 2009-07-07 2011-01-12 晨星软件研发(深圳)有限公司 Double-phase-locked loop circuit and control method thereof
CN101820283A (en) * 2010-04-16 2010-09-01 上海复高软件开发有限公司 Frequency synthesis device with digital added analogue framework
CN102263554A (en) * 2010-05-26 2011-11-30 中国科学院微电子研究所 PLL Frequency Synthesizer Architecture for Improving In-Band Phase Noise Performance

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于DDS和PLL相结合的频率合成器设计;邹胜福;《中国优秀硕士学位论文全文数据库》;20101031;第1章第1.3节,第4章,及图1-1、图4-1 *

Also Published As

Publication number Publication date
CN105141310A (en) 2015-12-09

Similar Documents

Publication Publication Date Title
CN105141310B (en) Polycyclic broadband low phase noise frequency synthesizer
CN108736889B (en) Low spurious/low phase noise frequency synthesizer
CN103762978B (en) Broadband low-phase noise frequency synthesizer without frequency divider based on harmonic mixing
CN103490777B (en) low spurious frequency synthesizer
CN104135280B (en) Harmonic generation and mixing frequency source circuit
CN106067815B (en) Frequency synthesizer based on DDS and fractional frequency division phase-locked loop
CN102651649A (en) Design method of low-phase-noise microwave wideband frequency combiner
CN103762979B (en) Broadband frequency source for LTE channel simulator
CN201298839Y (en) Phaselocking frequency multiplier of rubidium frequency scale
CN108055035A (en) A kind of wideband frequency expanding unit of optical-electronic oscillator
CN113258929B (en) Low phase noise frequency source circuit
CN105577182B (en) W-waveband Low phase noise phase locked source and its application method
CN117081583B (en) Frequency source for improving phase noise
CN113726334A (en) S-band low-phase-noise low-spurious fine-stepping frequency source component and using method
CN105634483A (en) Millimeter wave frequency source for mercury ion microwave frequency standard
CN105356878B (en) A kind of implementation method and device of improved tricyclic wideband frequency synthesizer
CN104702279A (en) Frequency synthesizer of phase-locked loop
CN115940938A (en) Low-phase-noise fast broadband frequency sweeping frequency source
CN222147600U (en) Small millimeter wave frequency source
Chen et al. Design of a Wideband Frequency Agile Synthesizer
Shu et al. Design and implementation of a multi-channel frequency synthesizer for 5G wireless communication systems
Xu et al. Design of Ultra-broadband microwave sources based on ADF4350
Li et al. Design and Realization of an S-band High Performance Frequency Synthesizer for Radar System
Li et al. Research of High Performance Frequency Synthesizer for X-Band LFMCW Radar Application
CN222128060U (en) A frequency synthesis device with wide frequency band and low phase noise

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant