CN205829606U - A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop - Google Patents
A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop Download PDFInfo
- Publication number
- CN205829606U CN205829606U CN201620731490.7U CN201620731490U CN205829606U CN 205829606 U CN205829606 U CN 205829606U CN 201620731490 U CN201620731490 U CN 201620731490U CN 205829606 U CN205829606 U CN 205829606U
- Authority
- CN
- China
- Prior art keywords
- frequency
- output
- dds
- input
- division phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The utility model discloses a kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop, including Microwave Frequency Synthesizer, it is characterised in that: little stairstep signal generator, X-band local oscillation signal generator, L-band signal generator and Microwave Frequency Synthesizer.This utility model uses DDS to produce the intermediate-freuqncy signal of little stepping.Use fractional frequency division phase discriminator to improve the reference frequency of phaselocked loop, produce the X-band local oscillation signal of Low phase noise.By double conversion, intermediate-freuqncy signal being first converted to L-band, then is converted to X-band, double conversion all uses wave filter to be filtered, it is ensured that the index of low spurious.Simple in construction, little stepping, Low phase noise, the Microwave Frequency Synthesizer of low spurious can be realized by the method.
Description
Technical field
This utility model relates to a kind of frequency synthesizer module, especially relates to a kind of phase-locked based on DDS and fractional frequency division
The Senthesizer module of ring.
Background technology
Along with developing rapidly of Electromagnetic Field and Microwave Technology, microwave system is gradually applied to multiple necks such as civilian and military
Territory, Microwave Frequency Synthesizer, as the important component part in microwave system, have also been obtained and is increasingly widely applied.Due to micro-
Wave frequency is the highest, so under little relative bandwidth, its available frequency band is the widest, even goes up Gigahertz up to hundreds of.This
It is that low frequency radio wave is incomparable.This means that the information capacity of microwave is big, so modern multiplex communication, including defending
Star communication system, is all to be operated in microwave band almost without exception.It addition, microwave signal may be provided for phase information, polarization
Information, Doppler frequency information.This is in target detection, and remote sensing target feature analysis etc. is particularly significant in applying.
The output bandwidth of Microwave Frequency Synthesizer, frequency resolution, spurious reduction, phase noise etc. are all non-the normally off keys
Technical specification, but the Microwave Frequency Synthesizer output bandwidth being presently using, frequency resolution, spurious reduction, phase place are made an uproar
The technical specifications such as sound are difficult to take into account comprehensively.Cause that existing Microwave Frequency Synthesizer complexity in circuits is high, frequency resolution is the highest,
Phase noise spuious outstanding problem big, high.
Utility model content
Problem to be solved in the utility model is to provide a kind of based on DDS with the Senthesizer module of fractional frequency-division phase-locked loop,
High by Senthesizer module based on DDS and fractional frequency-division phase-locked loop solution traditional microwave frequency synthesizer circuit complexity,
Frequency resolution is the highest, phase noise big, high spuious problem.
For solving the problems referred to above, the technical solution adopted in the utility model is to provide one and locks based on DDS and fractional frequency division
The frequency synthesizer module of phase ring, it includes Microwave Frequency Synthesizer, the generation of little stairstep signal generator, X-band local oscillation signal
Device, L-band signal generator output be connected respectively to the input of Microwave Frequency Synthesizer.
Described little stairstep signal generator includes that constant-temperature crystal oscillator, constant-temperature crystal oscillator output are connected to power splitter and close terminal, merit
Dividing the output of the device first via to be connected to directly simulate frequency multiplier circuit a input, direct simulation frequency multiplier circuit a output is connected to DDS and joins
Examining input, FPGA control signal wire controls end with DDS and is connected.
Described X-band local oscillation signal generator includes that power splitter, the output of power splitter the second tunnel are connected to fractional frequency division mirror
Phase device reference edge, the output of fractional frequency division phase detector charge pump is by being connected to the voltage tuning end of VCO, VCO after loop filter
The two divided-frequency of output is signally attached to the radio-frequency (RF) signal input end of fractional frequency division phase discriminator, and FPGA control circuit output signal connects
Control end to fractional frequency division phase discriminator.
Described L-band signal generator includes directly simulating frequency multiplier circuit b, and the output of power splitter the 3rd tunnel is connected to directly
Simulation frequency multiplier circuit b input, directly simulation frequency multiplier circuit b output is connected to the local oscillator end of broadband double balanced mixer a, DDS
Output is connected to the intermediate frequency end of broadband double balanced mixer a, and the RF output end of double balanced mixer a is connected to wave filter a's
Input, wave filter a output is connected to the input of microwave amplifier a.
Described Microwave Frequency Synthesizer includes that microwave amplifier b, the output of microwave amplifier a are connected to broadband double flat weighing apparatus
The intermediate frequency end of frequency mixer b, the output filtered local oscillator being signally attached to broadband double balanced mixer b of filtered device c of VCO
End, the radio-frequency head output of broadband double balanced mixer b is connected to the input of wave filter b, and the output of wave filter b is connected to microwave
The input of amplifier b.
Described power splitter is passive power splitter.
The DDS being made up of technique scheme and the Senthesizer module of fractional frequency-division phase-locked loop, constant-temperature crystal oscillator output connects
To power splitter input；The stabilization signal that constant-temperature crystal oscillator exports is divided into three tunnel outputs；The output of the power splitter first via is connected to straight
Connecing simulation frequency multiplier circuit a input, directly simulation frequency multiplier circuit a makes output signal frequency amplify, owing to directly simulation frequency multiplication is electric
A output in road is connected to DDS reference input, and quickly by directly simulating frequency multiplier circuit a input signal, to be converted into high-resolution defeated for DDS
Go out signal；FPGA control signal wire controls end with DDS and is connected, and FPGA then completes DDS pair by the interface of chip Yu DDS circuit
The driving of input/output signal with mate, produce the intermediate-freuqncy signal of little stepping by FPGA programming Control DDS output frequency.
The second road stabilization signal output that power splitter exports constant-temperature crystal oscillator is connected to fractional frequency division phase discriminator reference edge, warp
After fractional frequency division phase discriminator effect, output frequency resolution is greatly improved, and ring is passed through in the output of fractional frequency division phase detector charge pump
The voltage tuning end of VCO it is connected to, after loop filter filters out the high fdrequency component in error voltage and noise after path filter
Be defeated by again VCO, VCO the two divided-frequency of output is signally attached to fractional frequency division phase discriminator radio-frequency (RF) signal input end continue improve defeated
Going out the resolution of frequency, FPGA control circuit output signal is connected to the control end of fractional frequency division phase discriminator, and FPGA then passes through core
Sheet complete with the interface of fractional frequency division phase detector circuit fractional frequency division phase discriminator to the driving of input/output signal with mate.Logical
Cross FPGA programming Control DDS output frequency thus utilize this structure to produce the X-band local oscillation signal of Low phase noise.
The 3rd tunnel output that power splitter exports constant-temperature crystal oscillator is connected to directly simulate frequency multiplier circuit b input, will directly
Simulation frequency multiplier circuit b makes output signal frequency amplify, and directly simulation frequency multiplier circuit b output is connected to broadband double balanced mixer a
Local oscillator end, then the directly simulation frequency multiplier circuit b output signal frequency being exaggerated several times is mixed, thus obtains intermediate frequency
Signal；The driving that the interface of DDS circuit completes input/output signal by fpga chip is connected to broadband double flat after mating
The intermediate frequency end of weighing apparatus frequency mixer a, obtains a highest L-band signal of resolution, and the RF output end of double balanced mixer a connects
To the input of wave filter a, the low spurious obtained, L-band signal that resolution is high being filtered, wave filter a output is connected to micro-
The input of twt amplifier a, then low spurious, intermediate-freuqncy signal that resolution is high are exaggerated several times.Thus utilize this structure to produce
The L-band signal of low spurious.
The L-band of microwave amplifier a output low spurious is signally attached to the intermediate frequency end of broadband double balanced mixer b and mixes
Frequently, after the 3rd filter filtering, it is signally attached to the double balanced mixing in broadband from the X-band local oscillation signal of VCO output Low phase noise
The local oscillator end mixing of device b；Radio-frequency head output after broadband double balanced mixer b mixing is connected to the input of wave filter b, carries out
Filtering, the high-resolution signal obtaining little stepping, more Low phase noise, more low spurious sends into the input of microwave amplifier b, and microwave is put
The signal of big device b outfan is the X-band signal of little stepping, Low phase noise, low spurious.
The power splitter that this utility model uses is passive power splitter, this power splitter working stability, simple in construction, substantially free of
Noise.
This utility model uses DDS to produce the intermediate-freuqncy signal of high frequency resolution, utilizes fractional frequency division phase discriminator to produce low
The X-band local oscillation signal made an uproar mutually.By double conversion, first intermediate-freuqncy signal is converted to L-band, then by L-band signal frequency conversion to X
Wave band, by the Filtering Processing after double conversion, it is achieved the X-band signal of low spurious.Traditional integral frequency divisioil phase discriminator is replaced
Change fractional frequency division phase discriminator into, the frequency of phase-locked loop reference signal can be improved, reduce the value of frequency dividing ratio N of phaselocked loop, make phase-locked
The signal that ring produces has relatively low phase noise.
Utilize the technical solution of the utility model can solve traditional microwave frequency synthesis by better simply scheme completely
Device complexity in circuits is high, frequency resolution is the highest, phase noise is big, high spuious problem.
Accompanying drawing illustrates:
Fig. 1 is frequency synthesizer module schematic diagram,
Fig. 2 is the frequency synthesizer module schematic diagram of DDS and fractional frequency-division phase-locked loop.
Detailed description of the invention
Below in conjunction with the accompanying drawings this utility model is further described.
As Fig. 1 shows this utility model frequency synthesizer module schematic diagram, it includes Microwave Frequency Synthesizer, little stepping
Signal generator, X-band local oscillation signal generator and L-band signal generator.
Little stairstep signal generator, X-band local oscillation signal generator, L-band signal generator output connect respectively
Input to Microwave Frequency Synthesizer.
Little stairstep signal generator includes constant-temperature crystal oscillator, and constant-temperature crystal oscillator output is connected to power splitter and closes terminal, power splitter the
One tunnel output is connected to directly simulate frequency multiplier circuit a input, and directly simulation frequency multiplier circuit a output is connected to DDS reference input
End, FPGA control signal wire controls end with DDS and is connected.
Fig. 2 shows the frequency synthesizer module schematic diagram of DDS and fractional frequency-division phase-locked loop, according to DDS and fractional frequency division
The frequency synthesizer schematic diagram of phaselocked loop, X-band local oscillation signal generator includes that power splitter, the output of power splitter the second tunnel are connected to
Fractional frequency division phase discriminator reference edge, fractional frequency division phase detector charge pump exports by the voltage being connected to VCO after loop filter
Tuning tip, the two divided-frequency of VCO output is signally attached to the radio-frequency (RF) signal input end of fractional frequency division phase discriminator, and FPGA control circuit is defeated
Go out to be signally attached to the control end of fractional frequency division phase discriminator.
L-band signal generator includes directly simulating frequency multiplier circuit b, and the output of power splitter the 3rd tunnel is connected to directly simulate again
Frequency circuit b input, directly simulation frequency multiplier circuit b output is connected to the local oscillator end of broadband double balanced mixer a, and DDS exports even
Receiving the intermediate frequency end of broadband double balanced mixer a, the RF output end of double balanced mixer a is connected to the input of wave filter a,
Wave filter a output is connected to the input of microwave amplifier a.
Microwave Frequency Synthesizer includes that microwave amplifier b, the output of microwave amplifier a are connected to broadband double balanced mixer
The intermediate frequency end of b, the output filtered local oscillator end being signally attached to broadband double balanced mixer b of filtered device c of VCO, broadband
The radio-frequency head output of double balanced mixer b is connected to the input of wave filter b, and the output of wave filter b is connected to microwave amplifier b
Input.
During test, the DDS being made up of technique scheme and the Senthesizer module of fractional frequency-division phase-locked loop, constant-temperature crystal oscillator is defeated
Go out to be connected to power splitter input；The stabilization signal that constant-temperature crystal oscillator exports is divided into three tunnel outputs；The output of the power splitter first via is even
Receiving directly simulation frequency multiplier circuit a input, directly simulation frequency multiplier circuit a output signal frequency is amplified, due to direct mould
Intending frequency multiplier circuit a output and be connected to DDS reference input, DDS is quickly converted into height by directly simulating frequency multiplier circuit a input signal
Resolution output signal；FPGA control signal controls end with DDS and is connected, and FPGA is then completed by the interface of chip with DDS circuit
DDS to the driving of input/output signal with mate.By FPGA programming Control DDS output frequency thus produce in little stepping
Frequently signal.
The second road stabilization signal output that 2 constant-temperature crystal oscillators 1 of power splitter export is connected to fractional frequency division phase discriminator reference edge,
Fractional frequency division phase discriminator output frequency resolution is greatly improved, and loop filtering is passed through in the output of fractional frequency division phase detector charge pump
Being connected to the voltage tuning end of VCO after device, loop filter is defeated by after filtering out the high fdrequency component in error voltage and noise again
The two divided-frequency of output is signally attached to the radio-frequency (RF) signal input end of fractional frequency division phase discriminator by VCO, VCO to be continued to improve output frequency
Resolution, FPGA control circuit output signal is connected to the control end of fractional frequency division phase discriminator, FPGA then by chip with little
The interfaces of number frequency dividing phase detector circuits complete fractional frequency division phase discriminator to the driving of input/output signal with mate.Pass through FPGA
Programming Control DDS output frequency thus produce the X-band local oscillation signal of Low phase noise.
The 3rd tunnel output that 2 constant-temperature crystal oscillators 1 of power splitter export is connected to directly simulate frequency multiplier circuit b input, directly
Simulation frequency multiplier circuit b makes output signal frequency be exaggerated several times, and it is mixed that direct simulation frequency multiplier circuit b output is connected to broadband double flat weighing apparatus
Frequently the local oscillator end of device a, then makes output signal frequency be mixed the directly simulation frequency multiplier circuit b amplified, thus in obtaining
Frequently signal；The driving that the interface of DDS circuit completes input/output signal by fpga chip is connected to broadband pair after mating
The intermediate frequency end of balanced mixer a, obtains a highest L-band signal of resolution, and the RF output end of double balanced mixer a is even
Receiving the input of wave filter a, intermediate-freuqncy signal high to the low spurious obtained, resolution filtered, wave filter a output is connected to micro-
The input of twt amplifier a, then low spurious, intermediate-freuqncy signal that resolution is high are exaggerated several times.Thus utilize this structure to produce
The L-band signal of low spurious.
The L-band of microwave amplifier a output low spurious is signally attached to the intermediate frequency end of broadband double balanced mixer b and again enters
Row mixing, obtains high-frequency signal, connects from the X-band local oscillation signal filtered device filtered signal of c of VCO output Low phase noise
To the local oscillator end of broadband double balanced mixer b, again it is mixed, produces high-frequency signal；After broadband double balanced mixer b mixing
Radio-frequency head output is connected to the input of wave filter b, filters, obtains the high-resolution of little stepping, more Low phase noise, more low spurious
Rate signal sends into the input of microwave amplifier b, and the signal of microwave amplifier b outfan is little stepping, Low phase noise, low spurious
X-band signal.
Claims (6)
1., based on DDS and a frequency synthesizer module for fractional frequency-division phase-locked loop, it includes Microwave Frequency Synthesizer, its feature
It is: constant-temperature crystal oscillator output is connected to power splitter and closes terminal；Power splitter output signal be connected respectively to little stairstep signal generator,
X-band local oscillation signal generator and the input of L-band signal generator；Little stairstep signal generator, X-band local oscillation signal are sent out
Raw device, the output of L-band signal generator are connected respectively to the input of Microwave Frequency Synthesizer.
The most according to claim 1 a kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop, its feature exists
In: described little stairstep signal generator includes that constant-temperature crystal oscillator, the output of the power splitter first via are connected to directly simulate frequency multiplier circuit a
Input, directly simulation frequency multiplier circuit a output is connected to DDS reference input, and FPGA control signal wire and DDS control end even
Connect.
The most according to claim 1 a kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop, its feature exists
In: described X-band local oscillation signal generator includes that power splitter, the output of power splitter the second tunnel are connected to fractional frequency division phase discriminator ginseng
Examining end, the output of fractional frequency division phase detector charge pump is by being connected to the voltage tuning end of VCO after loop filter, VCO exports
Two divided-frequency is signally attached to the radio-frequency (RF) signal input end of fractional frequency division phase discriminator, and FPGA control circuit output signal is connected to decimal
The control end of frequency dividing phase discriminator.
The most according to claim 1 a kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop, its feature exists
In: described L-band signal generator includes directly simulating frequency multiplier circuit b, and the output of power splitter the 3rd tunnel is connected to directly simulate
Frequency multiplier circuit b input, directly simulation frequency multiplier circuit b output is connected to the local oscillator end of broadband double balanced mixer a, and DDS exports
Being connected to the intermediate frequency end of broadband double balanced mixer a, the RF output end of double balanced mixer a is connected to the input of wave filter a
End, wave filter a output is connected to the input of microwave amplifier a.
The most according to claim 1 a kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop, its feature exists
In: described Microwave Frequency Synthesizer includes that microwave amplifier b, the output of microwave amplifier a are connected to the double balanced mixing in broadband
The intermediate frequency end of device b, the output filtered local oscillator end being signally attached to broadband double balanced mixer b of filtered device c of VCO, wide
Radio-frequency head output with double balanced mixer b is connected to the input of wave filter b, and the output of wave filter b is connected to microwave and amplifies
The input of device b.
6. according to a kind of based on DDS and fractional frequency-division phase-locked loop the frequency synthesizer mould described in Arbitrary Term in claim 2～4
Block, it is characterised in that: described power splitter is passive power splitter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620731490.7U CN205829606U (en) | 2016-07-13 | 2016-07-13 | A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620731490.7U CN205829606U (en) | 2016-07-13 | 2016-07-13 | A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205829606U true CN205829606U (en) | 2016-12-21 |
Family
ID=57561911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620731490.7U Active CN205829606U (en) | 2016-07-13 | 2016-07-13 | A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205829606U (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106067815A (en) * | 2016-07-13 | 2016-11-02 | 贵州航天计量测试技术研究所 | A kind of based on DDS with the frequency synthesizer of fractional frequency-division phase-locked loop |
| CN107222171A (en) * | 2017-05-19 | 2017-09-29 | 四川莱源科技有限公司 | One kind is used for two-way swept-frequency signal speedy carding process two-way Sweep Source |
| CN107453775A (en) * | 2017-08-24 | 2017-12-08 | 南京理工大学 | A kind of zero intermediate frequency reciver |
| CN108062142A (en) * | 2017-12-13 | 2018-05-22 | 贵州航天计量测试技术研究所 | A kind of distortion source structure using direct digital frequency synthesis technology |
| CN109120259A (en) * | 2018-08-06 | 2019-01-01 | 西安众思创融电子科技有限公司 | A kind of ultra-fine stepping low phase noise superelevation spurious reduction frequency source of small size |
| CN109412591A (en) * | 2018-09-06 | 2019-03-01 | 中国电子科技集团公司第二十九研究所 | A kind of thin stepping frequency synthesizer generation method of X-band and system |
| CN109831162A (en) * | 2019-04-11 | 2019-05-31 | 无锡思恩电子科技有限公司 | A kind of microwave circuit |
| CN111600603A (en) * | 2019-02-20 | 2020-08-28 | 天津光电通信技术有限公司 | Seven-channel frequency conversion module applying ADF4360-7 integer frequency division |
-
2016
- 2016-07-13 CN CN201620731490.7U patent/CN205829606U/en active Active
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106067815A (en) * | 2016-07-13 | 2016-11-02 | 贵州航天计量测试技术研究所 | A kind of based on DDS with the frequency synthesizer of fractional frequency-division phase-locked loop |
| CN106067815B (en) * | 2016-07-13 | 2023-04-07 | 贵州航天计量测试技术研究所 | Frequency synthesizer based on DDS and fractional frequency division phase-locked loop |
| CN107222171A (en) * | 2017-05-19 | 2017-09-29 | 四川莱源科技有限公司 | One kind is used for two-way swept-frequency signal speedy carding process two-way Sweep Source |
| CN107453775A (en) * | 2017-08-24 | 2017-12-08 | 南京理工大学 | A kind of zero intermediate frequency reciver |
| CN107453775B (en) * | 2017-08-24 | 2019-05-07 | 南京理工大学 | A kind of zero intermediate frequency reciver |
| CN108062142A (en) * | 2017-12-13 | 2018-05-22 | 贵州航天计量测试技术研究所 | A kind of distortion source structure using direct digital frequency synthesis technology |
| CN109120259A (en) * | 2018-08-06 | 2019-01-01 | 西安众思创融电子科技有限公司 | A kind of ultra-fine stepping low phase noise superelevation spurious reduction frequency source of small size |
| CN109412591A (en) * | 2018-09-06 | 2019-03-01 | 中国电子科技集团公司第二十九研究所 | A kind of thin stepping frequency synthesizer generation method of X-band and system |
| CN109412591B (en) * | 2018-09-06 | 2022-07-15 | 中国电子科技集团公司第二十九研究所 | X-waveband fine-stepping frequency synthesis generation method and system |
| CN111600603A (en) * | 2019-02-20 | 2020-08-28 | 天津光电通信技术有限公司 | Seven-channel frequency conversion module applying ADF4360-7 integer frequency division |
| CN109831162A (en) * | 2019-04-11 | 2019-05-31 | 无锡思恩电子科技有限公司 | A kind of microwave circuit |
| CN109831162B (en) * | 2019-04-11 | 2024-05-28 | 无锡思恩电子科技有限公司 | Microwave circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN205829606U (en) | A kind of based on DDS with the frequency synthesizer module of fractional frequency-division phase-locked loop | |
| CN106067815A (en) | A kind of based on DDS with the frequency synthesizer of fractional frequency-division phase-locked loop | |
| CN108736889B (en) | Low spurious/low phase noise frequency synthesizer | |
| CN103762978B (en) | Broadband low-phase noise frequency synthesizer without frequency divider based on harmonic mixing | |
| CN105429641B (en) | A kind of error lock prevention high performance wideband Microwave Frequency Synthesizer | |
| CN106385255B (en) | A kind of polycyclic apparatus for frequency synthesizing that low noise high-resolution is tunable and method | |
| CN105141310A (en) | Multi-loop broadband low-phase noise frequency synthesizer | |
| CN105553469A (en) | Low-phase noise frequency source | |
| CN103633997B (en) | TD-LTE-Advanced comprehensive test instrument synthesizes local oscillation device | |
| CN108988857A (en) | A kind of broadband low phase noise frequency synthesizer and method based on optical-electronic oscillator | |
| CN104467835A (en) | Frequency-agile and low-phase-noise frequency source | |
| CN107483049A (en) | A kind of broadband frequency agility frequency source | |
| CN108055035A (en) | A kind of wideband frequency expanding unit of optical-electronic oscillator | |
| CN106533437A (en) | Broadband and small-step frequency source circuit | |
| CN104954017B (en) | Frequency synthesizer of LTE air interface monitor | |
| CN110289858B (en) | Broadband fine stepping agile frequency conversion combination system | |
| CN102928664A (en) | System for realizing full-band scanning of frequency spectrograph through point-by-point phase locking | |
| CN105827240A (en) | Low-phase-noise 6.8GHz frequency source applied to rubidium atomic clock | |
| CN207184459U (en) | A kind of broadband frequency agility frequency source | |
| CN107196653B (en) | Broadband low-phase noise frequency synthesizer | |
| CN105634483A (en) | Millimeter wave frequency source for mercury ion microwave frequency standard | |
| CN204836137U (en) | Frequency synthesizer | |
| CN208445546U (en) | A kind of broadband low phase noise frequency synthesizer based on optical-electronic oscillator | |
| CN106199184A (en) | A kind of spectrum analyzer with quick phase-locked function | |
| CN206099942U (en) | Quick frequency hopping frequency synthesizer of C wave band |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |