CN106899272A - A kind of trsanscondutance amplifier and wave filter - Google Patents
A kind of trsanscondutance amplifier and wave filter Download PDFInfo
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- CN106899272A CN106899272A CN201710114054.4A CN201710114054A CN106899272A CN 106899272 A CN106899272 A CN 106899272A CN 201710114054 A CN201710114054 A CN 201710114054A CN 106899272 A CN106899272 A CN 106899272A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45376—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using junction FET transistors as the active amplifying circuit
- H03F3/45381—Long tailed pairs
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45024—Indexing scheme relating to differential amplifiers the differential amplifier amplifying transistors are cascode coupled transistors
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Abstract
The invention discloses a kind of trsanscondutance amplifier and wave filter, its input stage includes the Double deference being made up of the first input pipe, the second input pipe, the 3rd input pipe and the 4th input pipe to structure, with, managed by the first feedback, the second feedback is managed, the 3rd feeds back the source negative feedback structure that pipe and the 4th feedback pipe are constituted, by Double deference to structures counter electric current cubic non-linearity, suppress that the reason because mismatch and electron mobility are degenerated etc. causes by source negative feedback structure is non-linear, so that with the linearity higher.
Description
Technical field
The present invention relates to circuit field, in particular, it is related to a kind of trsanscondutance amplifier and wave filter.
Background technology
Trsanscondutance amplifier is a kind of very strong normal component of versatility, and using widely, main application can be divided into two
Aspect.On the one hand, signal operation and treatment are carried out in various linear and non-linear analog circuit and systems；On the other hand, exist
As interface circuit between voltage mode signal system and current mode signal system, pending voltage signal is transformed to electricity
Stream signal, is re-fed into current-mode system and is processed.
With developing rapidly for the communication technology, especially mobile communication technology and computing technique, as signal operation and place
One key modules of reason, trsanscondutance amplifier has at the aspect such as voltage and current amplifier, wave filter for developing high stability
Important effect, wherein, the linearity is to weigh an important performance parameter of trsanscondutance amplifier.
Such as transconductance-capacitor (Gm-C) active filter, the filtering process for carrying out signal after the mixer, is rear class
Variable gain amplifier provide scattering frequency spectrum less signal.When larger input signal is processed, transconductance-capacitor (Gm-C)
Active filter needs to ensure the linearity higher in the case where power consumption is very low, and transconductance-capacitor (Gm-C) active filter
The linearity is directly proportional to the linearity of trsanscondutance amplifier, and it is higher that this is accomplished by trsanscondutance amplifier satisfaction when signal transacting is carried out
Linearity.
The content of the invention
To solve the above problems, the invention provides a kind of trsanscondutance amplifier and wave filter, with the linearity higher.
To achieve the above object, the present invention provides following technical scheme：
A kind of trsanscondutance amplifier, it is characterised in that including：Input stage and the load circuit being connected with the input stage；
The input stage includes：
First electric current source capsule (PM3a), the second electric current source capsule (PM3b), the 3rd electric current source capsule (PM3c), the 4th electric current source capsule
And the 5th electric current source capsule (PM3e) (PM3d)；
First input pipe (PM1a), the second input pipe (PM1b), the 3rd input pipe (PM1c) and the 4th input pipe (PM1d),
Wherein, equal sized, the 3rd input pipe of first input pipe (PM1a) and second input pipe (PM1b)
(PM1c) and the 4th input pipe (PM1d) it is equal sized；
First feedback pipe (PM2a), the second feedback pipe (PM2b), the 3rd feedback pipe (PM2c) and the 4th feedback pipe (PM2d),
Wherein, the first feedback pipe (PM2a) and the second feedback manage the equal sized of (PM2b), and the 3rd feedback pipe is (PM2c) and described
4th feedback manages the equal sized of (PM2d)；
The grid end of the first electric current source capsule (PM3a), the grid end of the second electric current source capsule (PM3b), the 3rd electricity
The grid end of stream source capsule (PM3c) and the grid end of the 4th electric current source capsule (PM3d) connect the bias current of the trsanscondutance amplifier
Source, source connects the supply voltage of the trsanscondutance amplifier；
The grid end and drain terminal of the 5th electric current source capsule (PM3e) connect the bias current sources of the trsanscondutance amplifier, source
Connect the supply voltage of the trsanscondutance amplifier；
The grid end of first input pipe (PM1a) and the grid end of the 4th input pipe (PM1d) lead amplification with described collapsing
The normal phase input end connection of device；The grid end of second input pipe (PM1b) and grid end and the institute of the 3rd input pipe (PM1c)
State the negative-phase input connection of trsanscondutance amplifier；
The drain terminal connection of the drain terminal and the 3rd input pipe (PM1c) of first input pipe (PM1a), and collapse with described
Lead the positive output end connection of amplifier；The leakage of the drain terminal and the 4th input pipe (PM1d) of second input pipe (PM1b)
End connection, and be connected with the negative output end of the trsanscondutance amplifier；
The source of first input pipe (PM1a) and the first electric current source capsule (PM3a) drain terminal connection, and with it is described
The source connection of the drain terminal of the first feedback pipe (PM2a) and the second feedback pipe (PM2b)；The source of second input pipe (PM1b)
Drain terminal with the second electric current source capsule (PM3b) is connected, and source and the second feedback pipe with the described first feedback pipe (PM2a)
(PM2b) drain terminal connection；The source of the 3rd input pipe (PM1c) and the drain terminal of the 3rd electric current source capsule (PM3c) connect
Connect, and the source of the drain terminal and the 4th feedback pipe (PM2d) for managing (PM2c) with the described 3rd feedback is connected；4th input pipe
(PM1d) the drain terminal connection of source and the 4th electric current source capsule (PM3d), and the source of (PM2c) is managed with the described 3rd feedback
Drain terminal with the 4th feedback pipe (PM2d) is connected；
The grid end of first feedback pipe (PM2a) and the grid end of the 4th feedback pipe (PM2d) connect the trsanscondutance amplifier
Normal phase input end；The grid end of second feedback pipe (PM2c) and the grid end of the 3rd feedback pipe (PM2d) connect the mutual conductance and put
The negative-phase input of big device.
Preferably, the first electric current source capsule (PM3a), the second electric current source capsule (PM3b), the 3rd electric current source capsule
(PM3c), the 4th electric current source capsule (PM3d), the 5th electric current source capsule (PM3e), first input pipe (PM1a), institute
State the second input pipe (PM1b), the 3rd input pipe (PM1c), the 4th input pipe (PM1d), the first feedback pipe
(PM2a), second feedback pipe (PM2b), the 3rd feedback pipe (PM2c) and the 4th feedback pipe (PM2d) are
PMOS.
Preferably, the load circuit includes：
First cascade pipe (NM1a), the second cascade pipe (NM1b), the first load pipe (NM2a), the second load pipe
(NM2b), the 3rd load pipe (NM2c) and the 4th load pipe (NM2d), wherein, the first cascade pipe NM1a and described
Two cascade pipe NM1b's is equal sized, the first load pipe NM2a, the second load pipe NM2b, the 3rd load pipe NM2c and
4th load pipe NM2d's is equal sized；
The drain terminal of the first cascade pipe (NM1a) connects the negative output end of the trsanscondutance amplifier；Described second
The drain terminal of cascade pipe (NM1b) connects the positive output end of the trsanscondutance amplifier；The first cascade pipe (NM1a)
Grid end and the grid end of the second cascade pipe (NM1b) connect the bias voltage of the trsanscondutance amplifier；
The drain terminal connection described first of the drain terminal and second load pipe (NM2b) of first load pipe (NM2a) is total to
The source of the common bank tube (NM1a) in source；The drain terminal of the 3rd load pipe (NM2c) and the drain terminal of the 4th load pipe (NM2d) connect
Connect the source of the second cascade pipe (NM1b)；
The grid end of first load pipe (NM2a) and the grid end of the 3rd load pipe (NM2c) connect the mutual conductance and put
The negative output end of big device；The grid end of the grid end of the second load pipe (NM2b) and the 4th load pipe (NM2d) connects the mutual conductance and puts
The positive output end of big device；
The source of first load pipe (NM2a), the source of second load pipe (NM2b), the 3rd load pipe
(NM2c) source and the source ground connection of the 4th load pipe (NM2d).
Preferably, the first cascade pipe (NM1a), the second cascade pipe (NM1b), the first load pipe
(NM2a), the second load pipe (NM2b), the 3rd load pipe (NM2c) and the 4th load pipe (NM2d) are NMOS tube.
Preferably, also include：The biasing circuit of bias voltage is provided for the trsanscondutance amplifier；
The biasing circuit includes：First biasing transistor (MB1a), the second biasing transistor (MB1b), the 3rd biasing are brilliant
Body pipe (MB2a), the 4th biasing transistor (MB2b), the 5th biasing transistor (MB3a), the 6th biasing transistor (MB3b), the
Seven biasings transistor (MB4a), the 8th biasing transistor (MB4b) and the 9th biasing transistor (PM3e)；
Wherein, equal sized, the 3rd biasing crystalline substance of the first biasing transistor (MB1a) and the second biasing transistor (MB1b)
Body pipe (MB2a) and the 4th biases the equal sized of transistor (MB2b), the 5th biasing transistor (MB3a) and the 6th biasing crystal
The equal sized of (MB3b) is managed, the 7th biasing transistor (MB4a) and the 8th bias the equal sized of transistor (MB4b)；
The grid end and drain terminal of the 9th biasing transistor (PM3e) connect the bias current sources of the trsanscondutance amplifier, source
The supply voltage of the end connection trsanscondutance amplifier；
It is described first biasing transistor (MB1a) grid end and it is described second biasing transistor (MB1b) grid end with it is described
The grid end connection of the 9th biasing transistor (PM3e)；The source of first biasing transistor (MB1a) and second biasing are brilliant
The source of body pipe (MB1b) and the supply voltage of the trsanscondutance amplifier；The drain terminal connection of first biasing transistor (MB1a)
The source of the 3rd biasing transistor (MB2a)；Drain terminal connection the 4th biasing of second biasing transistor (MB1b)
The source of transistor (MB2b)；
It is described 3rd biasing transistor (MB2a) grid end and it is described 4th biasing transistor (MB2b) grid end with it is described
The external voltage of trsanscondutance amplifier；Drain terminal connection the 5th biasing transistor of the 3rd biasing transistor (MB2a)
(MB3a) grid end and drain terminal, and be connected with the output end of the biasing circuit；The leakage of the 4th biasing transistor (MB2b)
The grid end and drain terminal of end connection the 6th biasing transistor (MB3b), and be connected with the output end of the biasing circuit；It is described
Output end exports bias voltage；
The drain terminal of source connection the 7th biasing transistor (MB4a) of the 5th biasing transistor (MB3a)；It is described
The drain terminal of source connection the 8th biasing transistor (MB4b) of the 6th biasing transistor (MB3b)；
It is described 7th biasing transistor (MB4a) grid end and it is described 8th biasing transistor (MB4b) grid end with it is described
The external voltage of trsanscondutance amplifier；The source of the 7th biasing transistor (MB4a) and the 8th biasing transistor (MB4b)
Source ground connection.
Preferably, the 5th electric current source capsule is multiplexed with the 9th biasing transistor (PM3e).
Preferably, first biasing transistor (MB1a), the second biasing transistor (MB1b), the 3rd biasing transistor
(MB2a), the 4th biasing transistor (MB2b) and the 9th biasing transistor (PM3e) are PMOS；
It is described 5th biasing transistor (MB3a), the 6th biasing transistor (MB3b), the 7th biasing transistor (MB4a) and
8th biasing transistor (MB4b) is NMOS tube.
Preferably, the size of first biasing transistor (MB1a) is equal to the size of the first electric current source capsule (PM3a)
With the size sum of the 3rd electric current source capsule (PM3c), the size of second biasing transistor (MB2a) is equal to described first
The size of input pipe (PM1a) and the size sum of the 3rd input pipe (PM1c), the 3rd biasing transistor (MB3a)
Size is equal to the size of the first cascade pipe (NM1a), and the size of the 4th biasing transistor (MB4a) is equal to described
The size of the first load pipe (NM2a) and the size sum of the 3rd load pipe (NM2c).
A kind of wave filter, including the trsanscondutance amplifier described in such scheme.
Compared with prior art, technical scheme provided by the present invention has advantages below：
The trsanscondutance amplifier and wave filter provided by foregoing description, the application, its input stage are included by first
The Double deference that input pipe, the second input pipe, the 3rd input pipe and the 4th input pipe are constituted to structure, and, managed by the first feedback, the
The source negative feedback structure that two feedback pipes, the 3rd feedback pipe and the 4th feedback pipe are constituted, by Double deference to structures counter electric current
Cubic non-linearity, is suppressed because of the non-thread that the reason such as mismatch and electron mobility degeneration causes by source negative feedback structure
Property, so that with the linearity higher.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this
Inventive embodiment, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is the circuit structure diagram of the trsanscondutance amplifier in the embodiment of the present invention；
Fig. 2 is the circuit structure diagram of the biasing circuit in the embodiment of the present invention；
Fig. 3 is the simulation result figure of the triple-frequency harmonics rejection ratio of trsanscondutance amplifier in the embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
Many details are elaborated in the following description in order to fully understand the present invention, but the present invention can be with
Other manner described here is different from using other to implement, those skilled in the art can be without prejudice to intension of the present invention
In the case of do similar popularization, therefore the present invention is not limited by following public specific embodiment.
Secondly, the present invention is described in detail with reference to schematic diagram, when the embodiment of the present invention is described in detail, for purposes of illustration only, table
Show that the schematic diagram of device architecture can disobey general ratio and make partial enlargement, and the schematic diagram is example, and it should not herein
Limitation the scope of protection of the invention.Additionally, the three-dimensional space of length, width and depth should be included in actual fabrication.
As stated in the Background Art, as signal operation and a key modules for the treatment of, the Linearity of trsanscondutance amplifier is straight
Connect the performance for affecting device.
In view of this, a kind of trsanscondutance amplifier and wave filter are the embodiment of the invention provides, including：Input stage and with it is described
The load circuit of input stage connection；The input stage includes：
First electric current source capsule PM3a, the second electric current source capsule PM3b, the 3rd electric current source capsule PM3c, the 4th electric current source capsule PM3d and
5th electric current source capsule PM3e；First input pipe PM1a, the second input pipe PM1b, the 3rd input pipe PM1c and the 4th input pipe
PM1d, wherein, equal sized, the 3rd input pipe PM1c of the first input pipe PM1a and the second input pipe PM1b
It is equal sized with the 4th input pipe PM1d；First feedback pipe PM2a, the second feedback pipe PM2b, the 3rd feedback pipe PM2c and
4th feedback pipe PM2d, wherein, the first feedback pipe PM2a's and the second feedback pipe PM2b is equal sized, and the 3rd feedback is managed
PM2c's and the 4th feedback pipe PM2d is equal sized；
The grid end of the first electric current source capsule PM3a, the grid end of the second electric current source capsule PM3b, the 3rd current source
The grid end of the grid end of pipe PM3c and the 4th electric current source capsule PM3d connects the bias current sources of the trsanscondutance amplifier, and source connects
Connect the supply voltage of the trsanscondutance amplifier；
The grid end and drain terminal of the 5th electric current source capsule PM3e connect the bias current sources of the trsanscondutance amplifier, and source connects
Connect the power voltage terminal of the trsanscondutance amplifier；
The grid end of the first input pipe PM1a and the grid end of the 4th input pipe PM1d lead amplifier with described collapsing
Normal phase input end is connected；The grid end of the second input pipe PM1b and the grid end of the 3rd input pipe PM1c are put with the mutual conductance
The negative-phase input connection of big device；
The drain terminal connection of the drain terminal of the first input pipe PM1a and the 3rd input pipe PM1c, and with it is described collapse to lead put
The positive output end connection of big device；The drain terminal connection of the drain terminal and the 4th input pipe PM1d of the second input pipe PM1b,
And be connected with the negative output end of the trsanscondutance amplifier；
The drain terminal connection of the source of the first input pipe PM1a and the first electric current source capsule PM3a, and with described first
The source connection of the drain terminal of feedback pipe PM2a and the second feedback pipe PM2b；The source and described second of the second input pipe PM1b
The drain terminal connection of electric current source capsule PM3b, and the source with the described first feedback pipe PM2a and the drain terminal company of the second feedback pipe PM2b
Connect；The drain terminal connection of the source of the 3rd input pipe PM1c and the 3rd electric current source capsule PM3c, and fed back with the described 3rd
The source connection of the drain terminal of pipe PM2c and the 4th feedback pipe PM2d；The source and the 4th electric current of the 4th input pipe PM1d
The drain terminal connection of source capsule PM3d, and be connected with the source and the 4th drain terminal for feeding back pipe PM2d of the described 3rd feedback pipe PM2c；
The grid end of the first feedback pipe PM2a and the grid end of the 4th feedback pipe PM2d are connecting the trsanscondutance amplifier just
Phase input；The grid end of the second feedback pipe PM2c and the grid end of the 3rd feedback pipe PM2d connect the negative of the trsanscondutance amplifier
Phase input.
As can be seen that trsanscondutance amplifier and wave filter that the application is provided, its input stage is included by the first input pipe, the
The Double deference that two input pipes, the 3rd input pipe and the 4th input pipe are constituted to structure, and, managed by the first feedback, the second feedback pipe,
The source negative feedback structure that 3rd feedback pipe and the 4th feedback pipe are constituted, by Double deference to structures counter electric current cubic non-linearity
, suppress that the reason because mismatch and electron mobility are degenerated etc. causes by source negative feedback structure is non-linear, so as to have
The linearity higher.
Above is the core concept of the application, in order that technical scheme provided in an embodiment of the present invention is clearer, below
The trsanscondutance amplifier is described in detail, is described in detail with to above-mentioned technical proposal of the present invention：
An embodiment provides a kind of trsanscondutance amplifier, as shown in figure 1, being the tool of the trsanscondutance amplifier
The circuit structure of body.
In the present embodiment, the trsanscondutance amplifier includes：Input stage and the load circuit being connected with the input stage；Institute
Stating input stage includes：
First electric current source capsule PM3a, the second electric current source capsule PM3b, the 3rd electric current source capsule PM3c, the 4th electric current source capsule PM3d and
5th electric current source capsule PM3e；First input pipe PM1a, the second input pipe PM1b, the 3rd input pipe PM1c and the 4th input pipe
PM1d, wherein, equal sized, the 3rd input pipe PM1c of the first input pipe PM1a and the second input pipe PM1b
It is equal sized with the 4th input pipe PM1d；First feedback pipe PM2a, the second feedback pipe PM2b, the 3rd feedback pipe PM2c and
4th feedback pipe PM2d, wherein, the first feedback pipe PM2a's and the second feedback pipe PM2b is equal sized, and the 3rd feedback is managed
PM2c's and the 4th feedback pipe PM2d is equal sized.
In this application, all tube devices, such as the first input pipe, the first feedback pipe, each mean transistor, the chi
It is very little, refer to the breadth length ratio of transistor.Equal sized, the breadth length ratio for referring to transistor is equal.Specifically, in the present embodiment
In, the equal length of all transistors, therefore, equal sized transistor, its width is also equal.
Wherein, the first electric current source capsule~the 5th electric current source capsule, for providing DC current, the first input for trsanscondutance amplifier
The~the four input pipe of pipe, for forming two cross-linked differential pairs, first feedback pipe the~the four feedback pipe is for forming source
Pole negative feedback structure.
The grid end of the first electric current source capsule PM3a, the grid end of the second electric current source capsule PM3b, the 3rd current source
The grid end of the grid end of pipe PM3c and the 4th electric current source capsule PM3d connects the bias current sources of the trsanscondutance amplifier, and source connects
Connect the supply voltage of the trsanscondutance amplifier；The grid end and drain terminal of the 5th electric current source capsule PM3e connect the trsanscondutance amplifier
Bias current sources Ibiss, source connects the power voltage terminal Vdd of the trsanscondutance amplifier.
Specifically, in the first electric current source capsule~the 5th electric current source capsule in the present embodiment, the first electric current source capsule PM3a and
Two electric current source capsule PM3b's is equal sized, and the 3rd electric current source capsule PM3c's and the 4th electric current source capsule PM3d is equal sized, and first
Electric current source capsule PM3a, the second electric current source capsule PM3b, the size of the 3rd electric current source capsule PM3c and the 4th electric current source capsule PM3d are the 5th
The integral multiple of electric current source capsule PM3e sizes.
Specifically, the integral multiple of the transistor size, refers to the integral multiple of the breadth length ratio of transistor.In the present embodiment
In the case of transistor length all same, the integral multiple of transistor size is the integral multiple for representing transistor width.
The grid end of the first input pipe PM1a and the grid end of the 4th input pipe PM1d lead amplifier with described collapsing
Normal phase input end connects VIP；The grid end of the second input pipe PM1b and the grid end of the 3rd input pipe PM1c with it is described across
Lead the negative-phase input connection VIN of amplifier；
The drain terminal connection of the drain terminal of the first input pipe PM1a and the 3rd input pipe PM1c, and with it is described collapse to lead put
The positive output end IOP connections of big device；The drain terminal of the second input pipe PM1b and the drain terminal of the 4th input pipe PM1d connect
Connect, and be connected with the negative output end ION of the trsanscondutance amplifier；
The drain terminal connection of the source of the first input pipe PM1a and the first electric current source capsule PM3a, and with described first
The source connection of the drain terminal of feedback pipe PM2a and the second feedback pipe PM2b；The source and described second of the second input pipe PM1b
The drain terminal connection of electric current source capsule PM3b, and the source with the described first feedback pipe PM2a and the drain terminal company of the second feedback pipe PM2b
Connect；The drain terminal connection of the source of the 3rd input pipe PM1c and the 3rd electric current source capsule PM3c, and fed back with the described 3rd
The source connection of the drain terminal of pipe PM2c and the 4th feedback pipe PM2d；The source and the 4th electric current of the 4th input pipe PM1d
The drain terminal connection of source capsule PM3d, and be connected with the source and the 4th drain terminal for feeding back pipe PM2d of the described 3rd feedback pipe PM2c.
The grid end of the first feedback pipe PM2a and the grid end of the 4th feedback pipe PM2d are connecting the trsanscondutance amplifier just
Phase input VIP；The grid end of the second feedback pipe PM2c and the grid end of the 3rd feedback pipe PM2d connect the trsanscondutance amplifier
Negative-phase input VIN.
In the present embodiment, equal sized, the 3rd input pipe PM1c of the first input pipe PM1a and the second input pipe PM1b
It is equal sized with the 4th input pipe PM1d, to form differential configuration.The chi of the first feedback pipe PM2a and the second feedback pipe PM2b
Very little equal, the 3rd feedback pipe PM2c's and the 4th feedback pipe PM2d is equal sized, to form source negative feedback structure.
Differential output current by the left side and the right differential pair that calculate OTA is：
Wherein, viRepresent differential input voltage, j values 1 or 2.As j=1, gm1Represent the mutual conductance of PM1a or PM1b, Ron1
Represent the conducting resistance of PM2a or PM2b, Vdsat1Represent the overdrive voltage of PM1a or PM1b.As j=2, gm2Represent PM1c
Or the mutual conductance of PM1d, Ron2Represent the conducting resistance of PM2c or PM2d, Vdsat2Represent the overdrive voltage of PM1c or PM1d.Ioj
With Taylor series expansion and take first three items and obtain：
Due to：
io=iop-ion=io1-io2
Work as satisfaction：
When, ioIn no longer comprising cubic non-linearity will thus drastically increase the linearity of whole OTA.According to
The simulation result of the OTA under the CMOS technology of standard 28nm, as shown in figure 3, wherein, abscissa represents the frequency of input signal,
Ordinate represents the frequency component of fundamental wave and higher hamonic wave in output signal, and under the frequency input signal of 30MHz, HD3 is M4
Peak value -106.7dB subtract peak value -30.2dB, the i.e. -76.5dB of M3, this is that other structures are extremely difficult to.
As can be seen that the trsanscondutance amplifier of the present embodiment, input stage is included by the first input pipe, the second input pipe,
The Double deference that three input pipes and the 4th input pipe are constituted to structure, and, managed by the first feedback, the second feedback pipe, the 3rd feedback pipe
The source negative feedback structure constituted with the 4th feedback pipe, by Double deference to structures counter electric current cubic non-linearity, by source
It is non-linear that reason that pole negative feedback structure suppresses because mismatch and electron mobility are degenerated etc. causes, so that with higher linear
Degree.
Also, used in the present embodiment and use one-level OTA structures, relative to common secondary structure, simple structure, and power consumption
It is relatively low.
Also, in the present embodiment, the first electric current source capsule PM3a, the second electric current source capsule PM3b, the 3rd electric current source capsule
PM3c, the 4th electric current source capsule PM3d, the 5th electric current source capsule PM3e, the first input pipe PM1a, the second input pipe PM1b, the 3rd input
Pipe PM1c, the 4th input pipe PM1d, the first feedback pipe PM2a, the second feedback pipe PM2b, the 3rd feedback pipe PM2c and the 4th feedback
Pipe PM2d is PMOS.Using PMOS as input pipe, the body bias effect of input pipe can be eliminated under common process, entered
And eliminate due to the mismatch that body bias effect brings, so as to contribute to the raising of the linearity.
In addition, the present embodiment further provides the load circuit of trsanscondutance amplifier.Specifically, as shown in figure 1, described negative
Carrying circuit includes：
First cascade pipe NM1a, the second cascade pipe NM1b, the first load pipe NM2a, the second load pipe NM2b,
3rd load pipe NM2c and the 4th load pipe NM2d, wherein, the first cascade pipe NM1a's and the second cascade pipe NM1b
It is equal sized, the first load pipe NM2a, the second load pipe NM2b, the size phase of the 3rd load pipe NM2c and the 4th load pipe NM2d
Deng.
Wherein, the first cascade pipe NM1a, the second cascade pipe NM1b, the first load pipe NM2a, the second load pipe
NM2b, the 3rd load pipe NM2c and the 4th load pipe NM2d are used to be formed the Cascode structures of cross-couplings connection.
The drain terminal of the first cascade pipe NM1a connects the negative output end ION of the trsanscondutance amplifier；Described
The drain terminal of two cascade pipe NM1b connects the positive output end IOP of the trsanscondutance amplifier；The first cascade pipe
The grid end of the grid end of NM1a and the second cascade pipe NM1b connects the bias voltage Vbiss of the trsanscondutance amplifier.
The drain terminal of the drain terminal of the first load pipe NM2a and the second load pipe NM2b connects first common source and is total to
The source of bank tube NM1a；The drain terminal connection described second of the drain terminal and the 4th load pipe NM2d of the 3rd load pipe NM2c
The source of cascade pipe NM1b；The grid end of the first load pipe NM2a and the grid end connection institute of the 3rd load pipe NM2c
State the negative output end ION of trsanscondutance amplifier；The grid end of the second load pipe NM2b and the grid end connection institute of the 4th load pipe NM2d
State the positive output end IOP of trsanscondutance amplifier；The source of the source of the first load pipe NM2a, the second load pipe NM2b
The source ground connection of end, the source of the 3rd load pipe NM2c and the 4th load pipe NM2d.
Wherein, the first cascade pipe NM1a, the second cascade pipe NM1b, the first load pipe NM2a, second negative
Carry pipe NM2b, the 3rd load pipe NM2c and the 4th load pipe NM2d and be NMOS tube.
In the present embodiment, the first load pipe NM2a, the second load pipe NM2b, the 3rd load pipe NM2c and the 4th load pipe
NM2d is operated in linear zone.First load pipe NM2a and the 4th load pipe NM2d can regard a differential pair load as, and this is poor
Divide the negative-feedback that the Cascode structures to being connected by diode are provided to stablize output common mode voltage.Second load pipe NM2b
Can regard the load of another differential pair as with the 3rd load pipe NM2c, what this differential pair can be connected by cross-couplings
Cascode structures provide a negative resistance to improve output impedance.
As can be seen that in the present embodiment, the parallel-connection structure of the positive negative resistance constituted using cross-linked load pipe is improved
Output impedance, while obtaining an output impedance near ideal with the amplification further to impedance of Cascode structures.
It should be noted that on the basis of disclosure, those skilled in the art can set other kinds of negative
Circuit is carried, concrete structure disclosed in the present application is not limited solely to.
Further, the present embodiment additionally provides a kind of biasing circuit that bias voltage is provided for the trsanscondutance amplifier,
As shown in Fig. 2 being the circuit structure diagram of the biasing circuit；
The biasing circuit includes：First biasing transistor MB1a, the second biasing transistor MB1b, the 3rd biasing transistor
MB2a, the 4th biasing transistor MB2b, the 5th biasing transistor MB3a, the 6th biasing transistor MB3b, the 7th biasing transistor
MB4a, the 8th biasing transistor MB4b and the 9th biasing transistor PM3e；
Wherein, the first biasing transistor MB1a's and the second biasing transistor MB1b is equal sized, and the 3rd biases transistor
The biasing transistors of MB2a and the 4th MB2b's is equal sized, the chi of the 5th biasing transistor MB3a and the 6th biasing transistor MB3b
Very little equal, the 7th biasing transistor MB4a's and the 8th biasing transistor MB4b is equal sized.
The grid end and drain terminal of the 9th biasing transistor PM3e connect the bias current sources of the trsanscondutance amplifier, source
Connect the supply voltage of the trsanscondutance amplifier.In embodiment, the 5th electric current source capsule is multiplexed with the 9th biasing crystal
Pipe PM3e, in the other embodiment of the application, can also be separately provided one the 9th biasing transistor, the 9th biasing crystal
The size of pipe is equal sized with the 5th electric current source capsule.
The grid end and the described 9th of the grid end of the first biasing transistor MB1a and the second biasing transistor MB1b
The grid end connection of biasing transistor PM3e；The source of the first biasing transistor MB1a and the second biasing transistor MB1b
Source and the trsanscondutance amplifier supply voltage；Drain terminal connection the 3rd biasing of the first biasing transistor MB1a
The source of transistor MB2a；The source of drain terminal connection the 4th biasing transistor MB2b of the second biasing transistor MB1b
End；
The grid end and the mutual conductance of the grid end of the 3rd biasing transistor MB2a and the 4th biasing transistor MB2b
The external voltage Vcm of amplifier；Drain terminal connection the 5th biasing transistor MB3a's of the 3rd biasing transistor MB2a
Grid end and drain terminal, and be connected with the output end of the biasing circuit；The drain terminal connection of the 4th biasing transistor MB2b is described
The grid end and drain terminal of the 6th biasing transistor MB3b, and be connected with the output end of the biasing circuit；The output end output is inclined
Put voltage；
The drain terminal of source connection the 7th biasing transistor MB4a of the 5th biasing transistor MB3a；Described 6th
The drain terminal of source connection the 8th biasing transistor MB4b of biasing transistor MB3b；
The grid end and the mutual conductance of the grid end of the 7th biasing transistor MB4a and the 8th biasing transistor MB4b
The external voltage Vcm of amplifier；The source of the source of the 7th biasing transistor MB4a and the 8th biasing transistor MB4b
End ground connection.
Also, in the present embodiment, the first biasing transistor MB1a, the second biasing transistor MB1b, the 3rd biasing are brilliant
Body pipe MB2a, the 4th biasing transistor MB2b and the 9th biasing transistor PM3e are PMOS；The 5th biasing transistor
MB3a, the 6th biasing transistor MB3b, the 7th biasing transistor MB4a and the 8th biasing transistor MB4b are NMOS tube.
Wherein, Ibias can control mutual conductance output current as external bias current sources by changing the size of its value
Size.Vcm is external voltage, also referred to as bias voltage, for providing voltage bias to two pairs of symmetrical offsets simultaneously, so that
The size of control input common-mode voltage and output common mode voltage.
When implementing, the size and the other parts of trsanscondutance amplifier of the transistor in biasing circuit can be set
The size correspondence of transistor, to obtain more excellent effect.
In the present embodiment, the size that can set the first biasing transistor MB1a is equal to the chi of the first electric current source capsule PM3a
Very little and the 3rd electric current source capsule PM3c size sum, the size of the second biasing transistor MB2a is equal to the chi of the first input pipe PM1a
Very little and the 3rd input pipe PM1c size sum, the size of the 3rd biasing transistor MB3a is equal to the first cascade pipe NM1a's
Size, the size of the 4th biasing transistor MB4a be equal to the first load pipe NM2a size and the 3rd load pipe NM2c size it
With.
Wherein, the size, refers to the breadth length ratio of transistor.
As can be seen that the present embodiment provide trsanscondutance amplifier, its input stage include by the first input pipe, second be input into
The Double deference that pipe, the 3rd input pipe and the 4th input pipe are constituted to structure, and, managed by the first feedback, the second feedback pipe, the 3rd anti-
The source negative feedback structure that feedback pipe and the 4th feedback pipe are constituted, by Double deference to structures counter electric current cubic non-linearity, leads to
That crosses that source negative feedback structure suppresses that the reason because mismatch and electron mobility are degenerated etc. causes is non-linear, so that with higher
The linearity.
In another embodiment of the present invention, there is provided a kind of filtering of the trsanscondutance amplifier including described in above-described embodiment
Device, because the input stage of trsanscondutance amplifier is included by the first input pipe, the second input pipe, the 3rd input pipe and the 4th input pipe
The Double deference of composition to structure, and, managed by the first feedback, the second feedback pipe, the 3rd feedback pipe and the 4th source that constitutes of feedback pipe
Pole negative feedback structure, by Double deference to structures counter electric current cubic non-linearity, suppressed by source negative feedback structure because
It is non-linear that the reason such as mismatch and electron mobility degeneration causes, so that with the linearity higher.
Various pieces are described by the way of progressive in this specification, and what each some importance was illustrated is and other parts
Difference, between various pieces identical similar portion mutually referring to.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or uses the present invention.
Various modifications to these embodiments will be apparent for those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, the present invention
The embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase one
The scope most wide for causing.
Claims (9)
1. a kind of trsanscondutance amplifier, it is characterised in that including：Input stage and the load circuit being connected with the input stage；
The input stage includes：
First electric current source capsule (PM3a), the second electric current source capsule (PM3b), the 3rd electric current source capsule (PM3c), the 4th electric current source capsule
And the 5th electric current source capsule (PM3e) (PM3d)；
First input pipe (PM1a), the second input pipe (PM1b), the 3rd input pipe (PM1c) and the 4th input pipe (PM1d), its
In, equal sized, the 3rd input pipe (PM1c) of first input pipe (PM1a) and second input pipe (PM1b)
It is equal sized with the 4th input pipe (PM1d)；
First feedback pipe (PM2a), the second feedback pipe (PM2b), the 3rd feedback pipe (PM2c) and the 4th feedback pipe (PM2d), its
In, the first feedback pipe (PM2a) and the second feedback pipe (PM2b) it is equal sized, the 3rd feedback manages (PM2c) and described the
Four feedbacks manage the equal sized of (PM2d)；
The grid end of the first electric current source capsule (PM3a), the grid end of the second electric current source capsule (PM3b), the 3rd current source
The grid end of the grid end and the 4th electric current source capsule (PM3d) of managing (PM3c) connects the bias current sources of the trsanscondutance amplifier, source
The supply voltage of the end connection trsanscondutance amplifier；
The grid end and drain terminal of the 5th electric current source capsule (PM3e) connect the bias current sources of the trsanscondutance amplifier, source connection
The supply voltage of the trsanscondutance amplifier；
The grid end of first input pipe (PM1a) and the grid end of the 4th input pipe (PM1d) lead amplifier with described collapsing
Normal phase input end is connected；The grid end of second input pipe (PM1b) and the grid end of the 3rd input pipe (PM1c) with it is described across
Lead the negative-phase input connection of amplifier；
The drain terminal connection of the drain terminal of first input pipe (PM1a) and the 3rd input pipe (PM1c), and with it is described collapse to lead put
The positive output end connection of big device；The drain terminal of second input pipe (PM1b) and the drain terminal of the 4th input pipe (PM1d) connect
Connect, and be connected with the negative output end of the trsanscondutance amplifier；
The drain terminal connection of the source of first input pipe (PM1a) and the first electric current source capsule (PM3a), and with described first
The source connection of the drain terminal of feedback pipe (PM2a) and the second feedback pipe (PM2b)；The source of second input pipe (PM1b) and institute
State the drain terminal connection of the second electric current source capsule (PM3b), and source and the second feedback pipe with the described first feedback pipe (PM2a)
(PM2b) drain terminal connection；The source of the 3rd input pipe (PM1c) and the drain terminal of the 3rd electric current source capsule (PM3c) connect
Connect, and the source of the drain terminal and the 4th feedback pipe (PM2d) for managing (PM2c) with the described 3rd feedback is connected；4th input pipe
(PM1d) the drain terminal connection of source and the 4th electric current source capsule (PM3d), and the source of (PM2c) is managed with the described 3rd feedback
Drain terminal with the 4th feedback pipe (PM2d) is connected；
The grid end of first feedback pipe (PM2a) and the grid end of the 4th feedback pipe (PM2d) are connecting the trsanscondutance amplifier just
Phase input；The grid end of second feedback pipe (PM2c) and the grid end of the 3rd feedback pipe (PM2d) connect the trsanscondutance amplifier
Negative-phase input.
2. trsanscondutance amplifier according to claim 1, it is characterised in that the first electric current source capsule (PM3a), described
Two electric current source capsules (PM3b), the 3rd electric current source capsule (PM3c), the 4th electric current source capsule (PM3d), the 5th current source
It is pipe (PM3e), first input pipe (PM1a), second input pipe (PM1b), the 3rd input pipe (PM1c), described
4th input pipe (PM1d), first feedback pipe (PM2a), second feedback pipe (PM2b), the 3rd feedback pipe
(PM2c) manage (PM2d) and be PMOS with the 4th feedback.
3. trsanscondutance amplifier according to claim 1, it is characterised in that the load circuit includes：
First cascade pipe (NM1a), the second cascade pipe (NM1b), the first load pipe (NM2a), the second load pipe
(NM2b), the 3rd load pipe (NM2c) and the 4th load pipe (NM2d), wherein, the first cascade pipe (NM1a) and described
Equal sized, first load pipe (NM2a), the second load pipe (NM2b), the 3rd load of the second cascade pipe (NM1b)
Pipe (NM2c) and the 4th load pipe (NM2d) it is equal sized；
The drain terminal of the first cascade pipe (NM1a) connects the negative output end of the trsanscondutance amplifier；Second common source
The drain terminal of bank tube (NM1b) connects the positive output end of the trsanscondutance amplifier altogether；The grid of the first cascade pipe (NM1a)
The grid end of end and the second cascade pipe (NM1b) connects the bias voltage of the trsanscondutance amplifier；
The drain terminal of first load pipe (NM2a) and the drain terminal of second load pipe (NM2b) connect first common source and are total to
The source of bank tube (NM1a)；The drain terminal of the 3rd load pipe (NM2c) and the drain terminal connection institute of the 4th load pipe (NM2d)
State the source of the second cascade pipe (NM1b)；
The grid end of first load pipe (NM2a) and the grid end of the 3rd load pipe (NM2c) connect the trsanscondutance amplifier
Negative output end；The grid end of the grid end of the second load pipe (NM2b) and the 4th load pipe (NM2d) connects the trsanscondutance amplifier
Positive output end；
The source of first load pipe (NM2a), the source of second load pipe (NM2b), the 3rd load pipe
(NM2c) source and the source ground connection of the 4th load pipe (NM2d).
4. trsanscondutance amplifier according to claim 3, it is characterised in that the first cascade pipe (NM1a), second
Cascade pipe (NM1b), the first load pipe (NM2a), the second load pipe (NM2b), the 3rd load pipe (NM2c) and the 4th load
Pipe (NM2d) is NMOS tube.
5. trsanscondutance amplifier according to claim 3, it is characterised in that also include：
The biasing circuit of bias voltage is provided for the trsanscondutance amplifier；
The biasing circuit includes：First biasing transistor (MB1a), the second biasing transistor (MB1b), the 3rd biasing transistor
(MB2a), the 4th biasing transistor (MB2b), the 5th biasing transistor (MB3a), the 6th biasing transistor (MB3b), the 7th inclined
Put transistor (MB4a), the 8th biasing transistor (MB4b) and the 9th biasing transistor (PM3e)；
Wherein, equal sized, the 3rd biasing transistor of the first biasing transistor (MB1a) and the second biasing transistor (MB1b)
(MB2a) and the 4th biasing transistor (MB2b) it is equal sized, the 5th biasing transistor (MB3a) and the 6th biases transistor
(MB3b) equal sized, the 7th biasing transistor (MB4a) and the 8th biases the equal sized of transistor (MB4b)；
The grid end and drain terminal of the 9th biasing transistor (PM3e) connect the bias current sources of the trsanscondutance amplifier, and source connects
Connect the supply voltage of the trsanscondutance amplifier；
The grid end of first biasing transistor (MB1a) and the grid end and the described 9th of second biasing transistor (MB1b)
The grid end connection of biasing transistor (PM3e)；The source of first biasing transistor (MB1a) and the second biasing transistor
(MB1b) supply voltage of source and the trsanscondutance amplifier；The drain terminal connection of first biasing transistor (MB1a) is described
The source of the 3rd biasing transistor (MB2a)；Drain terminal connection the 4th biasing crystal of second biasing transistor (MB1b)
Manage the source of (MB2b)；
The grid end and the mutual conductance of the grid end of the 3rd biasing transistor (MB2a) and the 4th biasing transistor (MB2b)
The external voltage of amplifier；Drain terminal connection the 5th biasing transistor (MB3a) of the 3rd biasing transistor (MB2a)
Grid end and drain terminal, and be connected with the output end of the biasing circuit；The drain terminal connection institute of the 4th biasing transistor (MB2b)
The grid end and drain terminal of the 6th biasing transistor (MB3b) are stated, and is connected with the output end of the biasing circuit；The output end is defeated
Go out bias voltage；
The drain terminal of source connection the 7th biasing transistor (MB4a) of the 5th biasing transistor (MB3a)；Described 6th
The drain terminal of source connection the 8th biasing transistor (MB4b) of biasing transistor (MB3b)；
The grid end and the mutual conductance of the grid end of the 7th biasing transistor (MB4a) and the 8th biasing transistor (MB4b)
The external voltage of amplifier；The source of the 7th biasing transistor (MB4a) and the source of the 8th biasing transistor (MB4b)
End ground connection.
6. trsanscondutance amplifier according to claim 5, it is characterised in that the 5th electric current source capsule is multiplexed with the described 9th
Biasing transistor (PM3e).
7. the trsanscondutance amplifier according to claim 5 or 6, it is characterised in that
It is first biasing transistor (MB1a), the second biasing transistor (MB1b), the 3rd biasing transistor (MB2a), the 4th inclined
It is PMOS to put transistor (MB2b) and the 9th biasing transistor (PM3e)；
5th biasing transistor (MB3a), the 6th biasing transistor (MB3b), the 7th biasing transistor (MB4a) and the 8th
Biasing transistor (MB4b) is NMOS tube.
8. trsanscondutance amplifier according to claim 7, it is characterised in that
The size of first biasing transistor (MB1a) is equal to the size and the described 3rd of the first electric current source capsule (PM3a)
The size sum of electric current source capsule (PM3c), the size of second biasing transistor (MB2a) is equal to first input pipe
(PM1a) size and the size sum of the 3rd input pipe (PM1c), size of the 3rd biasing transistor (MB3a) etc.
In the size of the first cascade pipe (NM1a), the size of the 4th biasing transistor (MB4a) is negative equal to described first
Carry the size of pipe (NM2a) and the size sum of the 3rd load pipe (NM2c).
9. a kind of wave filter, it is characterised in that including the trsanscondutance amplifier described in any one of claim 1 to 8.
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