CN106898553A - 一种鳍式场效应晶体管及其制备方法 - Google Patents
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- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 238000002353 field-effect transistor method Methods 0.000 title abstract description 5
- 239000001301 oxygen Substances 0.000 claims abstract description 25
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 25
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims description 33
- 239000004065 semiconductor Substances 0.000 claims description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 12
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- 238000007254 oxidation reaction Methods 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 10
- 238000001312 dry etching Methods 0.000 claims description 9
- 230000003647 oxidation Effects 0.000 claims description 9
- 238000001259 photo etching Methods 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- 230000005669 field effect Effects 0.000 claims description 8
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- IWTIUUVUEKAHRM-UHFFFAOYSA-N germanium tin Chemical compound [Ge].[Sn] IWTIUUVUEKAHRM-UHFFFAOYSA-N 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 238000003786 synthesis reaction Methods 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 238000000671 immersion lithography Methods 0.000 claims description 2
- 238000002955 isolation Methods 0.000 claims description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 229910003978 SiClx Inorganic materials 0.000 claims 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- 229910052757 nitrogen Inorganic materials 0.000 claims 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 abstract description 5
- 230000017525 heat dissipation Effects 0.000 abstract description 4
- 239000012212 insulator Substances 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 230000037230 mobility Effects 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 7
- 238000000151 deposition Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- OPTOQCQBJWTWPN-UHFFFAOYSA-N [Si].[Ge].[Si] Chemical compound [Si].[Ge].[Si] OPTOQCQBJWTWPN-UHFFFAOYSA-N 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000001451 molecular beam epitaxy Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- QWOHRPUHQYJPLB-UHFFFAOYSA-N [Si]=O.[O] Chemical compound [Si]=O.[O] QWOHRPUHQYJPLB-UHFFFAOYSA-N 0.000 description 1
- 239000012190 activator Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- -1 silicon nitrides Chemical class 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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Abstract
本发明公布了一种鳍式场效应晶体管及其制备方法。该器件采用高迁移率沟道材料,可以提高开态电流;在Fin条底部引入局域埋氧层,形成了体在绝缘层上(Body‑on‑Insulator,BOI)结构,切断了源漏间的泄漏电流通道,能够有效抑制泄漏电流,并且比SOI(/SGOI/GOI)FinFET具有更小的埋氧层面积,改善了散热问题。
Description
技术领域
本发明涉及一种鳍式场效应晶体管及其制备方法,属于超大规模集成电路制造技术领域。
背景技术
随着集成电路的迅速发展,半导体器件的特征尺寸不断缩小。当特征尺寸进入纳米尺度,传统硅基平面器件面临短沟道效应严重、迁移率退化等问题。因此,人们从新器件结构、新沟道材料等方面提出了一些解决方案。鳍式场效应晶体管(FinFET)能够有效抑制短沟道效应,具有栅控能力强、开态电流大、与CMOS工艺兼容等优点,已在产业界得到应用。
对于体硅FinFET,在Fin条底部存在源漏泄漏电流通道,泄漏电流较大,导致静态功耗增大。SOI FinFET能够更好地抑制短沟道效应和泄漏电流,但是由于氧化硅埋氧层的热导率约为硅的1%,导致器件散热性较差。
发明内容
针对以上问题,本发明提出了一种鳍式场效应晶体管及其制备方法,该器件采用高迁移率沟道材料,可以提高开态电流;在Fin条底部引入局域埋氧层,形成了体在绝缘层上(Body-on-Insulator,BOI)结构,切断了源漏间的泄漏电流通道,能够有效抑制泄漏电流,并且比SOI(/SGOI/GOI)FinFET具有更小的埋氧层面积,改善了散热问题。
本发明提供的鳍式场效应晶体管,包括半导体衬底,在半导体衬底上具有凸起的Fin条,在Fin条侧壁和顶部表面具有横跨Fin条的栅极结构,与栅极结构接触的Fin条部分构成沟道区,其特征在于,沟道区为高迁移率材料,沟道长度小于Fin条长度;源、漏位于沟道区两端;Fin条两端的半导体与衬底相连;Fin条与半导体衬底之间有一层局域埋氧层,形成BOI结构,该局域埋氧层的宽度大于或等于Fin条宽度。
本发明的鳍式场效应晶体管中,沟道区的高迁移率材料例如锗、锗硅、锗锡等。
本发明还提供了一种鳍式场效应晶体管的制备方法,包括以下步骤:
1)在半导体衬底上形成采用高迁移率材料的凸起Fin条;
2)在Fin条与半导体衬底之间形成局域埋氧层,该局域埋氧层的宽度大于或等于Fin条宽度;
3)在所述Fin条侧壁和顶部表面形成栅极结构,并在栅极结构的侧面形成侧墙;
4)光刻定义源漏区图形,掺杂并退火形成源漏。
上述制备方法中,步骤1)中所述半导体衬底常用的为体硅衬底,但不局限于体硅衬底,形成Fin条的方法具体可包括:
1-1)在半导体衬底上生长高迁移率材料的半导体外延层;
1-2)定义器件有源区,并形成器件之间的隔离;
1-3)在步骤1-1)形成的半导体外延层上淀积硬掩膜,光刻定义Fin条图形,干法刻蚀硬掩膜和半导体外延层,停止在衬底表面,去掉光刻胶,形成Fin条。
所述步骤1-1)中所述半导体外延层的材料包括锗、锗硅、锗锡等,但不局限于上述外延材料,可为其他高迁移率材料,厚度可以为5~200nm,其厚度决定了Fin条的高度。
所述步骤1-1)中生长半导体外延层的工艺可以采用分子束外延(Molecule BeamEpitaxy,MBE)、化学气相淀积(Chemical Vapor Deposition,CVD)等方法。
所述步骤1-3)中,硬掩膜可以是氧化硅层、氮化硅层、氧化硅/氮化硅叠层等,但不局限于上述材料,但应具有较好的保形性。淀积硬掩膜的工艺可以采用低压化学气相淀积(Low Pressure Chemical Vapor Deposition,LPCVD)、等离子体增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition,PECVD)等方法。硬掩膜厚度可以为10~800nm;Fin条宽度可以为5~100nm。光刻优选为电子束光刻或193nm浸没式光刻等能形成纳米尺度线条的先进光刻技术。
上述制备方法中,步骤2)具体可包括:
2-1)在Fin条上淀积一层氮化硅,并进行干法刻蚀,形成氮化硅侧墙;
2-2)干法刻蚀半导体衬底至一定深度,然后通过热氧化使Fin条和衬底之间的半导体被氧化,形成局域埋氧层(对于体硅衬底来说,形成氧化硅绝缘层);
2-3)湿法腐蚀去掉氮化硅侧墙。
所述步骤2-2)中衬底的刻蚀深度决定了埋氧层的厚度,刻蚀深度可以为5~50nm;热氧化工艺可以采用湿氧氧化、氢氧合成氧化、等离子体氧化等,使Fin条与衬底之间的半导体(硅)完全被氧化,氧化时间应根据其宽度及其氧化速率而定。
所述步骤2-3)中,湿法腐蚀氮化硅可以采用浓磷酸溶液。
上述制备方法中,步骤3)和步骤4)为常规的工艺步骤。步骤3)包括淀积栅介质层,光刻、刻蚀形成栅电极,淀积氧化硅并刻蚀形成侧墙隔离层。步骤4)包括光刻定义源漏区图形,离子掺杂并退火形成源漏,以及后续的工艺步骤:光刻、刻蚀接触孔,溅射金属,光刻、刻蚀形成金属互连,合金,钝化等。
本发明优点如下:
1)采用高迁移率沟道材料,改善了沟道中载流子迁移率,提高了开态电流。
2)采用BOI结构,抑制了泄漏电流,降低了功耗。
与SOI(/SGOI/GOI)FinFET相比,BOI FinFET具有更小的埋氧层面积,改善了散热问题,并且在提升器件特性的同时降低了成本。
附图说明
图1为实施例制备的硅基锗硅BOIFinFET的结构示意图。
图2~图8为实施例制备硅基锗硅BOIFinFET的关键工艺步骤示意图,各图中(a)为沿图1中A-A’方向的剖面图,(b)为沿图1中B-B’方向的剖面图。
其中:1-硅衬底;2-锗硅外延层;3-作硬掩膜的氧化硅层;4-作硬掩膜的氮化硅层;5-锗硅Fin条;6-保护锗硅Fin条的氮化硅侧墙;7-氧化硅绝缘层;8-栅介质;9-栅电极;10-侧墙隔离层;11-源;12-漏。
具体实施方式
本发明的鳍式场效应晶体管采用高迁移率沟道材料,可以提高开态电流;在Fin条底部引入局域埋氧层,形成了BOI结构,切断了源漏间的泄漏电流通道,能够有效抑制泄漏电流。比SOI(/SGOI/GOI)FinFET具有更小的埋氧层面积,改善了散热问题,并且在提升器件特性的同时降低了成本。下面结合附图对本发明进行详细说明。
根据下列步骤可以实现硅基锗硅BOIFinFET:
步骤1.在P型(100)硅衬底1上MBE生长50nm锗硅外延层2,PECVD淀积300nm氧化硅,光刻、刻蚀形成有源区,去胶;
步骤2.PECVD淀积20nm氧化硅层3和50nm氮化硅层4作为硬掩膜,通过电子束光刻形成Fin条图形,Fin宽为20nm,干法刻蚀硬掩膜,露出锗硅外延层2上表面,去胶,所得结构如图2所示;
步骤3.以硬掩膜为掩蔽,干法刻蚀锗硅外延层2,露出硅衬底1上表面,形成锗硅Fin条5结构,如图3所示;
步骤4.PECVD淀积氮化硅,并进行干法刻蚀,在锗硅Fin条两侧形成氮化硅侧墙6,如图4所示;
步骤5.以硬掩膜和侧墙为掩蔽,干法刻蚀硅衬底1,刻蚀深度为20nm,如图5所示;
步骤6.通过氢氧合成对硅衬底1进行氧化,氧化温度为800℃,在锗硅Fin条下方形成氧化硅绝缘层7,如图6所示;
步骤7.浓磷酸加热170℃,腐蚀去除氮化硅,所得结构如图7所示;
步骤8.进行牺牲氧化或氢气退火等工艺来改善刻蚀造成的Fin表面损伤,淀积Al2O3/TiN,光刻、刻蚀形成栅电极9,淀积氧化硅并刻蚀形成侧墙隔离层10;
步骤9.通过光刻定义源漏区图形,P+注入对源漏进行掺杂,注入能量为20keV,注入剂量2E15cm-2,并通过RTA退火950℃,30s,激活杂质,形成源11、漏12,具体退火条件根据锗组分改变,如图8所示;
步骤10.PECVD淀积氧化硅,通过CMP实现平坦化;
步骤11.通过光刻、ICP刻蚀形成栅、源、漏各端的接触孔,去胶;
步骤12.溅射金属,光刻、刻蚀形成金属互连,合金。
综上所述,该方法采用高迁移率沟道材料,可以提高器件电流驱动能力;在Fin条底部引入局域埋氧层,形成BOI结构,可以切断源漏间的泄漏电流通道,能够有效抑制泄漏电流,并且比SOI(/SGOI/GOI)FinFET具有更小的埋氧层面积,改善了散热问题。
Claims (10)
1.一种鳍式场效应晶体管,包括半导体衬底,在半导体衬底上具有凸起的Fin条,在Fin条侧壁和顶部表面具有横跨Fin条的栅极结构,与栅极结构接触的Fin条部分构成沟道区,其特征在于,沟道区为高迁移率材料,沟道长度小于Fin条长度;源、漏位于沟道区两端;Fin条两端的半导体与衬底相连;Fin条与半导体衬底之间有一层局域埋氧层,形成BOI结构,该局域埋氧层的宽度大于或等于Fin条宽度。
2.如权利要求1所述的鳍式场效应晶体管,其特征在于,所述沟道区的高迁移率材料为锗、锗硅或锗锡。
3.一种鳍式场效应晶体管的制备方法,包括以下步骤:
1)在半导体衬底上形成采用高迁移率材料的凸起Fin条;
2)在Fin条与半导体衬底之间形成局域埋氧层,该局域埋氧层的宽度大于或等于Fin条宽度;
3)在Fin条侧壁和顶部表面形成栅极结构,并在栅极结构的侧面形成侧墙;
4)光刻定义源漏区图形,掺杂并退火形成源漏。
4.如权利要求3所述的制备方法,其特征在于,步骤1)包括:
1-1)在半导体衬底上生长高迁移率材料的半导体外延层;
1-2)定义器件有源区,并形成器件之间的隔离;
1-3)在步骤1-1)形成的半导体外延层上淀积硬掩膜,光刻定义Fin条图形,干法刻蚀硬掩膜和半导体外延层,停止在衬底表面,去掉光刻胶,形成Fin条。
5.如权利要求4所述的制备方法,其特征在于,步骤1-1)中所述半导体外延层的材料为锗、锗硅或锗锡,厚度为5~200nm。
6.如权利要求4所述的制备方法,其特征在于,步骤1-3)中,所述硬掩膜是氧化硅层、氮化硅层或氧化硅/氮化硅叠层,厚度为10~800nm。
7.如权利要求4所述的制备方法,其特征在于,步骤1-3)中的光刻采用电子束光刻或193nm浸没式光刻技术,形成宽度为5~100nm的Fin条。
8.如权利要求3所述的制备方法,其特征在于,步骤2)包括:
2-1)在Fin条上淀积一层氮化硅,并进行干法刻蚀,形成氮化硅侧墙;
2-2)干法刻蚀半导体衬底至一定深度,然后通过热氧化使Fin条和衬底之间的半导体被氧化,形成局域埋氧层;
2-3)湿法腐蚀去掉氮化硅侧墙。
9.如权利要求8所述的制备方法,其特征在于,步骤2-2)中衬底的刻蚀深度为5~50nm。
10.如权利要求7所述的制备方法,其特征在于,步骤2-2)采用湿氧氧化、氢氧合成氧化或等离子体氧化,使Fin条与衬底之间的半导体完全被氧化。
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