CN106873273A - 阵列基板及其分区驱动方法、显示模组和显示装置 - Google Patents

阵列基板及其分区驱动方法、显示模组和显示装置 Download PDF

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CN106873273A
CN106873273A CN201710099347.XA CN201710099347A CN106873273A CN 106873273 A CN106873273 A CN 106873273A CN 201710099347 A CN201710099347 A CN 201710099347A CN 106873273 A CN106873273 A CN 106873273A
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array substrate
gate
gate electrode
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thin film
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CN106873273B (zh
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张慧
韩承佑
林允植
张舜航
韩明夫
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BOE Technology Group Co Ltd
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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Abstract

本发明提供的阵列基板及其分区驱动方法、显示模组和显示装置，该阵列基板的显示区域包括至少两个分区；阵列基板包括第二栅电极和第一栅电极；在按正常时序向各个第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。本发明提供的阵列基板，其实现面板分区驱动的方式更简单，而且可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均的风险。

Description

阵列基板及其分区驱动方法、显示模组和显示装置
技术领域
本发明涉及显示装置加工技术领域，具体地，涉及一种阵列基板及其分区驱动方法、显示模组和显示装置。
背景技术
薄膜晶体管(Thin-film transistor，简称TFT)是场效应晶体管的种类之一，其包括源极(Source Electrode)、漏极(Drain Electrode)和有源区(Active Area)，其中，源极与数据线(Data Line)相连；漏极与像素电极相连；栅极与栅线(Gate Line)相连；有源区由半导体材料构成，其通常为非晶硅、多晶硅、金属氧化物半导体等。
在实际应用中，为了降低显示面板的功耗，可以对显示面板的分辨率以及刷新频率进行分区控制，例如，可以将人眼关注的区域以正常的分辨率和刷新频率显示，而其余区域则降低分辨率和刷新频率显示。如图1所示，为现有的一种阵列基板的分区示意图。将阵列基板的显示区域划分为3×3个分区即，第一分区1～第九分区9，与之相对应的，按照分区将同一行的栅线断开成三段，例如将栅线10分成三个分段(101、102、103)，并利用三组GOA(Gate Driver on Array，阵列基板行驱动)电路11独立控制。
但是，由于上述阵列基板额外增设了一组GOA电路11，并且还需要增加第五分区5与GOA输出端之间的跨线连接，这不仅增加了工艺难度和面板设计的复杂度，导致成本增加，而且很容易在各个分区的栅线之间产生延迟差异，从而造成了区域亮度不均(blogmura)。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一，提出了一种阵列基板及其分区驱动方法、显示模组和显示装置，其不仅实现面板分区驱动的方式更简单，而且可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均(blogmura)的风险。
为实现本发明的目的而提供一种阵列基板，所述阵列基板的显示区域包括至少两个分区；所述阵列基板包括栅驱动单元、第一栅电极和第二栅电极；
所述栅驱动单元用于在按正常时序向各个所述第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有所述第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。
优选的，所述栅驱动单元包括第一栅线和第二栅线，其中，
所述第一栅电极与第一栅线连接；
所述第二栅线的数量与所述分区的数量相对应，且各个所述第二栅线分别与对应分区内的所有所述第二栅电极连接。
优选的，所述栅驱动单元还包括第一驱动电路和第二驱动电路，其中，
所述第一驱动电路设置在所述阵列基板的显示面板两侧或一侧，用于按正常时序向各个所述第一栅电极输入所述第一电压；
所述第二驱动电路集成在外接的集成电路中，用于选择性地向位于其中至少一个分区内的所有所述第二栅电极输入所述第二电压。
优选的，所述阵列基板还包括玻璃基板、栅绝缘层、有源层、源漏电极层和保护层；
所述玻璃基板、所述第一栅电极、所述栅绝缘层、所述有源层、所述源漏电极层、所述保护层和所述第二栅电极由下而上依次设置；或者，
所述玻璃基板、所述第二栅电极、所述栅绝缘层、所述有源层、所述源漏电极层、所述保护层和所述第一栅电极由下而上依次设置。
优选的，所述第一栅电极和第二栅电极均采用透明导电材料制作。
优选的，所述阵列基板的显示区域包括九个分区，且以3×3的行列数阵列分布。
作为另一个技术方案，本发明还提供一种显示模组，包括阵列基板，所述阵列基板采用本发明提供的上述阵列基板。
作为另一个技术方案，本发明还提供一种显示装置，包括显示模组，所述显示模组采用本发明提供的上述显示模组。
作为另一个技术方案，本发明还提供一种显阵列基板的分区驱动方法，所述阵列基板的显示区域包括至少两个分区，所述阵列基板包括第二栅电极和第一栅电极；所述分区驱动方法包括：
在按正常时序向各个所述第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有所述第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。
本发明具有以下有益效果：
本发明提供的阵列基板及其分区驱动方法、显示模组和显示装置的技术方案中，在阵列基板中设置双栅电极，即，第一栅电极和第二栅电极。并且，借助栅驱动单元在按正常时序向各个第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压，从而实现对显示面板的分辨率以及刷新频率进行分区控制。由于无需增设GOA电路及跨线连接的设置，从而不仅实现面板分区驱动的方式更简单，而且无需对栅线进行分段，从而可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均(blog mura)的风险。
附图说明
图1为现有的一种阵列基板的分区示意图；
图2为本发明实施例提供的阵列基板的分区示意图；
图3为本发明实施例提供的阵列基板的结构图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图来对本发明提供的阵列基板及其分区驱动方法、显示模组和显示装置进行详细描述。
本发明提供的阵列基板，其显示区域包括至少两个分区。该阵列基板包括栅驱动单元、第二栅电极和第一栅电极。该栅驱动单元在按正常时序向各个第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。所谓正常时序，是指轮流控制各行或各列薄膜晶体管打开的一种控制时序。
当向栅极输入上述第一电压时，有源区导电，源极与漏极导通，此时薄膜晶体管打开，可将数据线信号传递到像素电极上；反之，当向栅极输入上述第二电压时，有源区不导电，源极与漏极断开，此时薄膜晶体管关断，数据线信号被阻断。在实际应用中，对于n型薄膜晶体管，上述第一电压为第一电压；上述第二电压为第二电压或者电压为零。
基于该原理，本发明提供的阵列基板，其通过设置双栅电极，即，第一栅电极和第二栅电极。其中，栅驱动单元按正常时序向各个第一栅电极输入第一电压；同时，选择性地向位于其中至少一个分区内的所有第二栅电极输入第二电压，被输入第二电压的第二栅电极所在的分区中数据线信号被阻断，而其余分区中数据线信号按正常时序刷新，从而实现对显示面板的分辨率以及刷新频率进行分区控制。由于无需增设GOA电路及跨线连接的设置，从而实现面板分区驱动的方式更简单，而且无需对栅线进行分段，从而可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均(blog mura)的风险。
下面对本提供的阵列基板的具体实施方式进行详细描述。具体地，图2为本发明实施例提供的阵列基板的分区示意图。图3为本发明实施例提供的阵列基板的结构图。请一并参阅图2和图3，在本实施例中，阵列基板由下而上依次包括玻璃基板14、第一栅电极15、栅绝缘层16、有源层17、源极层18、保护层19和第二栅电极20。其中，第一栅电极15和第二栅电极20均可以采用透明导电材料制作。
当栅驱动单元向各个第一栅电极15输入第一电压时，薄膜晶体管打开，若此时栅驱动单元向与该薄膜晶体管相连的第二栅电极20输入第二电压，可以使薄膜晶体管的截止电压正向漂移至10V以上，从而使薄膜晶体管关断。由此，被输入第二电压的第二栅电极20所在的分区中的所有的薄膜晶体管关断，数据线信号被阻断，而其余分区中数据线信号按正常时序刷新，从而实现对显示面板的分辨率以及刷新频率进行分区控制。当然，在实际应用中，第一栅电极15和第二栅电极20的位置还可以互换，即，玻璃基板14、第二栅电极20、栅绝缘层16、有源层17、源极层18、保护层19和第一栅电极15由下而上依次设置。
在本实施例中，如图2所示，阵列基板的显示区域被划分为9个分区，且以3×3的行列数呈矩形阵列分布，即，第一分区1～第九分区9。而且，栅驱动单元还包括第二栅线、第一栅线121、第一驱动电路122和第二驱动电路(图中未示出)，其中，第一栅电极与第一栅线121连接；第二栅线的数量与分区的数量相对应，均为9个，且各个第二栅线(131～139)一一对应地与各个分区(第一分区1～第九分区9)内的所有第二栅电极连接。第一驱动电路122设置在阵列基板的显示面板两侧或一侧，用于按正常时序向各个第一栅电极输入第一电压。第二驱动电路集成在外接的集成电路(IC电路)中，用于选择性地向位于其中至少一个分区内的所有第二栅电极输入第二电压，以关断或者打开该分区内的所有薄膜晶体管。在实际应用中，可以根据具体情况设定分区的数量和方式，本发明对此没有特别的限制。
由上可知，与现有技术相比，本发明实施例提供的阵列基板，其无需增设GOA电路及跨线连接的设置，从而实现面板分区驱动的方式更简单，而且无需对栅线进行分段，从而可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均(blog mura)的风险。
作为另一个技术方案，本发明实施例还提供一种显示模组，包括阵列基板，该阵列基板采用了本发明实施例提供的上述阵列基板。
本发明实施例提供的显示模组，其通过采用本发明实施例提供的上述阵列基板，不仅实现面板分区驱动的方式更简单，而且可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均的风险。
作为另一个技术方案，本发明实施例还提供一种显示装置，包括显示模组，该阵列基板采用本发明实施例提供的上述显示模组。
本发明实施例提供的显示装置，其通过采用本发明实施例提供的上述显示模组，不仅实现面板分区驱动的方式更简单，而且可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均的风险。
作为另一个技术方案，本发明实施例还提供一种阵列基板的分区驱动方法，该阵列基板的显示区域包括至少两个分区。该阵列基板包括第二栅电极和第一栅电极，其具体结构如图3所示，由于在上述实施例中已有了详细描述，在此不再赘述。
阵列基板的分区驱动方法包括：
在按正常时序向各个第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。
本发明实施例提供的阵列基板的分区驱动方法，其在实现对显示面板的分辨率以及刷新频率进行分区控制的同时，无需增设GOA电路及跨线连接的设置，从而实现面板分区驱动的方式更简单，而且无需对栅线进行分段，从而可以改善在各个分区的栅线之间产生延迟差异的情况，进而降低了产生区域亮度不均的风险。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (9)

1.一种阵列基板，所述阵列基板的显示区域包括至少两个分区；其特征在于，所述阵列基板包括栅驱动单元、第一栅电极和第二栅电极；
所述栅驱动单元用于在按正常时序向各个所述第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有所述第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。
2.根据权利要求1所述的阵列基板，其特征在于，所述栅驱动单元包括第一栅线和第二栅线，其中，
所述第一栅电极与第一栅线连接；
所述第二栅线的数量与所述分区的数量相对应，且各个所述第二栅线分别与对应分区内的所有所述第二栅电极连接。
3.根据权利要求1或2所述的阵列基板，其特征在于，所述栅驱动单元还包括第一驱动电路和第二驱动电路，其中，
所述第一驱动电路设置在所述阵列基板的显示面板两侧或一侧，用于按正常时序向各个所述第一栅电极输入所述第一电压；
所述第二驱动电路集成在外接的集成电路中，用于选择性地向位于其中至少一个分区内的所有所述第二栅电极输入所述第二电压。
4.根据权利要求1或2所述的阵列基板，其特征在于，所述阵列基板还包括玻璃基板、栅绝缘层、有源层、源漏电极层和保护层；
所述玻璃基板、所述第一栅电极、所述栅绝缘层、所述有源层、所述源漏电极层、所述保护层和所述第二栅电极由下而上依次设置；或者，
所述玻璃基板、所述第二栅电极、所述栅绝缘层、所述有源层、所述源漏电极层、所述保护层和所述第一栅电极由下而上依次设置。
5.根据权利要求4所述的阵列基板，其特征在于，所述第一栅电极和第二栅电极均采用透明导电材料制作。
6.根据权利要求1或2所述的阵列基板，其特征在于，所述阵列基板的显示区域包括九个分区，且以3×3的行列数阵列分布。
7.一种显示模组，包括阵列基板，其特征在于，所述阵列基板采用权利要求1-6任意一项所述的阵列基板。
8.一种显示装置，包括显示模组，其特征在于，所述显示模组采用权利要求7所述的显示模组。
9.一种阵列基板的分区驱动方法，所述阵列基板的显示区域包括至少两个分区，其特征在于，所述阵列基板包括第二栅电极和第一栅电极；所述分区驱动方法包括：
在按正常时序向各个所述第一栅电极输入可打开薄膜晶体管的第一电压的同时，选择性地向位于其中至少一个分区内的所有所述第二栅电极输入可关断或者打开该分区内的所有薄膜晶体管的第二电压。
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