CN106873272A - A kind of liquid crystal display panel of multi-domain vertical orientation mode and preparation method thereof - Google Patents
A kind of liquid crystal display panel of multi-domain vertical orientation mode and preparation method thereof Download PDFInfo
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 48
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 238000009826 distribution Methods 0.000 claims abstract description 120
- 239000003990 capacitor Substances 0.000 claims abstract description 74
- 239000010409 thin film Substances 0.000 claims abstract description 35
- 238000005530 etching Methods 0.000 claims abstract description 19
- 238000003860 storage Methods 0.000 claims abstract description 10
- 239000011800 void material Substances 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 48
- 239000002184 metal Substances 0.000 claims description 24
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 11
- 230000005611 electricity Effects 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 9
- 238000002161 passivation Methods 0.000 claims description 9
- 239000010408 film Substances 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 230000008878 coupling Effects 0.000 claims description 5
- 238000010168 coupling process Methods 0.000 claims description 5
- 238000005859 coupling reaction Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 239000003989 dielectric material Substances 0.000 claims description 4
- 239000012212 insulator Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 239000012528 membrane Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 238000004062 sedimentation Methods 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims description 2
- 230000001795 light effect Effects 0.000 claims 1
- 230000035515 penetration Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 10
- 230000008569 process Effects 0.000 description 9
- 238000010276 construction Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000001808 coupling effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
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- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
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Abstract
The invention discloses a kind of liquid crystal display panel of multi-domain vertical orientation mode and preparation method thereof, liquid crystal display panel includes array base palte, array base palte is provided with multiple pixel cells, each pixel cell includes the first pixel electrode and the second pixel electrode, and it forms storage capacitance with public electrode distribution respectively；In each pixel cell, first pixel electrode is configured to be electrically connected with the drain electrode of thin film transistor (TFT), and is electrically connected with coupled capacitor distribution；Second pixel electrode is configured to form coupled capacitor with coupled capacitor distribution；Public electrode distribution is Chong Die with the first pixel electrode and the second pixel electrode, public electrode distribution is provided with the void region for accommodating coupled capacitor distribution below the second pixel electrode, coupled capacitor distribution and public electrode distribution insulate, public electrode distribution by etching after transparency conducting layer formed.Liquid crystal panel Penetration ration and display quality can simultaneously be improved using this programme.
Description
Technical field
The present invention relates to technical field of liquid crystal display, more particularly to a kind of multi-domain vertical orientation mode liquid crystal panel and its
Preparation method.
Background technology
The features such as liquid crystal display has Low emissivity, low-power consumption and small volume, is increasingly becoming the main flow of display device, extensively
It is general to apply on the products such as mobile phone, notebook computer, flat panel TV.
In order to obtain visual angle high and display quality high, common MVA (Multi-domain Vertical
Alignment, multi-domain vertical alignment) display panel using 4 farmlands (Domain) display structure.Fig. 1 is aobvious for existing 4 farmland MVA
Show panel construction schematic diagram, as shown in figure 1, gate line (Gate) 101, data wire (Data) 102, public electrode wire (Com)
103rd, thin film transistor (TFT) (TFT) 104, pixel electrode (ITO) 105 constitutes a basic dot structure.Wherein pixel electrode sets
The structure with otch 106 is counted into, pixel electrode is cut into multiple regions, coordinate the orientation thrust on color film (CF) substrate
(Protrusion), so as to form the display structure on 4 farmlands.In the display structure, public electrode and pixel electrode form storage
Electric capacity, for keeping pixel voltage and reducing feedthrough (Feed Through) voltage.Increase storage capacitance and be favorably improved display
Quality, but increase public electrode area can reduce transmitance.
The deficiencies in the prior art are：The display quality and transmitance of display panel can not simultaneously be improved.
The content of the invention
For above-mentioned technical problem, the invention provides a kind of liquid crystal display panel of multi-domain vertical orientation mode, its bag
Array base palte is included, multiple pixel cells are provided with the array base palte, be wherein provided with film crystal in each pixel cell
Pipe, coupled capacitor distribution and public electrode distribution,
Each pixel cell includes first sub-pixel unit with the first pixel electrode and with the second sub-pixel electricity
Second sub-pixel unit of pole, the first pixel electrode and the second pixel electrode form with the public electrode distribution deposit respectively
Storing up electricity is held；
In each pixel cell, first pixel electrode is configured to electrically connect with the drain electrode of thin film transistor (TFT)
Connect, and be electrically connected with the coupled capacitor distribution；Second pixel electrode is configured to the coupled capacitor with linear
Into coupled capacitor；
The public electrode distribution covers the whole pixel region of the pixel cell, and the public electrode distribution is described
Second pixel electrode lower section is provided with the void region for accommodating the coupled capacitor distribution, the coupled capacitor distribution and institute
The insulation of public electrode distribution is stated, and the public electrode distribution is formed by transparency conducting layer.
In one embodiment, the transparency conducting layer after the coupled capacitor distribution is by etching is formed, and the coupling electricity
Hold distribution to be set with layer with the public electrode distribution.
In one embodiment, the gate wirings of the thin film transistor (TFT) include transparency conducting layer and gate metal.
In one embodiment, the drain electrode of the thin film transistor (TFT) is communicated with the first via, and the coupled capacitor distribution connects
The second via is connected with, first pixel electrode is electrically connected by first via and the drain electrode of the thin film transistor (TFT)
Connect, and first pixel electrode is electrically connected with by second via with the coupled capacitor distribution.
In one embodiment, also including color membrane substrates, ridge projections thing is provided with the color membrane substrates.
In one embodiment, the pixel electrode on the array base palte is provided with otch.
In one embodiment, first sub-pixel unit is formed by the ridge projections thing and/or otch and is divided into
First viewing area in multiple farmland areas；Second sub-pixel unit is formed by the ridge projections thing and/or otch and divided
It is second viewing area in multiple farmland areas.
According to another aspect of the present invention, a kind of making of the liquid crystal display panel of multi-domain vertical orientation mode is additionally provided
Method, comprises the following steps：
After layer of transparent conductive material formation transparency conducting layer is deposited on substrate, successive sedimentation gate metal forms grid
Metal level；
Transparency conducting layer and gate metal layer are performed etching using many gray-level mask techniques, the gate metal layer of pixel region
The transparency conducting layer exposed after etching away forms public electrode distribution and coupled capacitor distribution, the thin film transistor region after etching
Transparency conducting layer and gate metal layer form the gate wirings of double-decker；Wherein, the public electrode distribution is described second
Pixel electrode lower section is provided with the void region for accommodating the coupled capacitor distribution, the coupled capacitor distribution and the public affairs
Common electrode distribution insulate；
One layer of gate dielectric materials of deposition form gate insulator；
Semiconductor layer technique and source-drain electrode technique are carried out, after forming active layer, data wire and source-drain electrode, one layer of passivation is deposited
Material forms passivation layer；
Via technique is carried out, wherein, the drain electrode is communicated with the first via, and the coupled capacitor distribution is communicated with the second mistake
Hole so that first pixel electrode is electrically connected with by first via with the drain electrode of the thin film transistor (TFT), and logical
Second via is crossed to be electrically connected with the coupled capacitor distribution；
Pixel region on the passivation layer forms at least two independent pixel electrodes using transparent conductive material, often
One pixel electrode forms a storage capacitance with the public electrode distribution respectively, and the second pixel electrode is configured to and institute
State coupled capacitor distribution and form coupled capacitor.
In one embodiment, many gray-level mask techniques include：
Half-exposure is carried out using semi-permeable film；
Or, producing the slit below exposure machine resolution, the light source of some is covered by the slit position, to reach
Half-exposure effect.
Compared with prior art, one or more embodiments of the invention can have the following advantages that：
First, in the liquid crystal display panel that the present invention is provided, it is improved by existing dot structure, form many
Individual viewing area, improves the display quality of display panel, and public electrode distribution using the transparency conducting layer shape of high transmittance
Into improve the transmitance of display panel, namely improve the transmitance and display quality of display panel simultaneously.
Second, in the preparation method of the liquid crystal display panel that the present invention is provided, 1 road light is passed through using many gray-level mask techniques
Cover is performed etching to transparency conducting layer and gate metal layer, the transparency conducting layer that the gate metal layer of pixel region is exposed after etching away
Form public electrode distribution and coupled capacitor distribution, the transparency conducting layer and gate metal layer shape of the thin film transistor region after etching
Into the gate wirings of double-decker, process costs are saved.
Other features and advantages of the present invention will be illustrated in the following description, also, the partly change from specification
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, with reality of the invention
Apply example to be provided commonly for explaining the present invention, be not construed as limiting the invention.In the accompanying drawings：
Fig. 1 is existing 4 farmland MVA display panel structure schematic diagrames；
Fig. 2 a are 8 farmland MVA display panel structure schematic diagrames according to a first embodiment of the present invention；
Fig. 2 b are pixel electrode structure schematic diagrames according to a first embodiment of the present invention；
Fig. 3 is the preparation method stream of the liquid crystal display panel of multi-domain vertical orientation mode according to a second embodiment of the present invention
Cheng Tu；
Fig. 4 a are the cross-sectional views of liquid crystal display panel pixel region according to a second embodiment of the present invention；
Fig. 4 b are the cross-sectional views of liquid crystal display panel thin film transistor region according to a second embodiment of the present invention；
Fig. 5 a are formation public electrode distribution and the coupled capacitors on the basis of Fig. 4 a according to a second embodiment of the present invention
The cross-sectional view of distribution；
Fig. 5 b are the cross-section structure signals that gate wirings are formed on the basis of Fig. 4 b according to a second embodiment of the present invention
Figure；
Fig. 6 is structure of liquid crystal display panel schematic diagram corresponding with Fig. 5 according to a second embodiment of the present invention；
Fig. 7 a are the cross-sectional views that data wire is formed on the basis of Fig. 5 a according to a second embodiment of the present invention；
Fig. 7 b are the cross-sectional views that source-drain electrode is formed on the basis of Fig. 5 b according to a second embodiment of the present invention；
Fig. 8 is structure of liquid crystal display panel schematic diagram corresponding with Fig. 7 according to a second embodiment of the present invention；
Fig. 9 a are the cross-sectional views that via is formed on the basis of Fig. 7 a according to a second embodiment of the present invention；
Fig. 9 b are the cross-sectional views that via is formed on the basis of Fig. 7 b according to a second embodiment of the present invention；
Figure 10 is structure of liquid crystal display panel schematic diagram corresponding with Fig. 9 according to a second embodiment of the present invention；
Figure 11 a are the cross-section structures of the liquid crystal display panel pixel region after the completion of technique according to a second embodiment of the present invention
Schematic diagram；
Figure 11 b are cuing open for the liquid crystal display panel thin film transistor region after the completion of technique according to a second embodiment of the present invention
Face structural representation；
Figure 12 is structure of liquid crystal display panel schematic diagram corresponding with Figure 11 according to a second embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, further is made to the present invention below in conjunction with accompanying drawing
Ground is described in detail.
First embodiment
A kind of liquid crystal display panel of multi-domain vertical orientation mode is provided in the first embodiment of the present invention, it includes battle array
Row substrate, is provided with multiple pixel cells on the array base palte, be wherein provided with thin film transistor (TFT), coupling in each pixel cell
Capacitance wiring and public electrode distribution are closed,
Each pixel cell includes first sub-pixel unit with the first pixel electrode and with the second sub-pixel electricity
Second sub-pixel unit of pole, the first pixel electrode and the second pixel electrode form with the public electrode distribution deposit respectively
Storing up electricity is held；
In each pixel cell, first pixel electrode is configured to electrically connect with the drain electrode of thin film transistor (TFT)
Connect, and be electrically connected with the coupled capacitor distribution；Second pixel electrode is configured to the coupled capacitor with linear
Into coupled capacitor；So that when the thin film transistor (TFT) is turned on, first pixel electrode is formed in reception first voltage
The first voltage is transmitted to the coupled capacitor distribution while first viewing area, second pixel electrode then by with
The coupling effect of the coupled capacitor that the coupled capacitor distribution is formed and obtain second voltage, and then form the second viewing area
The public electrode distribution has overlap with the first pixel electrode and the second pixel electrode, the public electrode
Distribution is provided with the void region for accommodating the coupled capacitor distribution, the coupling electricity below second pixel electrode
Hold distribution to be set and mutually insulated with public electrode distribution interruption, and the public electrode distribution is by transparency conducting layer shape
Into.
Obtain being illustrated as a example by 8 farmland MVA dot structures being improved existing 4 farmland MVA dot structures below,
In the quantity in specific implementation process Zhong Buxianchou areas, the quantity of pixel electrode is not limited yet, can be configured according to actual needs.
Fig. 2 a are 8 farmland MVA display panel structure schematic diagrames according to a first embodiment of the present invention, as illustrated, liquid crystal surface
Gate line 201, data wire 202, public electrode distribution 203, coupled capacitor distribution 204, film are provided with the array base palte of plate
Transistor 205 and pixel electrode 206, are provided with otch 207 on pixel electrode 206.
Structure below for each device of above-mentioned display panel is described in detail.
Pixel electrode 206 is covered in the whole pixel region of the pixel cell, its structure as shown in Figure 2 b, each pixel cell
The second sub-pixel list including the first sub-pixel unit with the first pixel electrode 10 and with the second pixel electrode 20
Unit, the first pixel electrode 10 is configured to be electrically connected with the drain electrode 2051 of thin film transistor (TFT) 205, and with coupled capacitor distribution
204 are electrically connected with, and the second pixel electrode 20 is configured to form coupled capacitor with coupled capacitor distribution 204.Public electrode distribution
203rd, the position relationship of coupled capacitor distribution 204 and pixel electrode can be：Public electrode distribution 203 and first sub-pixel
Electrode 10 and second pixel electrode 20 are overlapped, and the public electrode distribution 203 is under second pixel electrode 20
Side is provided with the void region for accommodating the coupled capacitor distribution 204 (Delta Region as shown in Figure 2 a), and coupled capacitor is matched somebody with somebody
Line 204 insulate with public electrode distribution 203.
When thin film transistor (TFT) 205 is turned on, the first pixel electrode 10 receives first voltage, forms first display on 4 farmlands
Area；Meanwhile, first voltage is transmitted to coupled capacitor distribution 204, by the shape of 204 and second pixel electrode of coupled capacitor distribution 20
Into coupled capacitor coupling effect, obtain second voltage, the second pixel electrode 20 receives second voltage, forms the of 4 farmlands
Two viewing areas.Exactly because it is different with the voltage on the second pixel electrode 20 to be applied to the first pixel electrode 10, cause shape
Into two viewing areas on 4 different farmlands, namely form 8 farmland viewing areas.
Specifically, the gate wirings 2053 of thin film transistor (TFT) 205 are electrically connected with gate line 201, source electrode 2052 and data
Line 202 is electrically connected with, and drain electrode 2051 is communicated with the first via 208, and the coupled capacitor distribution 204 is communicated with the second via 209,
First pixel electrode 10 is electrically connected with by first via 208 with the drain electrode 2051 of the thin film transistor (TFT) 205,
And first pixel electrode 10 is electrically connected with by second via 209 with the coupled capacitor distribution 204.
Increasing storage capacitance in the prior art and be favorably improved display quality, but increase public electrode area can reduce transmission
Rate, therefore, the transparency conducting layer after public electrode distribution is by etching in the present embodiment is formed, on the one hand by increasing public electrode
The area of distribution improves the storage capacitance of display device, and is divided into 2 or multiple regions by by pixel electrode, forms 8 farmlands
Even more the display quality of panel is improved in the viewing area of multidomain, on the other hand using the electrically conducting transparent material of large area high transmittance
Material formed public electrode distribution improve panel transmitance, namely can improve simultaneously liquid crystal display panel display quality and thoroughly
Cross rate.
As a preferred scheme, the coupled capacitor distribution 204 can also by etching after transparency conducting layer formed, and
The coupled capacitor distribution 204 is set with the public electrode distribution 203 with layer, because transparent conductive material has high transmission
Rate, is favorably improved the transmitance of liquid crystal display panel.
Used as a preferred scheme, the gate wirings 2053 of the thin film transistor (TFT) 205 include transparency conducting layer and grid
Metal, its structure is the double-decker being made up of transparency conducting layer and gate metal, such to be disposed to carrying out technique
The manufacture time saves process costs.
Used as a preferred scheme, the pixel electrode on the array base palte is provided with otch.
First sub-pixel unit is formed by the ridge projections thing and/or otch and is divided into described the of multiple farmland areas
One viewing area；Second sub-pixel unit is formed by the ridge projections thing and/or otch and is divided into the second of multiple farmland areas
Viewing area.
It follows that the liquid crystal display panel that the present embodiment is provided can simultaneously improve the display quality of liquid crystal display panel
And transmitance.
In sum, the liquid crystal display panel of the multi-domain vertical orientation mode of the present embodiment, in technical field of liquid crystal display
In there is actual directive significance.
Second embodiment
Fig. 3 is the preparation method stream of the liquid crystal display panel of the multi-domain vertical orientation mode according to second embodiment of the invention
Cheng Tu, as shown in figure 3, may include steps of：
Step S310, after layer of transparent conductive material formation transparency conducting layer is deposited on substrate, successive sedimentation grid gold
Category forms gate metal layer；
The cross-section structure of the liquid crystal display panel pixel region obtained by the technique of step S310 as shown in fig. 4 a, pixel region
Glass substrate on formed one layer of gate metal layer 11 and transparency conducting layer 12；By the liquid crystal that the technique of step S310 is obtained
Show the cross-section structure of panel film transistor area as shown in Figure 4 b, one layer of grid gold is formed on the glass substrate of thin film transistor region
Category layer 21 and transparency conducting layer 22.
Step S320, is performed etching using many gray-level mask techniques to transparency conducting layer and gate metal layer, pixel region
The transparency conducting layer 12 that gate metal layer 11 is exposed after etching away forms public electrode distribution 203 and coupled capacitor distribution 204, carves
The transparency conducting layer 22 and gate metal layer 21 of the thin film transistor region after erosion form the gate wirings 2053 of double-decker.
Step S330, one layer of gate dielectric materials of deposition form gate insulator.
The cross-section structure of the liquid crystal display panel pixel region obtained by the technique of step S320 and step S330 such as Fig. 5 a
Shown, specific embodiment is to the transparency conducting layer in Fig. 4 a and grid gold using many gray-level mask techniques by 1 road light shield
After category layer is performed etching, the gate metal layer 11 of pixel region is etched away, and the transparency conducting layer 12 for exposing forms public electrode and matches somebody with somebody
Line 203 and coupled capacitor distribution 204.Realized by 1 road light shield using many gray-level mask techniques, existing 4 road can also be coordinated
Light shield or 5 road light shield techniques are realized.
By step S320 and step S330 technique formed pixel cell structure as shown in fig. 6, including：Gate line
201st, public electrode distribution 203 and coupled capacitor distribution 204, coupled capacitor distribution 204 (Delta Region as shown in Figure 6) are located at
The void region of public electrode distribution 203, the shape of void region is not construed as limiting, and the shape of coupled capacitor distribution 204 is not also made
Limit, as long as meeting coupled capacitor distribution 204 with public electrode distribution 203 without electrical connection；Public electrode is matched somebody with somebody
Line 203 is set with coupled capacitor distribution 204 with layer, and coupled capacitor distribution 204 is interrupted and insulate with public electrode distribution 203.
The cross-section structure of the liquid crystal display panel thin film transistor region obtained by the technique of step S320 and step S330
As shown in Figure 5 b, specific embodiment be using many gray-level mask techniques by 1 road light shield to the transparency conducting layer in Fig. 4 b and
After gate metal layer is performed etching, the gate wirings 2053 of double-decker are formed.
In the present invention, gate line 201, gate wirings 2053, public electrode distribution are completed in the optical cover process along with
203 and the manufacture of coupled capacitor distribution 204, it is possible to reduce processing step, save process costs.
After forming public electrode distribution 203, coupled capacitor distribution 204 and gate wirings 2053, using chemical vapor deposition
One layer of gate dielectric materials of process deposits form gate insulator (GI)
Step S340, carries out semiconductor layer technique and source-drain electrode technique, forms active layer, data wire 202,2051 and of drain electrode
After source electrode 2052, one layer of passivating material of deposition forms passivation layer；
The cross-section structure of the liquid crystal display panel pixel region obtained by the technique of step S340 as shown in Figure 7a, by source
Drain process forms data wire 202.
The cross-section structure of the liquid crystal display panel thin film transistor region obtained by the technique of step S340 as shown in Figure 7b,
Specific embodiment forms active layer 42 to carry out semiconductor layer technique, and source electrode 2052 and drain electrode are formed by source-drain electrode technique
2051。
It is then covered by one layer of passivation layer and forms data wire 202 and thin film transistor (TFT) 205.Formed by the technique of step S340
Panel construction as shown in figure 8, also including：Data wire 202 and thin film transistor (TFT) 205.
Step S350, carries out via technique, wherein, the drain electrode 2051 is communicated with the first via 208, the coupled capacitor
Distribution 204 is communicated with the second via 209 so that first pixel electrode 10 is thin with described by first via 208
The drain electrode 2051 of film transistor 205 is electrically connected with, and electrical with the coupled capacitor distribution 204 by second via 209
Connection；
The cross-section structure of the liquid crystal display panel pixel region obtained by the via technique of step S350 as illustrated in fig. 9, has
Body technology process is that the part of grid pole insulating barrier and portion of the passivating layer for etching away the covering of the top of coupled capacitor distribution 204 form second
Via 209.
The cross-section structure of the liquid crystal display panel thin film transistor region obtained by the via technique of step S350 such as Fig. 9 b
Shown, specific embodiment is that the portion of the passivating layer for etching away the covering of the top of drain electrode 2051 forms the first via 208.
The panel construction formed by the via technique of step S350 is as shown in Figure 10, also includes：First via 208 and
Two vias 209.
Step S360, the pixel region on the passivation layer forms at least two independent sub- pictures using transparent conductive material
Plain electrode, each pixel electrode forms a storage capacitance, the second sub-pixel electricity with the public electrode distribution 203 respectively
Pole 20 is configured to form coupled capacitor with the coupled capacitor distribution 204.
The cross-section structure of the liquid crystal display panel pixel region obtained by the technique of step S360 as shown in fig. 11a, specifically
Technical process is to form pixel electrode over the passivation layer using transparent conductive material, pixel electrode as shown in Figure 2 b, pixel electrode
It is divided at least two independent pixel electrodes, including the first pixel electrode 10 and the second pixel electrode 20, the first sub- picture
Plain electrode 10 is electrically connected with by the second via 209 etched in step S150 with coupled capacitor distribution 204.
The cross-section structure of the liquid crystal display panel thin film transistor region obtained by the technique of step S360 such as Figure 11 b institutes
Show, specific embodiment is that the first pixel electrode 10 is electrical with the drain electrode 2051 of thin film transistor (TFT) 205 by the first via 208
Connection.
Display panel manufacturing process is completed, and obtains 8 farmland MVA display panel structures as shown in figure 12, is also included：Pixel electricity
Pole 206.On the one hand storage capacitance is increased, on the other hand again because public motor distribution and pixel electrode distribution are all by high saturating
The transparent conductive material formation of rate is crossed, the transmitance of panel is also increased.
Used as a preferred scheme, many gray-level mask techniques include：
Half-exposure (Half-Tone) is carried out using semi-permeable film；
Or, producing the slit below exposure machine resolution, the light source of some is covered by the slit position, to reach
Half-exposure effect (Gray-Tone).
The above, specific implementation case only of the invention, protection scope of the present invention is not limited thereto, any ripe
Those skilled in the art are known in technical specification of the present invention, modifications of the present invention or replacement all should be in the present invention
Protection domain within.
Claims (9)
1. a kind of liquid crystal display panel of multi-domain vertical orientation mode, it includes array base palte, is provided with the array base palte
Thin film transistor (TFT), coupled capacitor distribution and public electrode distribution are provided with multiple pixel cells, wherein each pixel cell,
Each pixel cell includes first sub-pixel unit with the first pixel electrode and with the second pixel electrode
Second sub-pixel unit, the first pixel electrode and the second pixel electrode form storage electricity with the public electrode distribution respectively
Hold；
In each pixel cell, first pixel electrode is configured to be electrically connected with the drain electrode of thin film transistor (TFT), and
It is electrically connected with the coupled capacitor distribution；Second pixel electrode is configured to be formed with the coupled capacitor distribution and couples
Electric capacity；
The public electrode distribution is Chong Die with first pixel electrode and second pixel electrode, the public electrode
Distribution is provided with the void region for accommodating the coupled capacitor distribution, the coupling electricity below second pixel electrode
Hold distribution to be insulated with the public electrode distribution, and the public electrode distribution is formed by transparency conducting layer.
2. liquid crystal display panel according to claim 1, it is characterised in that the coupled capacitor distribution is by transparency conducting layer
Formed, and the coupled capacitor distribution is set with the public electrode distribution with layer.
3. liquid crystal display panel according to claim 1, it is characterised in that the gate wirings of the thin film transistor (TFT) include
Transparency conducting layer and gate metal.
4. liquid crystal display panel according to claim 1, it is characterised in that the drain electrode of the thin film transistor (TFT) is communicated with
One via, the coupled capacitor distribution is communicated with the second via, and first pixel electrode passes through first via and institute
The drain electrode for stating thin film transistor (TFT) is electrically connected with, and first pixel electrode is by second via and the coupled capacitor
Distribution is electrically connected with.
5. liquid crystal display panel according to claim 1, it is characterised in that also including color membrane substrates, the color membrane substrates
On be provided with ridge projections thing.
6. liquid crystal display panel according to claim 5, it is characterised in that the pixel electrode on the array base palte
It is provided with otch.
7. liquid crystal display panel according to claim 6, it is characterised in that first sub-pixel unit passes through the ridge
Shape thrust and/or otch form first viewing area for being divided into multiple farmland areas；Second sub-pixel unit is by described
Ridge projections thing and/or otch form the second viewing area for being divided into multiple farmland areas.
8. a kind of preparation method of the liquid crystal display panel of multi-domain vertical orientation mode, it is characterised in that comprise the following steps：
After layer of transparent conductive material formation transparency conducting layer is deposited on substrate, successive sedimentation gate metal forms gate metal
Layer；
Transparency conducting layer and gate metal layer are performed etching using many gray-level mask techniques, the gate metal layer etching of pixel region
The transparency conducting layer that exposes after falling forms public electrode distribution and coupled capacitor distribution, the thin film transistor region after etching it is transparent
Conductive layer and gate metal layer form the gate wirings of double-decker；Wherein, the public electrode distribution is in the described second sub- picture
Plain base part is provided with the void region for accommodating the coupled capacitor distribution, the coupled capacitor distribution and the common electrical
Pole distribution insulation；
One layer of gate dielectric materials of deposition form gate insulator；
Semiconductor layer technique and source-drain electrode technique are carried out, after forming active layer, data wire and source-drain electrode, one layer of passivating material is deposited
Form passivation layer；
Via technique is carried out, wherein, the drain electrode is communicated with the first via, and the coupled capacitor distribution is communicated with the second via,
So that first pixel electrode is electrically connected with by first via with the drain electrode of the thin film transistor (TFT), and by institute
The second via is stated to be electrically connected with the coupled capacitor distribution；
Pixel region on the passivation layer forms at least two independent pixel electrodes using transparent conductive material, each
Pixel electrode forms a storage capacitance with the public electrode distribution respectively, and the second pixel electrode is configured to and the coupling
Close capacitance wiring and form coupled capacitor.
9. preparation method according to claim 8, it is characterised in that many gray-level mask techniques include：
Half-exposure is carried out using semi-permeable film；
Or, producing the slit below exposure machine resolution, the light source of some is covered by the slit position, to reach half exposure
Light effect.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107272245A (en) * | 2017-08-22 | 2017-10-20 | 京东方科技集团股份有限公司 | A kind of preparation method of display base plate, display base plate and display device |
| CN109901336A (en) * | 2019-04-02 | 2019-06-18 | 深圳市华星光电技术有限公司 | Array substrate and its manufacturing method |
| CN110121783A (en) * | 2017-12-07 | 2019-08-13 | 京东方科技集团股份有限公司 | Display panel, display device, the method that adjusting display panel displays contrast with light modulation area and the method for manufacturing display panel |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040160560A1 (en) * | 2003-02-17 | 2004-08-19 | Samsung Electronics Co., Ltd. | Liquid crystal display |
| CN101196667A (en) * | 2006-11-20 | 2008-06-11 | 索尼株式会社 | Liquid crystal display device and electronic apparatus |
| CN101236345A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Liquid crystal display panel, pixel structure and method of manufacture |
| CN201298129Y (en) * | 2008-12-04 | 2009-08-26 | 上海广电光电子有限公司 | Multi-domain vertical alignment liquid crystal display panel |
| US20100039599A1 (en) * | 2002-12-03 | 2010-02-18 | Lee Chang-Hun | Thin film transistor array panel for liquid crystal display |
-
2016
- 2016-12-30 CN CN201611257896.7A patent/CN106873272B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100039599A1 (en) * | 2002-12-03 | 2010-02-18 | Lee Chang-Hun | Thin film transistor array panel for liquid crystal display |
| US20040160560A1 (en) * | 2003-02-17 | 2004-08-19 | Samsung Electronics Co., Ltd. | Liquid crystal display |
| CN101196667A (en) * | 2006-11-20 | 2008-06-11 | 索尼株式会社 | Liquid crystal display device and electronic apparatus |
| CN101236345A (en) * | 2008-02-29 | 2008-08-06 | 上海广电光电子有限公司 | Liquid crystal display panel, pixel structure and method of manufacture |
| CN201298129Y (en) * | 2008-12-04 | 2009-08-26 | 上海广电光电子有限公司 | Multi-domain vertical alignment liquid crystal display panel |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107272245A (en) * | 2017-08-22 | 2017-10-20 | 京东方科技集团股份有限公司 | A kind of preparation method of display base plate, display base plate and display device |
| CN110121783A (en) * | 2017-12-07 | 2019-08-13 | 京东方科技集团股份有限公司 | Display panel, display device, the method that adjusting display panel displays contrast with light modulation area and the method for manufacturing display panel |
| CN110121783B (en) * | 2017-12-07 | 2023-11-28 | 京东方科技集团股份有限公司 | Display panel with dimming area, display device, method for adjusting display contrast of display panel, and method for manufacturing display panel |
| CN109901336A (en) * | 2019-04-02 | 2019-06-18 | 深圳市华星光电技术有限公司 | Array substrate and its manufacturing method |
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| CN106873272B (en) | 2020-04-10 |
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