CN100573883C - A kind of thin-film transistor and manufacture method thereof - Google Patents
A kind of thin-film transistor and manufacture method thereof Download PDFInfo
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- CN100573883C CN100573883C CNB200710042991XA CN200710042991A CN100573883C CN 100573883 C CN100573883 C CN 100573883C CN B200710042991X A CNB200710042991X A CN B200710042991XA CN 200710042991 A CN200710042991 A CN 200710042991A CN 100573883 C CN100573883 C CN 100573883C
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- 239000010409 thin film Substances 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 238000000034 method Methods 0.000 title claims description 22
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 238000002161 passivation Methods 0.000 claims abstract description 21
- 239000012212 insulator Substances 0.000 claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 14
- 230000008021 deposition Effects 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 14
- 239000010408 film Substances 0.000 claims description 14
- 238000001259 photo etching Methods 0.000 claims description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 4
- 239000012528 membrane Substances 0.000 claims description 3
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 6
- 238000000151 deposition Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 238000005286 illumination Methods 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910000809 Alumel Inorganic materials 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
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- 239000010949 copper Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
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- 238000000427 thin-film deposition Methods 0.000 description 1
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- Thin Film Transistor (AREA)
Abstract
The invention provides a kind of thin-film transistor comprises: a kind of thin-film transistor comprises a substrate; One is formed on the controlling grid scan line on the substrate; One is formed on the gate insulator on the controlling grid scan line; It also comprises: an active layer, and this active layer is on the controlling grid scan line; One data wire and drain electrode are formed on the described gate insulator, and are equipped on the described active layer; One passivation layer is formed on data wire and the drain electrode, forms contact hole on drain electrode; One pixel electrode is formed on the passivation layer, is connected with drain electrode by the contact hole on the described drain electrode; Wherein, described data wire is as transistorized source electrode.The present invention also provides described method of manufacturing thin film transistor.Thereby thin-film transistor of the present invention can reduce controlling grid scan line and data wire condensance, improve charge-retention property on the liquid crystal pixel electrodes, display quality that the aperture opening ratio that improves display unit strengthens TFT LCD.
Description
Technical field
The present invention relates to a kind of thin-film transistor, relate in particular to a kind of structure and manufacture method thereof that is used for the thin-film transistor on the LCD (TFT LCD).
Background technology
Characteristics such as Thin Film Transistor-LCD (TFT LCD) is frivolous with it, energy-saving and environmental protection become the main flow of current kinds of displays part development gradually.
Fig. 1 is the structural representation of a kind of thin-film transistor LCD device array substrate display unit of the prior art.Figure 1A and Figure 1B are respectively the structural representation that transistor is placed at vertical and horizontal.Shown in Figure 1A and 1B, existing display cell structure mainly comprises: a substrate (not shown), and the first metal layer that on this substrate, forms, this metal level is as controlling grid scan line 10, gate electrode 20 and public electrode wire 30; The grid electrode insulating layer and the active layer 40 that on gate electrode 20, form; Form one second metal level on active layer 40, this second metal level is as holding wire, source electrode 50 and drain electrode 60; Form a passivation layer at holding wire and on the source electrode 50 of layer and drain electrode 60; On the passivation layer above the drain electrode 60, form via hole 70; The transparent pixels electrode that is formed on the passivation layer is connected with drain electrode 60 by passivation layer via hole.In addition, this display cell structure also comprises the shading strip made from the first metal layer 110.
Shown in Figure 1A and 1B, the coupling capacitance between controlling grid scan line 10 and the data wire 80 mainly contains two parts and forms: a part is the parallel plate capacitor that directly forms on controlling grid scan line 10 and data wire 80 intersection regions; Another part be on the controlling grid scan line 10 transistor area by the parallel plate capacitor that forms between source transistor electrode 50 and the controlling grid scan line.The source electrode 50 here is connected with data wire 80 by metal connecting line.Above-mentioned two parts electric capacity concurs and makes that the impedance of controlling grid scan line 10 and data wire 80 is all bigger, reaches certain write capability in order to make controlling grid scan line 10 and data wire 80, need amplify the width of controlling grid scan line and data wire simultaneously.So just caused the aperture opening ratio of display unit to descend.
As shown in Figure 2, the active layer at thin-film transistor source electrode 5 and drain electrode 6 two ends stretches out gate electrode 2, is directly exposed in the illumination range at the thin-film transistor LCD device array substrate back side.Because the amorphous silicon hydride 9 (a-Si:H) of thin film transistor active layer is very responsive to light, can excite the generation electron-hole pair when illumination is mapped to transistor active layer in amorphous silicon hydride, thereby reduce the off-resistances of device.The described electron-hole pair of generation that excites is commonly referred to photo-generated carrier.Under the effect of source transistor electrode voltage and drain electrode voltage, transistor can form a certain size with leakage current, thereby influence charge-retention property on the liquid crystal pixel.
In addition, the size at transistor channel length direction active layer also goes out greatly about 4 microns than transistor channel width.This has just increased the overlapping area between the transistor AND gate gate electrode, thereby has increased the coupling capacitance between controlling grid scan line and the data wire.
Fig. 3 A-3E has provided traditional thin-film transistor manufacturing process based on 5 mask plate technologies:
Fig. 3 A is for forming the grid gate electrode; Fig. 3 B is for forming grid electrode insulating layer and active layer; Among Fig. 3 C for having formed source electrode and drain electrode; Fig. 3 D forms passivation layer and forms via hole on the drain electrode; Fig. 3 E forms pixel electrode.Except insulating barrier and passivation layer, the figure that forms each layer all will experience thin film deposition, photoetching and corrosion three road master operations in the above-mentioned steps.
Summary of the invention
The object of the present invention is to provide a kind of new thin-film transistor and manufacture method thereof, thus can reduce controlling grid scan line and data wire condensance, improve charge-retention property on the liquid crystal pixel electrodes, display quality that the aperture opening ratio that improves display unit strengthens TFT LCD.
For reaching above-mentioned purpose, the invention provides a kind of thin-film transistor and comprise: a kind of thin-film transistor comprises a substrate; One is formed on the controlling grid scan line on the substrate; One is formed on the gate insulator on the controlling grid scan line; It also comprises:
One active layer, this active layer is on the controlling grid scan line;
One data wire and drain electrode are formed on the described gate insulator, and are equipped on the described active layer;
One passivation layer is formed on data wire and the drain electrode, forms contact hole on drain electrode;
One pixel electrode is formed on the passivation layer, is connected with drain electrode by the contact hole on the described drain electrode;
Wherein, described data wire is as transistorized source electrode.
Preferably, the width of controlling grid scan line is greater than the width of active layer.
More preferably, described active layer is the width of transistor channel along the length of described data wire unwrapping wire.
For reaching above-mentioned purpose, the present invention also provides a kind of method of manufacturing thin film transistor; Comprise the steps:
(1) deposition controlling grid scan line film on glass substrate by photoetching and etching process, forms the gate electrode scan line;
(2) deposition grid electrode insulating layer film and amorphous silicon membrane on the substrate of completing steps (1) by photoetching and etching process, form the silicon island;
(3) deposition layer of metal film on the substrate of completing steps (2) by photoetching and etching process, forms data wire and drain electrode;
(4) deposition one deck passivation layer on the substrate of completing steps (3) forms drain electrode passivation layer contact hole partly by photoetching and etching process;
(5) deposition layer of transparent conductive film on the substrate of completing steps (4) by photoetching and etching process, covers the contact hole on the drain electrode, forms pixel electrode.
This design of the present invention does not need additionally to pick out a metal line again from data wire and carries out connection between data wire and the source electrode.
Description of drawings
Figure 1A is the vertically structural representation of the thin-film transistor LCD device array substrate display unit of placement of existing transistor.
Figure 1B is the laterally structural representation of the thin-film transistor LCD device array substrate display unit of placement of existing transistor.
Fig. 2 be among Figure 1A A-A ' to the transistor schematic cross-section.
Fig. 3 A～3E is the transistor manufacturing flow chart of existing 5MASK technology.
Fig. 4 is the structural representation of thin-film transistor of the present invention.
Fig. 5 is the schematic diagram of thin film transistor channel Width of the present invention.
Fig. 6 is the sectional view of the thin film transistor channel length direction of the present invention (A-A ' to) of Fig. 5.
Fig. 7 is the existing conventional transistor structural representation that is drawn out to the transistor drain metal wire from data wire.
Fig. 8 is the capacitance relation figure of controlling grid scan line and data wire.
Fig. 9 is the characteristic schematic diagram of offset between the different layers of thin-film transistor structure of the present invention.
Figure 10 A is the area coverage schematic diagram of the active layer of thin-film transistor in the prior art.
Figure 10 B is the area coverage schematic diagram of the active layer of thin-film transistor of the present invention.
Embodiment
Below in conjunction with description of drawings and embodiment, the present invention is described in detail further.
Fig. 4 has provided thin-film transistor structure schematic diagram of the present invention.The position of transistor 2 is in the intersection region of controlling grid scan line 1 and data wire 8.The active layer of transistor 2 is on the controlling grid scan line 1 fully, does not have the part that is exposed to from the illumination range at the thin-film transistor LCD device array substrate back side.The orientation of transistor 2 is parallel to data wire 8, and the channel width dimension of transistor 2 is parallel to scan line 1.In the transistor 2 that the present invention proposes, that part of size that active layer is parallel to data wire 8 is exactly transistorized width size.The width of the controlling grid scan line 1 in the intersection region is greater than transistorized channel width w.Source electrode and drain electrode are equipped on the active layer fully on transistorized Width, and this active layer also strides across the some microns of source electrode and drain electrode respectively.This distance that strides across depends on the position offset between source electrode, drain electrode and the active layer.In addition, in thin-film transistor structure, that part of data wire 8 that intersects with controlling grid scan line 1 is as these transistorized source electrodes.Pixel electrode line 9 is as drain electrode, and this design does not need additionally to pick out a metal line again from data wire and carries out connection between data wire and the source electrode.On the thin-film transistor drain electrode, realize after the passivation layer via hole, drain electrode is connected with transparent pixel electrode, thereby reaches the function of using as the liquid crystal display switch.
As Fig. 5, be the schematic diagram of thin film transistor channel Width of the present invention.The width V of controlling grid scan line 1 cross part is greater than the width v of active layer, and transistor active layer is exactly the width w of transistor channel along the length of data wire 8 directions, both the width of v.
As shown in Figure 6, for the thin-film transistor A-A ' of Fig. 5 to sectional view.Comprise that one is positioned at the glass substrate 100 of the bottom, be formed on the substrate 100 for controlling grid scan line 1; One is formed on the gate insulator 6 on the controlling grid scan line 1; Also having one deck active layer 10 in addition on gate insulator 6, is intrinsic amorphous silicon layer 10 in the present embodiment, and active layer 10 is on the controlling grid scan line 1; It on active layer 10 amorphous silicon layer 11 that mixes, its width is narrower than intrinsic amorphous silicon layer 10, be divided into two segments, data wire 8 and pixel electrode line 9 lay respectively on the amorphous silicon layer 11 that mixes, herein, data wire 8 is as the source electrode, and pixel electrode line 9 is equipped on respectively on the described active layer 10 as drain electrode.
Fig. 5 and Fig. 7 are made comparisons as can be seen, and shown in the black color dots circle among Fig. 7, existing transistor arrangement is to draw a metal wire to the transistor leakage utmost point from data wire 8.This part data wire current potential will produce liquid crystal capacitance on the data wire, the parasitic capacitance between data wire and the public electrode wire, and the parasitic capacitance between data wire and the pixel electrode.And after having adopted transistor arrangement as Fig. 5, do not need additionally to pick out a metal line again from data wire and carry out connection between data wire and the source electrode.Above-mentioned electric capacity promptly is eliminated.
As shown in Figure 8, half scan line and the data line capacitance of linking to each other with data wire 8 on the cross part electric capacity of scan line 1 and data wire 8 and the transistor 2 united two into one.The scan line of part and the cross part electric capacity of data wire shown in the only remaining black color dots circle.This structure greatly reduces the load capacitance of scan line and data wire simultaneously.
As shown in Figure 9, no matter how many data wires 8 be with the position offset of amorphous silicon layer 11, and the parasitic capacitance of all crystals pipe all in the display screen.The transistor internal homogeneity is good.Transistorized parasitic capacitance noted earlier comprises on the transistor on half transistor capacitance and the transistor of linking to each other with pixel electrode link to each other with data wire half scan line and data line capacitance.
Comparison diagram 10A and Figure 10 B are traditional structural representation as Figure 10 A, and Figure 10 B removes the some microns amorphous silicon layers in conventional transistor Width both sides, has reduced the contact area between source electrode and drain electrode and the amorphous silicon layer.This design feature has been eliminated several places of easy formation leakage current when dwindling the required area occupied of transistor.
The overall structure of display unit in the combination film transistor liquid crystal display (TFT-LCD), above-mentioned thin-film transistor structure can be finished by the following steps manufacturing.
At first, use magnetically controlled sputter method, deposition one layer thickness exists on transparent glass substrate
Extremely
The controlling grid scan line layer.The material of this metal level can use metals such as molybdenum, aluminium, alumel, molybdenum and tungsten alloy, chromium or copper.Also can use the combination of above-mentioned different materials film.Form patterns such as controlling grid scan line, public electrode wire and shading strip with controlling grid scan line layer mask plate by exposure technology and etching process.
Then, utilize chemical vapor deposited method successive sedimentation thickness on the array base palte of finishing the first metal layer pattern to exist
Extremely
Grid electrode insulating layer film and thickness exist
Extremely
Amorphous silicon membrane.Grid electrode insulating layer film material can use silicon nitride, also can use silica and silicon oxynitride etc.Behind the mask board to explosure with active layer amorphous silicon layer is carried out etching process, form the silicon island.
Then, deposition one layer thickness exists on array base palte
Extremely
The data line layer film.In certain zone, form patterns such as data wire and drain electrode by the data line layer mask plate.
Then, deposition one layer thickness exists on whole array base palte
Extremely
Passivation layer.Its material can be a silicon nitride, also can be silica or silicon oxynitride.By the mask plate of passivation layer, utilize exposure technology and etching process on transistorized drain electrode, to form passivation layer via hole.
At last, deposition one layer thickness exists on substrate
Extremely
The electrically conducting transparent layer film.Its material mainly is tin indium oxide ITO (Indium Tin Oxide).Use the transparency conducting layer mask plate,, form pixel electrode pattern by exposure technology and etching process.As shown in Figure 4, after pixel electrode covers above the public electrode wire, be that medium forms the storage capacitance between public electrode wire and the pixel electrode with the passivation layer.
The above embodiment that proposes is a kind of implementation method, and other implementation method also can be arranged, and finishes by selecting different materials or combination of materials.
Should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art should can use different materials and design realization as required, promptly can make amendment or be equal to replacement, and not break away from the spirit and scope of technical solution of the present invention technical scheme of the present invention.
Claims (4)
1. a thin-film transistor comprises a substrate; One is formed on the controlling grid scan line on the substrate; One is formed on the gate insulator on the controlling grid scan line; It is characterized in that, also comprise:
One active layer, this active layer is on the controlling grid scan line;
One data wire and drain electrode are formed on the described gate insulator, and are equipped on the described active layer;
One passivation layer is formed on data wire and the drain electrode, forms contact hole on drain electrode;
One pixel electrode is formed on the passivation layer, is connected with drain electrode by the contact hole on the described drain electrode;
Wherein, described data wire is as transistorized source electrode.
2. thin-film transistor as claimed in claim 1 is characterized in that: the width of controlling grid scan line is greater than the width of active layer.
3. thin-film transistor as claimed in claim 1 is characterized in that: described active layer is the width of transistor channel along the length of described data wire unwrapping wire.
4. a kind of method of manufacturing thin film transistor as claimed in claim 1; , it is characterized in that, comprise the steps:
(1) deposition controlling grid scan line film on glass substrate by photoetching and etching process, forms the gate electrode scan line;
(2) deposition grid electrode insulating layer film and amorphous silicon membrane on the substrate of completing steps (1) by photoetching and etching process, form the silicon island;
(3) deposition layer of metal film on the substrate of completing steps (2) by photoetching and etching process, forms data wire and drain electrode;
(4) deposition one deck passivation layer on the substrate of completing steps (3) forms drain electrode passivation layer contact hole partly by photoetching and etching process;
(5) deposition layer of transparent conductive film on the substrate of completing steps (4) by photoetching and etching process, covers the contact hole on the drain electrode, forms pixel electrode.
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| CNB200710042991XA CN100573883C (en) | 2007-06-28 | 2007-06-28 | A kind of thin-film transistor and manufacture method thereof |
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| CNB200710042991XA CN100573883C (en) | 2007-06-28 | 2007-06-28 | A kind of thin-film transistor and manufacture method thereof |
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| CN100573883C true CN100573883C (en) | 2009-12-23 |
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| CN102759832B (en) * | 2012-07-27 | 2015-04-08 | 南京中电熊猫液晶显示科技有限公司 | Liquid crystal display substrate and manufacturing method thereof |
| CN104062822B (en) | 2014-06-05 | 2017-02-01 | 深圳市华星光电技术有限公司 | Manufacturing method of TFT-LCD display panel based on HSD structure |
| CN110620105B (en) * | 2019-10-22 | 2021-06-29 | 成都中电熊猫显示科技有限公司 | Array substrate, manufacturing method thereof and detection method of pattern deviation of array substrate |
| CN111583849A (en) * | 2020-05-19 | 2020-08-25 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
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