CN201298129Y - Multi-domain vertical alignment liquid crystal display panel - Google Patents
Multi-domain vertical alignment liquid crystal display panel Download PDFInfo
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- CN201298129Y CN201298129Y CNU2008201565589U CN200820156558U CN201298129Y CN 201298129 Y CN201298129 Y CN 201298129Y CN U2008201565589 U CNU2008201565589 U CN U2008201565589U CN 200820156558 U CN200820156558 U CN 200820156558U CN 201298129 Y CN201298129 Y CN 201298129Y
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- vertical alignment
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Abstract
The utility model discloses a multi-domain vertical alignment liquid crystal display panel which comprises a plurality of grid scanning lines extending in a first direction, a plurality of data lines extending in a second direction, and a plurality of common electrode lines extending in the first direction, wherein, the grid scanning lines and the data lines intersect to form a pixel area, thin film transistors and pixel electrodes are arranged in the pixel area, the pixel electrodes include a first pixel electrode and a second pixel electrode which are insulated from each other, the first pixel electrode and the second pixel electrode are connected with a first thin film transistor and a second thin film transistor respectively, the first pixel electrode is connected through a first pixel electrode connecting wire, the second pixel electrode is connected through a second pixel electrode connecting wire, and the common electrode lines overlap a plurality of parts of the pixel electrode connecting wires. The multi-domain vertical alignment liquid crystal display panel provided by the utility model can realize multi-domain display through capacitance coupling.
Description
Technical field
The utility model relates to a kind of display panels, relates in particular to a kind of multi-domain vertical alignment display panels.
Background technology
(liquid crystal display is a kind of flat-panel screens that is widely used most at present LCD) to LCD, has low-power consumption, external form is thin, in light weight and feature such as low driving voltage.Generally speaking, the viewing area of LCD comprises a plurality of subpixel area, each subpixel area is generally two gate line (gate line, claim sweep trace again) intersect defined rectangle or other shape area with two data lines (data line), be provided with thin film transistor (TFT) (TFT) and pixel electrode in it, thin film transistor (TFT) serves as on-off element.Form active matrix liquid crystal display by TFT is set in pixel, be fit to the liquid crystal display cells of big picture, high resolving power, many gray scales.
Thin Film Transistor-LCD (TFT LCD) all develops towards directions such as height contrast, no GTG counter-rotating, high brightness, high color saturation, rapid reaction and wide viewing angles.Common wide viewing angle technology comprises at present: stable twisted nematic liquid crystal (TN) adds view film (wide viewing film), copline suitching type (In-PlateSwitching, IPS) LCD, edge suitching type (Fringe Field Switching, FFS) LCD and multi-domain vertical alignment formula (Multi-domain Veritcal Alignment, MVA) LCD.With multi-domain vertical alignment formula display panels is example, it can pass through some alignment pattern (alignmentpattern), as orientation ridge (alignment protrusion) or slit (slit), so that being many-sided, arranges the liquid crystal molecule in each pixel, and then obtain several different orientation farmlands (domain), so the multi-domain vertical alignment formula display panels requirement that can reach wide viewing angle.Yet when different visual angles was watched same image, the pattern colour saturation degree that the user saw can be different, promptly so-called colour cast (color shift).
In order to improve aforesaid colour cast problem, many notions that single pixel region is divided into two kinds of different voltage regime just are suggested in succession, this notion mainly is to use two pixel electrodes that are electrically insulated each other in single pixel, and makes two pixel electrodes that are electrically insulated each other have different voltage by driving.As capacitance coupling type (Capacitance Coupling, C-C type), pair transistor double grid polar curve or Double Data line (DoubleTransistor, T-T type), the public electrode wire modulation system (Common voltage swinging, Com-swing).Yet, use T-T formula and extra chip (IC) and the electronic devices and components of Com-swing formula Technology Need, increase cost.C-C formula technology does not need to increase extra cost, makes single pixel have two different voltages, obtains different orientation farmlands.
The utility model content
Technical problem to be solved in the utility model provides a kind of multi-domain vertical alignment display panels, can realize that multidomain shows by capacitive coupling.
The utility model is to solve the problems of the technologies described above the technical scheme that adopts to provide a kind of multi-domain vertical alignment display panels, comprising:
Many the controlling grid scan lines that extend along first direction;
Many the data lines that extend along second direction, controlling grid scan line and data line intersect to form pixel region;
Many the public electrode wires that extend along first direction;
Be arranged on thin film transistor (TFT) and pixel electrode in the pixel region, described pixel electrode comprises first pixel electrode insulated from each other and second pixel electrode, and described first pixel electrode links to each other with second thin film transistor (TFT) with the first film transistor respectively with second pixel electrode;
Wherein, described first pixel electrode links to each other by the first pixel electrode connecting line, and described second pixel electrode links to each other by the second pixel electrode connecting line, and overlap mutually described public electrode wire and pixel electrode connecting line many places.
Above-mentioned multi-domain vertical alignment display panels, wherein, described the first film transistor has different raceway groove width/length ratio with second thin film transistor (TFT).
Above-mentioned multi-domain vertical alignment display panels, wherein, described public electrode wire is the H type.
Above-mentioned multi-domain vertical alignment display panels, wherein, described display panels also comprises the capacitive coupling line that links to each other with described first pixel electrode, described capacitive coupling line is positioned at the below of described second pixel electrode.
The utility model contrast prior art has following beneficial effect: the multi-domain vertical alignment display panels that the utility model provides, wherein, the public electrode wire and the first pixel electrode connecting line, overlap mutually the second pixel electrode connecting line many places, realize that by capacitive coupling multidomain shows, help improving colour cast, this dot structure design simultaneously can increase the storage capacitors value, effectively improves pixel aperture ratio.
Description of drawings
Fig. 1 is the vertical view of thin-film transistor array base-plate of the present utility model.
Fig. 2 is the sectional view along Figure 1A-A ' line.
Fig. 3 is the equivalent circuit diagram of the dot structure of Fig. 1.
Among the figure:
100 array base paltes, 110 sweep traces, 111 grids
112 public electrode wires, 114 capacitor storage beam, 120 gate insulation layers
210 the first film transistors, 211 second thin film transistor (TFT)s, 212 semiconductor layers
214 ohmic contact layers, 310 data lines, 312 first pixel electrode connecting lines
314 second pixel electrode connecting lines, 316 capacitive coupling lines, 22 source electrodes
324 drain electrodes, 410,411 contact holes, 420 interlayer insulating films
510 pixel electrodes, 512 first pixel electrodes, 514 second pixel electrodes
Clc1, Clc2 liquid crystal capacitance Cst1, Cst2 storage capacitors Cx coupling capacitance
Embodiment
The utility model will be further described below in conjunction with drawings and Examples.
Fig. 1 is the vertical view of thin-film transistor array base-plate of the present utility model.
Please refer to Fig. 1, comprise multi-strip scanning line 110 on the thin-film transistor array base-plate 100 of present embodiment, many data lines 310, a plurality of public electrode wires 112 independent of each other and a plurality of pixel electrode 510.Each pixel and corresponding scanning line 110 and data line 310 electrically connect, and public electrode wire 112 is positioned at the below of each pixel electrode 510.In addition, each pixel comprises a plurality of thin film transistor (TFT)s 210, a plurality of pixel electrodes 510.Each pixel electrode 510 is respectively by different thin-film transistor elements and corresponding scanning line 110 and data line 310 electric connections.
In the present embodiment, substrate 100 can be glass substrate, plastic base or other hard substrate or soft substrate plate.Generally speaking, the bearing of trend of sweep trace 110 for example is vertical with the bearing of trend of data line 310.Certainly along with the shape of pixel is different with arrangement mode, as stripe-arrangement, rounded projections arranged, honeycomb arrangement etc.The utility model can adopt the sweep trace 110 and data line 310 of different shape.Wherein, each pixel comprises the first pixel electrode connecting line, 312, the second pixel electrode connecting lines 314, capacitive coupling line 316, and wherein capacitive coupling line 316 is positioned at second pixel electrode, 514 belows.The first pixel electrode connecting line 312 electrically connects a plurality of first pixel electrodes 512 by contact hole 410; The second pixel electrode connecting line 314 electrically connects a plurality of second pixel electrodes 514 by contact hole 411.Wherein, overlap mutually public electrode wire 112 and the first pixel electrode connecting line, 312 many places, and overlap mutually public electrode wire 112 and the second pixel electrode connecting line, 314 many places.In addition, public electrode wire 112 can be the H type, extends along the first pixel electrode connecting line 312 and the second pixel electrode connecting line 314, further increases itself and pixel electrode connecting line overlapping area.
Please continue referring to Fig. 1, because capacitive coupling line 316 is connected with first pixel electrode, 512 electrodes, and the voltage of capacitive coupling line 316 is different with the voltage of second pixel electrode 514, so capacitive coupling line 316 can influence the voltage of second pixel electrode 514 by capacitance coupling effect.At length, during the first film transistor T 1 and second thin film transistor (TFT) T2 unlatching, the voltage of second pixel electrode 514 still can be subjected to the influence of capacitive coupling line 316.
In the present embodiment, the first pixel electrode connecting line 314 overlaps mutually with public electrode 112 many places, forms MIM (metal-insulator-metal) electric capacity, as the part of storage capacitors Cst1, can increase the storage capacitors value effectively; Similarly, the second pixel electrode connecting line 316 overlaps mutually with public electrode wire 112 many places, also forms the MIM metal, as the part of storage capacitors Cst2.Simultaneously, under the situation of the certain storage capacitors value of maintenance, can suitably reduce the width of public electrode 112, improve pixel aperture ratio effectively.
In addition, present embodiment is designed to W1/L1 and W2/L2 respectively with the raceway groove width/length ratio of the first film transistor T 1 and the second thin film transistor (TFT) T2, and the raceway groove width/length ratio that makes the first film transistor T 1 and second thin film transistor (TFT) T2 difference (even W1/L1 ≠ W2/L2) to some extent.In a preferred embodiment; for the raceway groove width/length ratio that makes the first film transistor T 1 and the second thin film transistor (TFT) T2 has enough difference, can make the raceway groove width/length ratio of the first film transistor T 1 and the second thin film transistor (TFT) T2 satisfy the condition of (W1/L1)/(W2/L2) ≧ 2 usually.
Fig. 2 is the sectional view along Figure 1A-A ' line.
Please refer to Fig. 2, the thin film transistor (TFT) T1 of present embodiment comprises grid 111, semiconductor layer 212, source electrode 322, drain electrode 324.In order to reduce the resistance between source-drain electrode and the semiconductor layer, ohmic contact layer 214 places between the two.Gate insulation layer 120 adopts the method that strengthens PCVD (PECVD) with interlayer insulating film 420, with insulator film deposition between double layer of metal.Grid 111 can be made of the metal of aluminum or aluminum alloy and so on storage capacitance line 114, and source electrode 322, drain electrode 324 can be made of metals such as aluminium, chromium, and pixel electrode 510 can be made of ITO transparent conductive films such as (tin indium oxides), places on the interlayer insulating film 420.
Fig. 3 is the equivalent circuit diagram of the dot structure of Fig. 1.
Please refer to Fig. 3, the storage capacitors of present embodiment comprises the first storage capacitors Cst1 and the second storage capacitors Cst2.The first storage capacitors Cst1 comprises the storage capacitors of public electrode wire 112 and first pixel electrode, 512 formations and the storage capacitors of public electrode wire 112 and the first pixel electrode connecting line, 312 formations; The second storage capacitors Cst2 comprises the storage capacitors of public electrode wire 112 and second pixel electrode, 514 formations and the storage capacitors of public electrode wire 112 and the second pixel electrode connecting line, 314 formations.Wherein, first pixel electrode 512 is the drain electrodes that are electrically connected at thin film transistor (TFT) T1 by contact hole 410, and second pixel electrode 514 is the drain electrodes that are electrically connected at thin film transistor (TFT) T2 by contact hole 410.First pixel electrode 512 and second pixel electrode 514 form liquid crystal capacitance Clc1 and Clc2 with the colored filter (not shown) of offside respectively.Cx is made of the capacitive coupling line 316 and second pixel electrode 514, thereby influences the voltage of second pixel electrode 514.
Though the utility model discloses as above with preferred embodiment; right its is not in order to limit the utility model; any those skilled in the art; in not breaking away from spirit and scope of the present utility model; when doing a little modification and perfect, therefore protection domain of the present utility model is worked as with being as the criterion that claims were defined.
Claims (4)
1, a kind of multi-domain vertical alignment display panels comprises:
Many the controlling grid scan lines that extend along first direction;
Many the data lines that extend along second direction, controlling grid scan line and data line intersect to form pixel region;
Many the public electrode wires that extend along first direction;
Be arranged on thin film transistor (TFT) and pixel electrode in the pixel region, described pixel electrode comprises first pixel electrode insulated from each other and second pixel electrode, and described first pixel electrode links to each other with second thin film transistor (TFT) with the first film transistor respectively with second pixel electrode;
It is characterized in that described first pixel electrode links to each other by the first pixel electrode connecting line, described second pixel electrode links to each other by the second pixel electrode connecting line, and overlap mutually described public electrode wire and pixel electrode connecting line many places.
2, multi-domain vertical alignment display panels as claimed in claim 1 is characterized in that, described the first film transistor has different raceway groove width/length ratio with second thin film transistor (TFT).
3, multi-domain vertical alignment display panels as claimed in claim 1 is characterized in that, described public electrode wire is the H type.
4, as each described multi-domain vertical alignment display panels of claim 1 to 3, it is characterized in that, described display panels also comprises the capacitive coupling line that links to each other with described first pixel electrode, and described capacitive coupling line is positioned at the below of described second pixel electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201565589U CN201298129Y (en) | 2008-12-04 | 2008-12-04 | Multi-domain vertical alignment liquid crystal display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008201565589U CN201298129Y (en) | 2008-12-04 | 2008-12-04 | Multi-domain vertical alignment liquid crystal display panel |
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| CN201298129Y true CN201298129Y (en) | 2009-08-26 |
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| CNU2008201565589U Expired - Lifetime CN201298129Y (en) | 2008-12-04 | 2008-12-04 | Multi-domain vertical alignment liquid crystal display panel |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102253551A (en) * | 2010-12-29 | 2011-11-23 | 友达光电股份有限公司 | Pixel structure |
| CN102436087A (en) * | 2011-12-14 | 2012-05-02 | 深圳市华星光电技术有限公司 | Liquid crystal display (LCD) device and method for reducing parasitic capacitance of same |
| CN102759831A (en) * | 2012-07-18 | 2012-10-31 | 深圳市华星光电技术有限公司 | Pixel structure and corresponding LCD device |
| CN105988251A (en) * | 2015-03-05 | 2016-10-05 | 群创光电股份有限公司 | Display panel and display device |
| CN106873272A (en) * | 2016-12-30 | 2017-06-20 | 深圳市华星光电技术有限公司 | A kind of liquid crystal display panel of multi-domain vertical orientation mode and preparation method thereof |
| US10700101B2 (en) | 2015-03-05 | 2020-06-30 | Innolux Corporation | Display panel and display device |
-
2008
- 2008-12-04 CN CNU2008201565589U patent/CN201298129Y/en not_active Expired - Lifetime
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102253551A (en) * | 2010-12-29 | 2011-11-23 | 友达光电股份有限公司 | Pixel structure |
| CN102253551B (en) * | 2010-12-29 | 2013-03-13 | 友达光电股份有限公司 | Pixel structure |
| US8558980B2 (en) | 2010-12-29 | 2013-10-15 | Au Optronics Corporation | Pixel structure with rectangular common electrode |
| CN102436087A (en) * | 2011-12-14 | 2012-05-02 | 深圳市华星光电技术有限公司 | Liquid crystal display (LCD) device and method for reducing parasitic capacitance of same |
| CN102436087B (en) * | 2011-12-14 | 2014-02-26 | 深圳市华星光电技术有限公司 | Liquid crystal display (LCD) device and method for reducing parasitic capacitance of same |
| CN102759831A (en) * | 2012-07-18 | 2012-10-31 | 深圳市华星光电技术有限公司 | Pixel structure and corresponding LCD device |
| WO2014012268A1 (en) * | 2012-07-18 | 2014-01-23 | 深圳市华星光电技术有限公司 | Pixel structure and corresponding liquid crystal display device |
| CN102759831B (en) * | 2012-07-18 | 2015-01-21 | 深圳市华星光电技术有限公司 | Pixel structure and corresponding LCD device |
| CN105988251A (en) * | 2015-03-05 | 2016-10-05 | 群创光电股份有限公司 | Display panel and display device |
| US10700101B2 (en) | 2015-03-05 | 2020-06-30 | Innolux Corporation | Display panel and display device |
| CN106873272A (en) * | 2016-12-30 | 2017-06-20 | 深圳市华星光电技术有限公司 | A kind of liquid crystal display panel of multi-domain vertical orientation mode and preparation method thereof |
| CN106873272B (en) * | 2016-12-30 | 2020-04-10 | 深圳市华星光电技术有限公司 | Liquid crystal display panel in multi-domain vertical orientation mode and manufacturing method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: NANJING CEC PANDA LCD TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: SVA (GROUP) CO., LTD. Effective date: 20110617 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 200233 BUILDING 3, NO. 757, YISHAN ROAD, XUHUI DISTRICT, SHANGHAI TO: 210038 NO. 9, HENGYI ROAD, NANJING ECONOMIC AND TECHNOLOGICAL DEVELOPMENT ZONE, NANJING CITY, JIANGSU PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20110617 Address after: 210038 Nanjing economic and Technological Development Zone, Jiangsu Province, Hengyi Road, No. 9, No. Patentee after: Nanjing CEC Panda LCD Technology Co., Ltd. Address before: 200233, Shanghai, Yishan Road, No. 757, third floor, Xuhui District Patentee before: SVA (Group) Co., Ltd. |
|
| CX01 | Expiry of patent term |
Granted publication date: 20090826 |
|
| CX01 | Expiry of patent term |