CN100454117C - Picture element structure suitable for wide-angle liquid crystal display and manufacturing method - Google Patents
Picture element structure suitable for wide-angle liquid crystal display and manufacturing method Download PDFInfo
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- CN100454117C CN100454117C CNB2005100761681A CN200510076168A CN100454117C CN 100454117 C CN100454117 C CN 100454117C CN B2005100761681 A CNB2005100761681 A CN B2005100761681A CN 200510076168 A CN200510076168 A CN 200510076168A CN 100454117 C CN100454117 C CN 100454117C
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- 238000004519 manufacturing process Methods 0.000 title abstract description 4
- 238000003860 storage Methods 0.000 claims abstract description 88
- 239000003990 capacitor Substances 0.000 claims abstract description 85
- 238000009413 insulation Methods 0.000 claims description 48
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- 238000000034 method Methods 0.000 claims description 20
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Abstract
The present invention provides a picture element structure suitable for wide visual angle liquid crystal displays, which comprises one pair of grid wires, one pair of data wires, a picture element electrode and a storage capacitor, wherein the grid wires are arranged on a base plate in parallel, the data wires are arranged on the base plate in parallel and vertically crossed on the grid wires in general, and a picture element region is defined on the base plate; the picture element electrode is arranged above the picture element region; the storage capacitor is arranged on the picture element region, generally parallel with one of the grid wires and overlapped with the adjacent grid wire or part of the adjacent grid wire. The present invention also provides a method for producing the picture element structure suitable for wide visual angle liquid crystal displays.
Description
Technical field
The present invention relates to a kind of wide viewing angle display, particularly a kind of dot structure that is applicable to the wide viewing angle display is in order to effective lifting picture quality.
Background technology
LCD (LCD) is utilized the effect of extra electric field, makes liquid crystal molecule rotate and changes the LCD alignment state.LCD changes the variation of the various optical properties produced by liquid crystal alignment, and for example birefringence, optically-active, dichromatism etc. convert thereof into visual variation to reach the purpose of displays image information.Because LCD has thin thickness, in light weight, low power consumption, and characteristics such as low operating voltage, be widely used on the electronic products such as portable personal computer, digital camera, projector at present, and in flat-panel screens market, occupied an important position.
Present LCD is just towards high brightness, high-contrast, wide viewing angle, large tracts of land, and the trend development of full color.Wherein, in order to solve the problem at visual angle, develop and a kind of multi-zone vertical alignment nematic (multi-domain vertical alignment, MVA) LCD, its liquid crystal region that will show usefulness is separated into multiple domain, use that liquid crystal molecule is tilted towards a plurality of directions, and then increase the visual angle of LCD.In this LCD,, need control the orientation of liquid crystal usually with tilt angle (pre-tilt angle) in order accurately to control the vergence direction of liquid crystal molecule.The general common practice is to utilize slit (slit) or produce tilt angle with the combination of teat (protrusion).
Fig. 4 shows the dot structure floor map of traditional multi-domain vertical alignment liquid crystal displays.Dot structure comprises: a substrate 10, gate line 12a and 12b, data line 18a and 18b, a storage capacitors 24, insulation course 25 and a pixel electrode 26. Gate line 12a and 12b and data line 18a and 18b intersect vertically and are arranged on the substrate 10, for example are array basal plate, to constitute a pixel region 20.Pixel region 20 tops are disposed with storage capacitors 24, pixel electrode 26 and are located in therebetween insulation course (protective seam) 25.Typical storage capacitors 24 is positioned at the part in the middle of the pixel region 20, and it comprises: a bottom electrode 12c, a top electrode 18c and the capacitive insulation layer (not shown) between between upper/lower electrode 18c and 12c.Pixel electrode 26 has the slit 26a in order to the generation tilt angle, and it can stride across storage capacitors 24 tops usually.
Because when watching this type LCD, the liquid crystal arrangement of adjacent gate line 12a and 12b both sides is relatively poor, causes the phenomenon of colour cast easily.In order to eliminate this phenomenon, gate line 12a and 12b top can utilize black matrix (black matrix) (not shown) to cover this place usually.Yet, so can influence aperture opening ratio (aperture ratio), be unfavorable for the raising of aperture opening ratio.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of dot structure and manufacture method thereof that is applicable to wide-angle liquid crystal display, it improves colour cast (wash out) phenomenon by the configuration that changes storage capacitors with effective, and keeps simultaneously or even increase aperture opening ratio.
According to above-mentioned purpose, the invention provides a kind of dot structure that is applicable to wide-angle liquid crystal display, it comprises: pair of grid lines, pair of data lines, a pixel electrode and a storage capacitors.This is set in parallel on the substrate gate line, and this is arranged on the substrate to the data line parallel and be vertically intersected on this substantially to gate line, to define a pixel region on substrate.Pixel electrode is arranged at pixel region top, and storage capacitors is arranged at the pixel region top, and it is in substantially parallel relationship to wherein a gate line and or part crossover adjacent with this gate line.Second storage capacitors is arranged at above the pars intermedia of described pixel region, and it is parallel described first and second gate lines substantially, and this first storage capacitors is between this second storage capacitors and first grid polar curve.
According to above-mentioned purpose, the invention provides a kind of one pixel structure process method that is applicable to wide-angle liquid crystal display again.On a substrate, form one first conductive layer, and define first conductive layer, on substrate, to form the pair of grid lines that is parallel to each other substantially.On substrate, form one first insulation course, and cover this gate line.On first insulation course, form one second conductive layer, and define second conductive layer, on first insulation course, to form the bottom electrode of a pair of data lines and a storage capacitors, wherein this is parallel to each other substantially to data line and is vertically intersected on this substantially gate line is formed a pixel region, and the bottom electrode of storage capacitors is in substantially parallel relationship to wherein a gate line and or part crossover adjacent with this gate line.On first insulation course, form one second insulation course, and cover the bottom electrode of first and second data line and storage capacitors.Form a pixel electrode on second insulation course above the pixel region, its part extends the bottom electrode top of storage capacitors, in order to the top electrode as a storage capacitors.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below:
Description of drawings
Figure 1A to 1G shows the floor map according to the one pixel structure process method that is applicable to wide-angle liquid crystal display of the embodiment of the invention.
Fig. 1 G-1 shows the dot structure floor map that is applicable to wide-angle liquid crystal display according to another embodiment of the present invention.
Fig. 2 A to 2G shows among Figure 1A to 1G the diagrammatic cross-section along 2A-2A ', 2B-2B ', 2C-2C ', 2D-2D ', 2E-2E ', 2F-2F ', 2G-2G ' line respectively.
Fig. 3 A to 3C shows among Fig. 1 E to 1G the diagrammatic cross-section along 3A-3A ', 3B-3B ', 3C-3C ' line respectively.
Fig. 4 shows the floor map of the dot structure of traditional wide-angle liquid crystal display.
Symbol description:
Known
10～substrate; 12a, 12b～gate line; 12c～bottom electrode; 18a, 18b～data line; 18c～top electrode; 20～pixel region; 24～storage capacitors; 25～insulation course; 26～pixel electrode; 26a～slit.
The present invention
100～substrate; 102～the first conductive layers; 102a, 102b～gate line; 102c～bridging line; 102d～extend laterally portion; 103～gate electrode; 104～the first insulation courses; 106～amorphous silicon layer; 108～the second conductive layers; 108a, 108b～data line; 108c, 108d, 108e～conductive pattern layer; 110～pixel region; 111a～source electrode; 111b～drain electrode; 112～the second insulation courses; 112a, 112b, 112c, 112d, 112e, 112f～contact hole; 114,118,120,122～storage capacitors; 116～pixel electrode; 116a～slit; 117a, 117b～electrically conducting transparent portion.
Embodiment
Fig. 1 G shows the floor map of the dot structure that is applicable to wide-angle liquid crystal display of the embodiment of the invention.Herein, wide-angle liquid crystal display can be multi-zone vertical alignment nematic (multi-domain verticalalignment, MVA) LCD.Dot structure comprises: a substrate 100, a pixel electrode 116 and a plurality of storage capacitors 114,118,120 and 122.Substrate 100 is provided with at least one pair of parallel gate line 102a and 102b and data line 108a and 108b that at least one pair of is parallel.Data line 108a and 108b are vertically intersected on gate line 102a and 102b substantially, to define a pixel region 110 on substrate 100.
Above pixel region 110, be provided with a thin film transistor (TFT) and a pixel electrode 116.Herein, thin film transistor (TFT) comprises at least: a gate electrode 103 (not shown), as active (raceway groove) layer polysilicon layer 106, source electrode 111a and drain electrode 111b.Gate electrode 103 is electrically connected to gate line 102a, source electrode 111a is electrically connected to pixel electrode 116 and drain electrode 111b is electrically connected to data line 108a.Pixel electrode 116 can be made of a transparency conducting layer, indium tin oxide (ITO) for example, and it has at least one slit 116a, in order to produce tilt angle.
A plurality of storage capacitors 114,118,120 and 122 are arranged at pixel region 110 tops.Storage capacitors 114 is positioned at the part in the middle of the pixel region 110, and is in substantially parallel relationship to gate line 102a and 102b.In the present embodiment, the bottom electrode 102c of storage capacitors 114 is defined by identical conductive layer with gate line 102a and 102b and forms.Moreover top electrode 108e is defined by identical conductive layer with data line 108a and 108b and forms.
In another embodiment, pixel electrode 116 is defined by identical conductive layer with the top electrode of storage capacitors 114 and forms, and need not additionally to be provided with above-mentioned top electrode 108e.
Storage capacitors 122 is parallel and proximity data line 108a substantially.Be same as storage capacitors 114, the bottom electrode 102d of storage capacitors 122 is to be defined by identical conductive layer to form with gate line 102a and 102b.In addition, be same as storage capacitors 118 and 120, pixel electrode 116 is defined by identical conductive layer with the top electrode of storage capacitors 122 and forms.
Fig. 1 G-1 illustrates the floor map of the dot structure that is applicable to wide-angle liquid crystal display according to another embodiment of the present invention, and the parts that wherein are same as Fig. 1 G use identical label, and omit identical or similar explanation herein.In the present embodiment, be different from Fig. 1 G part be to be in substantially parallel relationship to data line 108a storage capacitors 122 can with data line 108a part crossover.Similarly, being in substantially parallel relationship to the storage capacitors 118 and 120 of gate line 102a and 102b respectively can be respectively and gate line 102a and 102b part crossover.
The one pixel structure process method that is applicable to wide-angle liquid crystal display that below cooperates Figure 1A to 1G, Fig. 2 A to 2G and Fig. 3 A to the 3C explanation embodiment of the invention.Wherein, Figure 1A to 1G illustrates the one pixel structure process method floor map of wide-angle liquid crystal display; Fig. 2 A to 2G illustrates among Figure 1A to 1G the diagrammatic cross-section along 2A-2A ', 2B-2B ', 2C-2C ', 2D-2D ', 2E-2E ', 2F-2F ', 2G-2G ' line respectively; Fig. 3 A to 3C illustrates among Fig. 1 E to 1G the diagrammatic cross-section along 3A-3A ', 3B-3B ', 3C-3C ' line respectively.At first, please refer to Figure 1A and 2A, a substrate 100 is provided, for example is by clear glass or the quartzy array base palte that is constituted.On substrate 100, form one first conductive layer 102, for example aluminium, chromium, molybdenum, tungsten, copper or its alloy.Then, please refer to Figure 1B and 2B, define first conductive layer 102, to form gate line 102a and the 102b that is parallel to each other substantially on substrate 100, wherein gate line 102a has a teat 103, in order to the gate electrode as thin film transistor (TFT).Simultaneously, by defining first conductive layer 102, and between gate line 102a and 102b, form a bridging line 102c who is in substantially parallel relationship to gate line 102a and 102b.In the present embodiment, bridging line 102c has substantially parallel and is adjacent to one of the data line that forms subsequently and extends laterally the 102d of portion.An end that extends laterally the 102d of portion can have a teat, and it is substantially parallel and be adjacent to a gate line 102b.Bridging line 102c and extend laterally the 102d of portion in order to respectively as the bottom electrode of subsequent storage electric capacity.
Next, please refer to Fig. 1 C and 2C, on substrate 100, form one first insulation course 104, for example monox or silicon nitride layer, and covering gate polar curve 102a and 102b, gate electrode 103 and bridging line 102c and extend laterally the 102d of portion.Herein, first insulation course 104 is as the gate insulator and the storage capacitors insulation course of thin film transistor (TFT).Afterwards, can be by conventional deposition, for example chemical vapor deposition (CVD) forms a polysilicon or amorphous silicon layer 106 on first insulation course 104 above the gate electrode 103, in order to active (raceway groove) layer as thin film transistor (TFT).
Next, please refer to Fig. 1 D and 2D, on first insulation course 104, form one second conductive layer 108, for example aluminium, chromium, molybdenum, tungsten, copper or its alloy, and covering polysilicon or amorphous silicon layer 106.Then, define second conductive layer 108, forming data line 108a and the 108b be parallel to each other substantially on first insulation course 104, and it is vertically intersected on gate line 102a and 102b substantially and forms a pixel region 110.Simultaneously, by defining this second conductive layer 108, on polysilicon layer (active layer) 106, to form source electrode 111a and drain electrode 111b respectively.In addition, by defining this second conductive layer 108, on first insulation course 104, to form conductive pattern layer 108c, 108d and the 108e that is parallel to each other to gate line 102a and 102b substantially. Conductive pattern layer 108c and 108d are respectively adjacent to gate line 102a and 102b, in order to the bottom electrode as subsequent storage electric capacity.Conductive pattern layer 108e is formed on first insulation course 104 of bridging line 102c top, in order to the top electrode as storage capacitors.In the present embodiment, bridging line 102c, conductive pattern layer 108e and intervenient first insulation course 104 constitute a storage capacitors 114 at pixel region 110 pars intermedias, shown in Fig. 1 E, 2E and 3A.
Next, please refer to Fig. 1 F, 2F and 3B, on first insulation course 104, form one second insulation course (protective seam) 112 and cover data line 108a and 108b, source electrode and drain electrode 111a and 111b and conductive pattern layer 108c, 108d and 108e.Second insulation course 112 can be used as the storage capacitors insulation course alone or with first insulation course 104, and it can be the single or multiple lift structure, for example is silicon oxide layer, silicon nitride layer or its combination.Afterwards, etching second insulation course 112 and/or first insulation course 104, to form a plurality of interlayer holes (contact hole) 112a, 112b, 112c, 112d, 112e and 112f therein wherein, contact hole 112a is used to be electrically connected the pixel electrode of thin film transistor (TFT) and follow-up formation, and contact hole 112b, 112c, 112d, 112e and 112f are then in order to be electrically connected a plurality of storage capacitors.
At last, please refer to Fig. 1 G, 2G and 3C, on second insulation course 112, form a transparency conducting layer (not shown), for example ITO and insert contact hole 112b, 112c, 112d, 112e and 112f.Afterwards, define transparency conducting layer, on second insulation course 112 above the pixel region 110, to form a pixel electrode 116.Pixel electrode 116 has a slit 116a, in order to produce tilt angle.In addition, pixel electrode 116 parts extend the 102d of the portion that the extends laterally top as the conductive pattern layer 108c of storage capacitors bottom electrode and 108d and bridging line 102c, and constitute storage capacitors 118,120 and 122 respectively.
In another embodiment, pixel electrode 116 can be used as the top electrode of storage capacitors 114, and need not to form when defining second conductive layer 108 conductive pattern layer 108e, and forms contact hole 112b when etching second insulation course 112.That is storage capacitors 114 can be by bridging line (bottom electrode) 102c, pixel electrode (top electrode), and 104 and 112 formations of first and second insulation course (capacitive insulation layer).
Simultaneously, by defining transparency conducting layer, above contact hole 112c and contact hole 112d, to form the 117a of electrically conducting transparent portion that separates with pixel electrode 116 and above contact hole 112e and 112f, to form the 117b of electrically conducting transparent portion that separates with pixel electrode 116.Storage capacitors 114,118,120 and 122 is electrically connected to each other by the 117a of electrically conducting transparent portion and 117b and contact hole 112b, 112c, 112d, 112e and 112f.
In addition, those skilled in the art can produce the dot structure shown in Fig. 1 G-1 by the processing step shown in similar Figure 1A to 1G.Be simplified illustration, no longer given unnecessary details herein.
According to dot structure of the present invention, because nontransparent conductive pattern layer 108c and 108d are respectively with gate line 102a and 102b is adjacent or the part crossover, therefore need not the extra black matrix that above gate line, forms and to get rid of the color offset phenomenon that adjacent gate line place produces, help the raising of aperture opening ratio simultaneously.In addition, because the existence of storage capacitors 118,120 and 122, the area of storage capacitors 114 is dwindled, and with the further aperture opening ratio that improves, and effectively promotes picture quality.
Though the present invention with preferred embodiment openly as above; right its is not in order to qualification the present invention, those of ordinary skill in the art, without departing from the spirit and scope of the present invention; when can doing to change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining.
Claims (17)
1. dot structure that is applicable to wide-angle liquid crystal display comprises:
First and second gate line is set in parallel on the substrate;
First and second data line is set in parallel on the described substrate and is vertically intersected on described first and second gate line substantially, to define a pixel region on described substrate;
One pixel electrode is arranged at described pixel region top;
One first storage capacitors is arranged at described pixel region top, and it is parallel described first grid polar curve and or part crossover adjacent with described first grid polar curve substantially; And
One second storage capacitors is arranged at above the pars intermedia of described pixel region, and it is parallel described first and second gate lines substantially, and this first storage capacitors is between this second storage capacitors and described first grid polar curve.
2. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1, wherein said first and second data line are defined by identical conductive layer with the bottom electrode of described first storage capacitors and form.
3. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1, wherein said pixel electrode are defined by identical conductive layer with the top electrode of described first storage capacitors and form.
4. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1 also comprises one the 3rd storage capacitors, is arranged at the pixel region top, and it is parallel described second grid line and or part crossover adjacent with described second grid line substantially.
5. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 4, wherein said first and second data line are defined by identical conductive layer with the bottom electrode of described the 3rd storage capacitors and form.
6. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 4, wherein said pixel electrode are defined by identical conductive layer with the top electrode of described the 3rd storage capacitors and form.
7. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1, wherein said first and second gate line are defined by identical conductive layer with the bottom electrode of described second storage capacitors and form.
8. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1, wherein said first and second data line are defined by identical conductive layer with the top electrode of described second storage capacitors and form.
9. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1, wherein said pixel electrode are defined by identical conductive layer with the top electrode of described second storage capacitors and form.
10. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 1 also comprises one the 4th storage capacitors, is arranged at described pixel region top, and it is in substantially parallel relationship to described first data line and or part crossover adjacent with described first data line.
11. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 10, wherein said first and second gate line are defined by identical conductive layer with the bottom electrode of described the 4th storage capacitors and form.
12. the dot structure that is applicable to wide-angle liquid crystal display as claimed in claim 10, wherein said pixel electrode are defined by identical conductive layer with the top electrode of described the 4th storage capacitors and form.
13. an one pixel structure process method that is applicable to wide-angle liquid crystal display comprises:
On a substrate, form one first conductive layer;
Define described first conductive layer, on described substrate, forming first and second gate line be parallel to each other substantially, and between described first and second gate line, form the bottom electrode of the second parallel storage capacitors substantially;
On described substrate, form one first insulation course, and cover described first and this second grid line;
On described first insulation course, form one second conductive layer;
Define described second conductive layer, on described first insulation course, to form one first data line, one second data line, and the bottom electrode of one first storage capacitors, wherein said first and second data line is parallel to each other substantially and is vertically intersected on described first and second gate line substantially and forms a pixel region, the bottom electrode of described first storage capacitors is in substantially parallel relationship to described first grid polar curve and or part crossover adjacent with first grid polar curve, and the bottom electrode of this first storage electrode is between the bottom electrode and this first grid polar curve of this second storage capacitors;
On described first insulation course, form one second insulation course, and cover described first data line, described second data line, and the bottom electrode of described first storage capacitors; And
Form a pixel electrode on second insulation course above the described pixel region, its part extends the bottom electrode top of described first storage capacitors, in order to the top electrode as described first storage capacitors.
14. the one pixel structure process method that is applicable to wide-angle liquid crystal display as claimed in claim 13 also comprises:
On the bottom electrode of described second storage capacitors, cover described first insulation course; And
By defining described second conductive layer, on described first insulation course above the bottom electrode of this second storage capacitors, to form the top electrode of described second storage capacitors.
15. the one pixel structure process method that is applicable to wide-angle liquid crystal display as claimed in claim 13 also comprises:
On the bottom electrode of described second storage capacitors, cover described first and second insulation course; And
On described second insulation course above the bottom electrode of described second storage capacitors, form this pixel electrode, in order to top electrode as described second storage capacitors.
16. the one pixel structure process method that is applicable to wide-angle liquid crystal display as claimed in claim 13 also comprises:
By defining the 3rd conductive layer, to form the bottom electrode of one the 3rd storage capacitors on described first insulation course, it is in substantially parallel relationship to described second grid line and or part crossover adjacent with described second grid line;
On the bottom electrode of described the 3rd storage capacitors, cover described second insulation course; And
On described second insulation course above the bottom electrode of described the 3rd storage capacitors, form described pixel electrode, in order to top electrode as the 3rd storage capacitors.
17. the one pixel structure process method that is applicable to wide-angle liquid crystal display as claimed in claim 13 also comprises:
By defining described first conductive layer, to form the bottom electrode of one the 4th storage capacitors on described substrate, it is in substantially parallel relationship to described first data line and or part crossover adjacent with first data line;
On the bottom electrode of described the 4th storage capacitors, cover described first and second insulation course successively; And
On second insulation course above the bottom electrode of described the 4th storage capacitors, form described pixel electrode, in order to top electrode as the 4th storage capacitors.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2005100761681A CN100454117C (en) | 2005-06-08 | 2005-06-08 | Picture element structure suitable for wide-angle liquid crystal display and manufacturing method |
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| CNB2005100761681A CN100454117C (en) | 2005-06-08 | 2005-06-08 | Picture element structure suitable for wide-angle liquid crystal display and manufacturing method |
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| CN100454117C true CN100454117C (en) | 2009-01-21 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1317711A (en) * | 2000-03-06 | 2001-10-17 | 株式会社日立制作所 | Liquid crystal having controlled storage capacitor |
| JP2001331125A (en) * | 2000-03-17 | 2001-11-30 | Seiko Epson Corp | Electro-optical device |
| CN1488083A (en) * | 2001-09-26 | 2004-04-07 | 三星电子株式会社 | Thin film transistor array substrate of liquid crystal display device and producing method thereof |
| US20040174483A1 (en) * | 2003-03-07 | 2004-09-09 | Yayoi Nakamura | Liquid crystal display device having auxiliary capacitive electrode |
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2005
- 2005-06-08 CN CNB2005100761681A patent/CN100454117C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1317711A (en) * | 2000-03-06 | 2001-10-17 | 株式会社日立制作所 | Liquid crystal having controlled storage capacitor |
| JP2001331125A (en) * | 2000-03-17 | 2001-11-30 | Seiko Epson Corp | Electro-optical device |
| CN1488083A (en) * | 2001-09-26 | 2004-04-07 | 三星电子株式会社 | Thin film transistor array substrate of liquid crystal display device and producing method thereof |
| US20040174483A1 (en) * | 2003-03-07 | 2004-09-09 | Yayoi Nakamura | Liquid crystal display device having auxiliary capacitive electrode |
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