CN104007574B - A kind of array base palte, display device and its manufacture method - Google Patents
A kind of array base palte, display device and its manufacture method Download PDFInfo
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- CN104007574B CN104007574B CN201410274216.7A CN201410274216A CN104007574B CN 104007574 B CN104007574 B CN 104007574B CN 201410274216 A CN201410274216 A CN 201410274216A CN 104007574 B CN104007574 B CN 104007574B
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Abstract
The invention discloses a kind of array base palte, display device and its manufacture method, it on array base palte by setting by first, two public electrode wires surround the pixel region to be formed, scan line is arranged in pixel zone centerline with data wire, and form active member in its intersection region, pixel electrode is connected to the storage electrode and common electrode formation storage capacitance of the first metal layer by contact hole, and before pixel electrode formation, in formation black organic insulator on array base palte, pass through intermediate tone mask version or gray tone mask plate photoetching process, and form the first elevational pattern and the second elevational pattern, wherein, first elevational pattern is support column, second elevational pattern is black matrix".The display device of the present invention also includes colored filter substrate and the display medium being folded between two substrates.One of manufacture craft can be reduced by the present invention, process costs are reduced, product qualification rate is improved.
Description
Technical field
The present invention relates to display technology field, more particularly, to a kind of array base palte, display device and its manufacture method
Structure and its manufacture method.
Background technology
Fig. 1 is the diagrammatic cross-section of display device in the prior art, as shown in figure 1, electro-optical display device, it includes array
Substrate 11, colored filter substrate 13 and the display dielectric layer 13 being located between the two substrates, backlight 14 is from array base
The side of plate 11 is incident, posts array side Polarizer 115 and colorized optical filtering respectively on array base palte 11 and colored filter substrate
Piece lateral deviation tabula rasa 124.
Wherein, gate metal layer 111, gate insulator, semiconductor layer 112, source and drain gold are generally comprised on array base palte 11
Belong to layer 113, source and drain insulating barrier, organic insulator, pixel electrode layer 114, and formed by 5 to 6 film-forming process；Colorized optical filtering
Piece side includes black-matrix layer 121, color blocking layer 122, such as green color blocking layer, red color resistance layer, blue color blocking layer, common electrode
Layer 123, support column layer (PS), and typically pass through 6 film-forming process completions.
In the manufacture craft of display device, per one of technique is made, the probability of the unqualified generation of panel will be increased more,
In addition, after film forming completion, the Anawgy accuracy of colored filter substrate and array base palte can also influence the qualification rate of product, patch
Conjunction is bad to cause product light leak.
The content of the invention
In view of this, for deficiency of the prior art, the present invention provides a kind of array base palte, display device and its manufacture
Method, the present invention is shared by part film material on colored filter substrate and array base palte, it is possible to reduce membrane formation times, section
Material saving, reduces disqualification rate, reduces the cost of product.
One embodiment of the invention provides a kind of array base palte, and it includes：One substrate, is provided with：A plurality of first is public
Common-battery polar curve, with the discontinuous distributing line for being uniformly distributed gap；A plurality of second public electrode wire, with a plurality of first common electrical
Polar curve interconnection surrounds pixel region array；A plurality of data lines, each data wire is arranged on each pixel region
On median vertical line, and through to should the first public electrode wire the gap；Multi-strip scanning line, each scan line is arranged on
On the horizontal central line of each pixel region, and with a plurality of data wire it is intersected with each other set；Active member, is arranged at each be somebody's turn to do
Data wire and each scan line intersection region；Multiple pixel electrodes, each pixel electrode passes through the first contact hole and the master
Dynamic element is electrically connected with；Multiple storage electrodes, are configured at the lower section of the pixel electrode, and with first public electrode wire with being somebody's turn to do
The view field of second public electrode wire intersection region is overlapping, and the storage electrode passes through the second contact hole and pixel electrode electricity
Property connection；Black organic insulator, is configured at below the pixel electrode, and forms the first elevational pattern and the second height map
Case, wherein, the first elevational pattern is support column, and the second elevational pattern is black matrix".
Preferably, the different pattern of the both heights is exposed and formed by intermediate tone mask version or gray tone mask plate.
Preferably, the black matrix" covers the scan line, the storage electrode, the data wire, first and second public electrode
Line, the active member, the support column are evenly arranged in the scan line and data wire intersection region and/or first and second public power
Polar curve intersection region.
The present invention is based on above-described embodiment, additionally provides a kind of display device, it includes the battle array as described in above-mentioned embodiment
Row substrate, in addition to a counter substrate, the substrate is the glass substrate covered with ITO, the array base palte and the counter substrate it
Between be folded with display dielectric layer.
The present invention is based on above-described embodiment, additionally provides a kind of manufacture method of array base palte, it comprises the following steps：
A. the first metal layer is formed on array base palte, it includes scan line, storage electrode；
B. semiconductor layer is formed；
C. second metal layer is formed, it includes the source of thin film transistor (TFT), drain electrode, data wire, and first and second public electrode
Line；
D. an insulating barrier is formed, organic insulator is covered thereon, using intermediate tone mask version or gray level mask plate photoetching
The different pattern of technique formation both heights, the first elevational pattern is support column, and the second elevational pattern is black matrix"；
E. the first contact hole and the second contact hole are formed；
F. the pixel electrode is formed.
Preferably, in the step a, the first metal layer is metal Ti, Al, Cu, Mo or one or more group
Into metal alloy, the first metal layer thickness be 1000-5000A.
Preferably, in the step b, semi-conducting material is non-crystalline silicon, polysilicon or oxide semiconductor, its thickness
For 500A to 3000A；
Preferably, in the step b, data wire is metal Al, then is additionally included in source-drain electrode position and sets semiconductor
Etching barrier layer.
Preferably, in the step d, the second metal layer is metal Ti, Al, Cu, Mo or one or more group
Into metal alloy, the thickness of the second metal layer is 1000-5000A.
Preferably, source and drain insulating barrier, it is SiO2, SiNx or Al2O3, and the thickness of the insulating barrier is 1000A -4000A,
Organic insulator is black organic material.
The present invention compared with prior art, the advantage is that：By setting black organic insulation, while forming black
Matrix and support column, can effectively reduce the technological process of liquid crystal panel, the qualification rate of product be improved, additionally, due to black square
Battle array is located on array base palte, and colored filter substrate and array base palte do not have aligning accuracy requirement, therefore, the qualification rate of product
It can be further improved.
Brief description of the drawings
Fig. 1 is the diagrammatic cross-section of display device in the prior art；
Fig. 2 is the diagrammatic cross-section of display device of the present invention；
Fig. 3 is the dot structure schematic diagram on array base palte in Fig. 2 of the present invention；
Fig. 4 (a) is the plan of the first metal layer pattern of dot structure shown in Fig. 3 of the present invention；
Fig. 4 (b) is the profile in the first metal layer pattern AA ' directions of dot structure shown in Fig. 3 of the present invention；
Fig. 5 (a) is the plan of the semiconductor layer pattern of dot structure shown in Fig. 3 of the present invention；
Fig. 5 (b) is the profile in the semiconductor layer pattern AA ' directions of dot structure shown in Fig. 3 of the present invention；
Fig. 6 (a) is the plan of the second metal layer pattern of dot structure shown in Fig. 3 of the present invention；
Fig. 6 (b) is the profile in the second metal layer pattern AA ' directions of dot structure shown in Fig. 3 of the present invention；
Fig. 7 (a) is the plan of the black organic insulation layer pattern of dot structure shown in Fig. 3 of the present invention；
Fig. 7 (b) is the profile in the black organic insulation layer pattern AA ' directions of dot structure shown in Fig. 3 of the present invention；
Fig. 8 (a) is the plan of the contact hole pattern of dot structure shown in Fig. 3 of the present invention；
Fig. 8 (b) is the profile in the contact hole pattern AA ' directions of dot structure shown in Fig. 3 of the present invention；
Fig. 9 (a) is the plan of the pixel electrode pattern of dot structure shown in Fig. 3 of the present invention；
Fig. 9 (b) is the profile in the pixel electrode pattern AA ' directions of dot structure shown in Fig. 3 of the present invention；
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
Fig. 2 is the diagrammatic cross-section of display device of the present invention.As shown in Fig. 2 the present invention provides a kind of display device, in battle array
Be sequentially distributed on row substrate 21 scan line 23, the pattern of the first metal layer of storage electrode formation, insulating barrier, semiconductor layer 24,
Data wire 25, source-drain electrode, pattern, insulating barrier, the black organic insulation of the second metal layer of first and second public electrode wire formation
Layer, forms the different pattern of both heights, wherein, the first elevational pattern is support column 27, the second elevational pattern be black matrix" 26,
Contact hole 28, pixel electrode 29；Transparent ito surface electrode 20 is dispersed with colored filter substrate 22.
Fig. 3 is the dot structure schematic diagram on array base palte in Fig. 2 of the present invention.As shown in figure 3, the present invention also provides a kind of
Array base palte, it includes a substrate, and such as glass substrate is provided with：A plurality of first public electrode wire 36, with being uniformly distributed
The discontinuous distributing line in gap；A plurality of second public electrode wire 36, picture is surrounded with a plurality of first public electrode wire interconnection
Plain area array；A plurality of data lines 34, each data wire is arranged on the median vertical line of each pixel region, and is passed through
To should the first public electrode wire the gap；Multi-strip scanning line 31, each scan line is arranged on each pixel region
Horizontal central line on, and with a plurality of data wire it is intersected with each other set；Active member, such as thin film transistor (TFT), it includes semiconductor
Layer 33, source electrode 34, drain electrode 36, are arranged at each data wire and each scan line intersection region；Multiple pixel electrodes, it is each
The pixel electrode is electrically connected with by the first contact hole 38 and the active member；Multiple storage electrodes 32, are configured at pixel electricity
The lower section of pole, and it is overlapping with the view field of the intersection region of the second public electrode wire 35 with first public electrode wire 35,
And the storage electrode 32 is electrically connected with by the second contact hole with the pixel electrode 39；Black organic insulator 37, is configured at
The lower section of pixel electrode 39, and the different pattern of both heights is formed, wherein, the first elevational pattern is support column, the second height map
Case is black matrix".
As an embodiment, the difference of dot structure that the embodiment is provided and preparation method thereof and above-described embodiment only exists
In：In the lower section of the pixel electrode, the first area of the storage electrode and first public electrode wire and second common electrical
The view field of polar curve partly overlaps to form storage capacitance.
Difference of the dot structure provided as a preferred embodiment, the embodiment and preparation method thereof with above-described embodiment
It is only that：In the lower section of the pixel electrode, the first area of the storage electrode and first public electrode are second public with this
The completely overlapped formation storage capacitance of view field of electrode.
The present invention to be formed by being surrounded in the public electrode wire of four borders of pixel configuration shading, can greatly improve picture
The aperture opening ratio of element.The storage capacitance that storage electrode is overlapped to form with public electrode wire can be when upper lower metal layer shifts certainly
The size of dynamic compensation storage capacitance.
In the prior art, the black-matrix layer on colored filter substrate is needed using two mask plate twice with PS layers
Manufacturing process is formed, and uses array base palte of the present invention, by setting black organic insulation layer pattern while forming black
Color matrix layer and support column layer, therefore, it can reduce by mask plate technique with together with, so as to save process costs.In addition, this
The black organic insulator is invented in addition to the interception for playing black matrix", also as organic insulator, completely cuts off pixel
Electricity interference between electrode and metal wire.
The embodiment of array base palte of the present invention, its decomposition texture and corresponding manufacture method are as follows：
Step a, sputtering forms the first metal layer on array base palte 40, and the first metal layer can be Ti, Al, Cu, Mo etc.
Metal or alloy, the thickness of the first metal layer isUsing first mask plate, by the coating of photoresist,
Pattern of the technique formation such as exposure, development, etching as shown in Fig. 4 (a).In Fig. 4 (a), middle pattern is scan line 41, left
Inferior horn and the pattern in the upper right corner are storage electrode 42.Shown in corresponding diagram 4 (a) dotted line AA ' cross-section structure such as Fig. 4 (b).
Step b, on the pattern of the first metal layer, forms transparent gate insulator 50 with chemical vapor deposition method.
In the disposed thereon semiconductive thin film of gate insulator 50, semi-conducting material can be non-crystalline silicon, polysilicon or oxide half
Conductor etc., thickness isExtremelyUsing second mask plate, pass through the coating of photoresist, exposure, development, etching etc.
Pattern of the technique formation as shown in Fig. 5 (a).In Fig. 5 (a), the pattern above scan line is semiconductor channel layer 51.Corresponding diagram
Shown in 5 (a) dotted line AA ' cross-section structure such as Fig. 5 (b).
Step c, on the pattern of semiconductor layer, sputtering forms second layer metal film.Second metal layer can for Ti,
The metal or alloys such as Al, Cu, Mo, the thickness of Source and drain metal level isUsing the 3rd mask plate, pass through photoetching
Pattern of the techniques such as coating, exposure, development, the etching of the glue formation as shown in Fig. 6 (a).In Fig. 6 (a), run through above and below centre
Pattern is that the pattern run through above and below data wire 61, left and right is left and right extension on public electrode wire main line 63, public electrode wire main line
Be public electrode wire subordinate line 64.In the region of data wire 61 and scanning line overlap, form TFT in the top of semiconductor layer and open
Close.The grid of TFT switch is scan line, and the source electrode of TFT switch is data wire 61, and the drain electrode 62 of TFT switch and data wire 61 are same
Layer.If metal wire upper strata is Al, it is necessary to metal at contact hole is designed as U-shaped.Corresponding diagram 6 (a) dotted line AA ' cross-section structure
As shown in Fig. 6 (b).
Step d, on the pattern of second metal layer, forms transparent protection insulating barrier 70 with chemical vapor deposition method.
It can be SiO2, SiNx or Al2O3 etc. to protect insulating barrier, and the thickness of protection insulating barrier isIt is exhausted in protection
The top of edge layer 70 is coated with the organic insulating film of one layer of black.The thickness of the organic insulating film of black is 0.5~2um.Utilize
Four mask plates, pass through pattern of the technique formation such as exposure, development as shown in Fig. 7 (a).4th mask plate is intermediate tone mask
Version or gray tone mask plate, the organic exhausted of highly different black is formed using intermediate tone mask version or gray tone mask plate
Film patterns.It is the PS71 that thickness is of a relatively high above TFT devices in Fig. 7 (a), the top of other metal wires is thickness phase
To relatively low black matrix" 72.Shown in corresponding diagram 7 (a) dotted line AA ' cross-section structure such as Fig. 7 (b).
Step e, on the organic insulating film pattern and protection insulating barrier of black, using the 5th mask plate, passes through photoetching
Pattern of the techniques such as coating, exposure, development, the etching of the glue formation as shown in Fig. 8 (a).In Fig. 8 (a), TFT switch or so leakage
Contact hole 82 above pole is used to connect pixel electrode；The contact hole 81 above storage electrode is used to connect pixel electrode up and down.
Be connected simultaneously with pixel electrode by contact hole 81 and contact hole 82, the drain signal of TFT switch pass to simultaneously pixel electrode and
Storage electrode.Shown in corresponding diagram 8 (a) dotted line AA ' cross-section structure such as Fig. 8 (b).
Step f, the top of organic insulating film pattern, protection insulating barrier and contact hole in black, sputtering forms transparent
Conductive film.The thickness of ito thin film isExtremelyUsing the 6th mask plate, by the coating of photoresist, exposure,
Pattern of the technique formation such as development, etching as shown in Fig. 9 (a).In Fig. 9 (a), transparent conductive film is covered in pixel and opened
The top of mouth region, forms the region of pixel electrode 91, there is 2um overlay region in surrounding and the public electrode wire of pixel electrode 91
Domain.Shown in corresponding diagram 9 (a) dotted line AA ' cross-section structure such as Fig. 9 (b).
As another embodiment, the difference of dot structure that the embodiment is provided and preparation method thereof and above-described embodiment is only
It is：The storage electrode is configured at the upper left corner and bottom right of first public electrode wire and the second public electrode wire view field
The first area at angle, and the storage electrode configures the second bump region in the non-projection lap, forms this thereon and second connects
Contact hole, for the equipotential link between the pixel electrode.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited thereto, any
Those familiar with the art the invention discloses technical scope in, change or replacement can be readily occurred in, should all be contained
Cover within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (9)
1. a kind of array base palte, it includes：
One substrate, is provided with：
A plurality of first public electrode wire；
A plurality of second public electrode wire, pixel region array is surrounded with a plurality of first public electrode wire interconnection；
A plurality of data lines, each data wire is arranged in the vertical direction of each pixel region；
Multi-strip scanning line, each scan line is arranged in the horizontal direction of each pixel region, and with a plurality of data
Line is intersected with each other to be set；
Active member, is arranged at each data wire and each scan line intersection region；
Multiple pixel electrodes, each pixel electrode is electrically connected with by the first contact hole and the active member；
Black organic insulator, is configured at below the pixel electrode, and forms the first elevational pattern and the second elevational pattern, its
In, the first elevational pattern is support column, and the second elevational pattern is black matrix"；
Storage electrode, is configured at the upper left corner and the lower right corner of first public electrode wire and the second public electrode wire view field
First area, and the storage electrode the non-projection lap configure the second bump region, form the second contact hole thereon,
For the equipotential link between the pixel electrode；
Or storage electrode, it is configured at the lower left corner and the right side of first public electrode wire and the second public electrode wire view field
The first area at upper angle, and the storage electrode configures the second bump region in the non-projection lap, forms second thereon and connects
Contact hole, for the equipotential link between the pixel electrode.
2. array base palte as claimed in claim 1, wherein, first elevational pattern and second elevational pattern pass through halftoning
Mask plate or gray tone mask plate expose to be formed.
3. array base palte as claimed in claim 1, wherein, the black matrix" covers the scan line, the storage electrode, the data
Line, first and second public electrode wire, the active member, the support column are evenly arranged in the scan line and data wire intersection region
And/or the first and second public power polar curve intersection region.
4. a kind of display device, it includes array base palte as claimed in claim 1, in addition to a counter substrate, and the substrate is
Glass substrate covered with ITO, display dielectric layer is folded between the array base palte and the counter substrate.
5. a kind of manufacture method of array base palte as claimed in claim 1, it comprises the following steps：
A. the first metal layer is formed on array base palte, it includes scan line, storage electrode；
B. semiconductor layer is formed；
C. second metal layer is formed, it includes the source of thin film transistor (TFT), drain electrode, data wire, and first and second public electrode；
D. an insulating barrier is formed, organic insulator is covered thereon, using intermediate tone mask version or gray level mask plate photoetching process
The different pattern of both heights is formed, the first elevational pattern is support column, and the second elevational pattern is black matrix"；
E. the first contact hole and the second contact hole are formed；
F. the pixel electrode is formed.
6. the manufacture method of array base palte as claimed in claim 5, wherein, in the step a, the first metal layer is metal
Ti, Al, Cu, Mo or one or more composition metal alloy, the first metal layer thickness are 1000-5000A.
7. the manufacture method of array base palte as claimed in claim 5, wherein, in the step b, semi-conducting material is amorphous
Silicon, polysilicon or oxide semiconductor, its thickness are 500A to 3000A.
8. the manufacture method of array base palte as claimed in claim 5, wherein, in the step d, the second metal layer is metal
Ti, Al, Cu, Mo or one or more composition metal alloy, the thickness of the second metal layer is 1000-5000A.
9. the manufacture method of array base palte as claimed in claim 5, wherein, insulating barrier, it is SiO2, SiNx or Al2O3, and this is exhausted
The thickness of edge layer is 1000A -4000A, and organic insulator is black organic material.
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104614908B (en) * | 2015-02-02 | 2017-08-25 | 深圳市华星光电技术有限公司 | A kind of array base palte and liquid crystal display panel |
| CN104834137B (en) * | 2015-05-07 | 2018-02-16 | 合肥京东方光电科技有限公司 | Array base palte, color membrane substrates, display panel and display device |
| CN105093750B (en) * | 2015-08-14 | 2018-11-23 | 深圳市华星光电技术有限公司 | Tft array substrate structure and preparation method thereof |
| CN105223749A (en) * | 2015-10-10 | 2016-01-06 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
| KR102467353B1 (en) * | 2015-11-27 | 2022-11-15 | 삼성디스플레이 주식회사 | Display substrate, method of manufacturing a display substrate, and display device including a display substrate |
| CN107204325B (en) * | 2017-05-25 | 2023-06-02 | 成都线易科技有限责任公司 | Capacitor array and method of manufacture |
| CN107300803A (en) * | 2017-08-10 | 2017-10-27 | 深圳市华星光电半导体显示技术有限公司 | Semi-penetrated semi-reflected liquid crystal display |
| WO2022127396A1 (en) * | 2020-12-18 | 2022-06-23 | 京东方科技集团股份有限公司 | Display substrate, manufacturing method therefor, and display device |
| CN114236898A (en) * | 2021-12-30 | 2022-03-25 | 深圳莱宝高科技股份有限公司 | Liquid crystal display screen display bottom plate and manufacturing method thereof |
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