CN106847930A - 薄膜晶体管、阵列基板及制备方法 - Google Patents

薄膜晶体管、阵列基板及制备方法 Download PDF

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CN106847930A
CN106847930A CN201710214502.8A CN201710214502A CN106847930A CN 106847930 A CN106847930 A CN 106847930A CN 201710214502 A CN201710214502 A CN 201710214502A CN 106847930 A CN106847930 A CN 106847930A
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tft
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薛大鹏
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BOE Technology Group Co Ltd
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Abstract

本申请提供了一种薄膜晶体管、阵列基板及制备方法,用以提高TFT的性能和稳定性,本申请提供的一种薄膜晶体管,包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料。

Description

薄膜晶体管、阵列基板及制备方法
技术领域
本申请涉及显示技术领域,特别是涉及一种薄膜晶体管、阵列基板及制备方法。
背景技术
薄膜晶体管(Thin-film transistor,TFT)是场效应晶体管的一种,被广泛应用于显示领域,对显示器件的工作性能具有十分重要的作用。
现有技术中薄膜晶体管可分为底栅型薄膜晶体管(如图1所示)和顶栅型薄膜晶体管(如图2所示),一般包括:栅极1、栅绝缘层2、有源层3、源极4、和漏极5。通常使用铟镓锌氧化物(IGZO)作为有源层,而薄膜晶体管中的绝缘层的材料通常使用氧化硅(SiO2)、氮化硅(SiNx)、氮氧化硅(SiON)其中之一或组合,一方面,SiO2、SiNx、SiON本身含有H、O等影响TFT的性能的元素,另一方面,SiO2、SiNx、SiON对水、氧的阻隔能力有限,以致H、O等容易扩散到有源层中,从而影响TFT的性能和稳定性。
基于此,如何提高TFT的性能和稳定性,是本领域技术人员亟待解决的技术问题。
发明内容
本申请实施例提供了一种薄膜晶体管、阵列基板及制备方法,用以提高TFT的性能和稳定性。
本申请实施例提供的一种薄膜晶体管,包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料。
本申请实施例提供的薄膜晶体管,包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料,由于栅绝缘层的材料为掺氟石墨烯材料,而掺氟石墨烯材料本身不含有H、O等影响TFT的性能的元素,且对水、氧的阻隔能力强,使得H、O等不容易扩散到有源层中,从而可以提高TFT的性能和稳定性。
较佳地,所述源漏极的整个表面与所述有源层的表面接触。
本申请实施例还提供了一种阵列基板,包括:本申请任意实施例提供的薄膜晶体管,设置于所述薄膜晶体管上方的钝化层,以及与所述薄膜晶体管的漏极电连接的像素电极。
由于本申请实施例提供的阵列基板采用了上述的薄膜晶体管,而上述的薄膜晶体管包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料,由于栅绝缘层的材料为掺氟石墨烯材料,而掺氟石墨烯材料本身不含有H、O等影响TFT的性能的元素,且对水、氧的阻隔能力强,使得H、O等不容易扩散到有源层中,从而可以提高TFT的性能和稳定性。
较佳地,所述钝化层的材料为掺氟石墨烯材料。
由于薄膜晶体管上方的钝化层的材料也为掺氟石墨烯材料,这样可以使得H、O等更加不容易扩散到有源层中,从而可以进一步提高TFT的性能和稳定性。
较佳地,所述像素电极的材料为石墨烯材料,所述钝化层与所述像素电极同层设置。
由于钝化层与像素电极同层设置,因此可以简化工艺。
本申请实施例还提供了一种薄膜晶体管的制备方法,包括:在基板上形成栅极、栅绝缘层、有源层、和源漏极,其中,形成栅绝缘层,具体包括:
形成石墨烯层,将氟离子掺杂到所述石墨烯层,形成栅绝缘层。
采用该方法制备的薄膜晶体管,包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料,由于栅绝缘层的材料为掺氟石墨烯材料,而掺氟石墨烯材料本身不含有H、O等影响TFT的性能的元素,且对水、氧的阻隔能力强,使得H、O等不容易扩散到有源层中,从而可以提高TFT的性能和稳定性。
较佳地,形成有源层和源漏极,具体包括:
采用半色调掩膜工艺,共用一张掩膜板形成有源层和源漏极。
该方法采用半色调掩膜工艺形成有源层和源漏极,只需使用一张掩膜板,通过一次工艺,就可形成有源层和源漏极,因此,可以简化工艺,节约生产成本,提高生产能力。
本申请实施例还提供了一种阵列基板的制备方法,包括:
本申请任意实施例提供的制备薄膜晶体管的步骤,在所述薄膜晶体管上方制备钝化层的步骤,以及制备与所述薄膜晶体管的漏极电连接的像素电极的步骤。
采用该方法制备的阵列基板,包括薄膜晶体管,而薄膜晶体管包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料,由于栅绝缘层的材料为掺氟石墨烯材料,而掺氟石墨烯材料本身不含有H、O等影响TFT的性能的元素,且对水、氧的阻隔能力强,使得H、O等不容易扩散到有源层中,从而可以提高TFT的性能和稳定性。
较佳地,形成钝化层,具体包括:
形成石墨烯层,将氟离子掺杂到所述石墨烯层,形成钝化层。
采用该方法形成的钝化层的材料也为掺氟石墨烯材料,这样可以使得H、O等更加不容易扩散到有源层中,从而可以进一步提高TFT的性能和稳定性。
较佳地,形成钝化层和像素电极,具体包括:
形成石墨烯层;
通过一张掩膜板,在用于形成像素电极的区域之外的所述石墨烯层中掺杂氟离子,将所述石墨烯层中掺杂氟离子的部分作为钝化层,未掺杂氟离子的部分作为像素电极。
采用该方法制备的阵列基板,形成钝化层和像素电极时仅使用了一张掩膜板,可通过一次工艺完成,因此,可以简化工艺,节约生产成本,提高生产能力。
附图说明
图1为现有技术中底栅型薄膜晶体管的结构示意图;
图2为现有技术中顶栅型薄膜晶体管的结构示意图;
图3为本申请实施例提供的一种薄膜晶体管的结构示意图;
图4为本申请实施例提供的第一种阵列基板的结构示意图;
图5为本申请实施例提供的第二种阵列基板的结构示意图;
图6(a)~图6(g)为本申请实施例提供的阵列基板的制备工艺流程示意图。
具体实施方式
本申请实施例提供了一种薄膜晶体管、阵列基板及制备方法,用以提高TFT的性能和稳定性。
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
需要说明的是,本申请附图中各层的厚度和形状不反映真实比例,目的只是示意说明本申请内容。
本申请实施例提供的技术方案即适用于底栅型薄膜晶体管,也适用于顶栅型薄膜晶体管,下面以底栅型薄膜晶体管为例来说明本申请实施例提供的技术方案。
参见图3,本申请实施例提供的一种薄膜晶体管,包括:栅极11、栅绝缘层12、有源层13和源漏极14,栅绝缘层12的材料为掺氟石墨烯材料。
由于栅绝缘层12的材料为掺氟石墨烯材料,而掺氟石墨烯材料本身不含有H、O等影响TFT的性能的元素,且对水、氧的阻隔能力强,使得H、O等不容易扩散到有源层中,从而可以提高TFT的性能和稳定性。
在一较佳实施方式中,如图3所示,源漏极14的整个表面与有源层13的表面接触。
基于同一发明构思,本申请实施例还提供了一种薄膜晶体管的制备方法,包括:在基板上形成栅极、栅绝缘层、有源层、和源漏极,其中,形成栅绝缘层,具体包括:
形成石墨烯层,将氟离子掺杂到所述石墨烯层,形成栅绝缘层。
其中,将氟离子掺杂到石墨烯层,例如可以包括:采用离子注入工艺将氟离子注入到石墨烯层,以在石墨烯层中掺杂氟离子。
具体地,例如可以是采用SF6等离子体通过离子注入工艺,将氟离子注入到石墨烯层,以在石墨烯层中掺杂氟离子。
当然,也可以采取其它的方式将氟离子掺杂到石墨烯层,本申请实施例对此并不进行限定。
在一较佳实施方式中,形成有源层和源漏极,具体包括:
采用半色调掩膜工艺,共用一张掩膜板形成有源层和源漏极。
该方法采用半色调掩膜工艺形成有源层和源漏极,只需使用一张掩膜板,通过一次工艺,就可形成有源层和源漏极,因此,可以简化工艺,节约生产成本,提高生产能力。
当然,本申请实施例中形成有源层和源漏极也可采用现有技术中的两张掩膜板来分别形成,本申请实施例对此并不进行限定。
基于同一发明构思,参见图4,本申请实施例还提供了一种阵列基板,包括:本申请任意实施例提供的薄膜晶体管15(如图4中虚线框所示),设置于薄膜晶体管15上方的钝化层16,以及与薄膜晶体管15的漏极141电连接的像素电极17。
在一较佳实施方式中,如图4所示,钝化层16的材料为掺氟石墨烯材料。
在一较佳实施方式中,为了提高TFT的性能,以及便于生产,栅绝缘层12和钝化层16的材料均为掺氟石墨烯材料,且栅绝缘层12和钝化层16的材料的掺氟比例相同。
在一较佳实施方式中,如图4所示,钝化层16的材料为掺氟石墨烯材料,像素电极17的材料为石墨烯材料,钝化层16与像素电极17同层设置。
需要指出的是,上述较佳实施方式中钝化层16与像素电极17同层设置,若薄膜晶体管为底栅型薄膜晶体管,像素电极17与漏极可以直接电连接,若薄膜晶体管为顶栅型薄膜晶体管,像素电极17与漏极之间还需要通过过孔18才能电连接,如图5所示。
另外,钝化层16与像素电极17的材料也可不为掺氟石墨烯材料,而为现有技术中的材料,本申请实施例对此并不进行限定。
基于同一发明构思,本申请实施例还提供了一种阵列基板的制备方法,包括:
本申请任意实施例提供的制备薄膜晶体管的步骤,在所述薄膜晶体管上方制备钝化层的步骤,以及制备与所述薄膜晶体管的漏极电连接的像素电极的步骤。
在一较佳实施方式中,形成钝化层,具体包括:
形成石墨烯层,将氟离子掺杂到所述石墨烯层,形成钝化层。
在一较佳实施方式中,形成钝化层和像素电极,具体包括:
形成石墨烯层;
通过一张掩膜板,在用于形成像素电极的区域之外的所述石墨烯层中掺杂氟离子,将所述石墨烯层中掺杂氟离子的部分作为钝化层,未掺杂氟离子的部分作为像素电极。
下面以底栅型薄膜晶体管为例,结合图6(a)~图6(g)来具体说明本申请实施例提供的阵列基板的制备工艺流程。其制备工艺包括如下步骤:
步骤一、参见图6(a),在基板01上形成栅极02;
步骤二、参见图6(b),在栅极02上形成石墨烯层03;
步骤三、参见图6(c),采用SF6等离子体通过离子注入工艺,将氟离子注入到石墨烯层03,形成栅绝缘层04;
步骤四、参见图6(d),在栅绝缘层04上形成有源层薄膜05,以及在有源层薄膜05上形成源漏极薄膜06;
步骤五、参见图6(e),针对有源层薄膜05与源漏极薄膜06,采用半色调掩膜工艺,共用一张掩膜板形成有源层07和源漏极08;
步骤六、参见图6(f),在源漏极08上形成石墨烯层09;
步骤七、参见图6(g),通过一张掩膜板,在用于形成像素电极010的区域之外的石墨烯层中采用离子注入工艺注入氟离子,将石墨烯层中注入氟离子的部分作为钝化层011,未注入氟离子的部分作为像素电极010。
其中,形成栅极02的工艺流程与现有技术的工艺流程完全相同,在此不再赘述。
综上所述,本申请实施例提供的技术方案中,薄膜晶体管包括:栅极、栅绝缘层、有源层和源漏极,所述栅绝缘层的材料为掺氟石墨烯材料,由于栅绝缘层的材料为掺氟石墨烯材料,而掺氟石墨烯材料本身不含有H、O等影响TFT的性能的元素,且对水、氧的阻隔能力强,使得H、O等不容易扩散到有源层中,从而可以提高TFT的性能和稳定性。
显然,本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样,倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。

Claims (10)

1.一种薄膜晶体管,包括:栅极、栅绝缘层、有源层和源漏极,其特征在于,所述栅绝缘层的材料包含掺氟石墨烯材料。
2.根据权利要求1所述的薄膜晶体管,其特征在于,所述源漏极的整个表面与所述有源层的表面接触。
3.一种阵列基板,其特征在于,包括:如权利要求1或2所述的薄膜晶体管,设置于所述薄膜晶体管上方的钝化层,以及与所述薄膜晶体管的漏极电连接的像素电极。
4.根据权利要求3所述的阵列基板,其特征在于,所述钝化层的材料为掺氟石墨烯材料。
5.根据权利要求4所述的阵列基板,其特征在于,所述像素电极的材料为石墨烯材料,所述钝化层与所述像素电极同层设置。
6.一种薄膜晶体管的制备方法,包括:在基板上形成栅极、栅绝缘层、有源层、和源漏极,其特征在于,形成栅绝缘层,具体包括:
形成石墨烯层,将氟离子掺杂到所述石墨烯层,形成栅绝缘层。
7.根据权利要求6所述的薄膜晶体管的制备方法,其特征在于,形成有源层和源漏极,具体包括:
采用半色调掩膜工艺,共用一张掩膜板形成有源层和源漏极。
8.一种阵列基板的制备方法,其特征在于,包括:
如权利要求6或7所述的制备薄膜晶体管的步骤,在所述薄膜晶体管上方制备钝化层的步骤,以及制备与所述薄膜晶体管的漏极电连接的像素电极的步骤。
9.根据权利要求8所述的阵列基板的制备方法,其特征在于,形成钝化层,具体包括:
形成石墨烯层,将氟离子掺杂到所述石墨烯层,形成钝化层。
10.根据权利要求8所述的阵列基板的制备方法,其特征在于,形成钝化层和像素电极,具体包括:
形成石墨烯层;
通过一张掩膜板,在用于形成像素电极的区域之外的所述石墨烯层中掺杂氟离子,将所述石墨烯层中掺杂氟离子的部分作为钝化层,未掺杂氟离子的部分作为像素电极。
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