CN106816359A - Wafer processing method - Google Patents
Wafer processing method Download PDFInfo
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- CN106816359A CN106816359A CN201510870094.2A CN201510870094A CN106816359A CN 106816359 A CN106816359 A CN 106816359A CN 201510870094 A CN201510870094 A CN 201510870094A CN 106816359 A CN106816359 A CN 106816359A
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- wafer
- processing method
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Drying Of Semiconductors (AREA)
Abstract
The wafer processing method that the present invention is provided, it is included reaction chamber, the bogey for bearing wafer is provided with the reaction chamber using the semiconductor processing equipment processed wafer with binary channels nozzle of air supply, the semiconductor processing equipment；Binary channels nozzle of air supply is arranged on the top of reaction chamber, and positioned at the top of bogey, and binary channels nozzle of air supply includes central passage and the circular passage being looped around around central passage, wafer processing method includes：Processing step, is processed technique to chip, and when technique is processed by circular passage to conveying process gas in reaction chamber；Purge step, before or after processing step, purge gas is conveyed by central passage towards wafer surface.The wafer processing method that the present invention is provided, it not only can effectively remove the condensation particle for remaining on a surface of a wafer, but also can remove the technique residual gas of the halogen acids produced in reaction chamber etc..
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, in particular it relates to a kind of chip is processed
Method.
Background technology
Plasma processing equipment is widely used in integrated circuit (IC) or MEMS
In manufacturing process, it is energetic plasma that it is excited process gas using radio-frequency power supply, and with
Wafer surface is reacted, so as to complete etching technics.
Fig. 1 is the structural representation of existing plasma processing device.Fig. 1 is referred to, etc.
Plasma processing apparatus include four reaction chambers (PM1~PM4), transmission chamber TM,
Two transition chamber thereofs (LLA and LLB) and EFEM chambers.Wherein, four reaction chambers
Room (PM1~PM4) is used to simultaneously or successively complete plasma etch process；Transmission chamber
TM is used for the transmission wafer between each chamber；Two transition chamber thereofs (LLA and LLB) are used
In conversion of the chip between air and vacuum state is completed, EFEM chambers are used to deposit crystalline substance
Piece, while for chip provides microenvironment, making EFEM inside produce uniform gas from top to bottom
Stream, so as to avoid chip from being polluted by particle.But, due to four reaction chambers
(PM1~PM4) is in atmospheric environment, effect of its atmosphere end parts in process gas
It is lower to be corroded by halogen acids, and particle is produced, if these particles fall can cause crystalline substance on a surface of a wafer
Piece produces defect.Additionally, after etching terminates, the gas or compound for having halogens are residual
Wafer surface is stayed in, and condensation reaction occurs in an atmosphere, formed in the condensation particle of drops
(Condensation defect), it is irregularly distributed in crystal column surface, has a strong impact on quarter
Lose the yield of product.
Therefore, it is existing it is a kind of remove particle method be before and after etching technics, by
N is passed through in reaction chamber2Or the gas such as Ar, wafer surface is purged, so as to remove
The particle (dust or etch by-products) dropped on a surface of a wafer in transmission or etching process,
Such that it is able to avoid influence of the particle to product yield.
But, in actual applications, the above method still suffers from problems with：
First, when being purged to wafer surface, due to the N being passed through in reaction chamber2Or
The gases such as Ar can wave at random under the influence of the airflow, it is impossible to effectively remove in reaction chamber
The technique residual gas of the halogen acids of generation etc., it is rotten by halogen acids so as to atmosphere end parts are still present
The problem of pollution is lost, frequently cleaning maintenance can only be relied on to mitigate chip because the problem is produced
Defect, so as to cause the maintenance period of equipment shorter.
Second, the above method cannot effectively remove the condensation particle in wafer surface, so that
The yield of etching product cannot be ensured.
The content of the invention
It is contemplated that at least solving one of technical problem present in prior art, it is proposed that
A kind of wafer processing method, it not only can effectively remove the condensation for remaining on a surface of a wafer
Grain, but also the technique residual gas of the halogen acids produced in reaction chamber etc. can be removed, so that can
To reduce wafer defect, product yield is improved, while extending the maintenance week of semiconductor processing equipment
Phase.
A kind of wafer processing method is provided to realize the purpose of the present invention, using with bilateral
The semiconductor processing equipment processed wafer of road nozzle of air supply, the semiconductor processing equipment includes anti-
Chamber is answered, the bogey for bearing wafer is provided with the reaction chamber；It is described double
Channel inlet nozzle is arranged on the top of the reaction chamber, and positioned at the upper of the bogey
Side, and the binary channels nozzle of air supply is including central passage and is looped around the central passage week
The circular passage enclosed, the wafer processing method includes：
Processing step, technique is processed to chip, and lead to when the processing technology is carried out
The circular passage is crossed to conveying process gas in the reaction chamber；
Purge step, before or after the processing step, by the central passage
Purge gas are conveyed towards wafer surface.
Preferably, the central passage includes one or more air admission holes；It is described by setting
The aperture of air admission hole and make to be flowed into through the air admission hole purge gas in the reaction chamber
Air velocity meets the requirement of the particle in removal wafer surface.
Preferably, the span in the aperture of the air admission hole is in 1~3mm.
Preferably, the semiconductor processing equipment also includes that at least three thimbles and thimble are lifted
Mechanism, wherein, at least three thimble is used to support chip；The thimble elevating mechanism is used
In driving at least three thimble to rise to first position or drop to the second place, described the
One position is that the top of the thimble is higher than that the bogey is used for the loading end of bearing wafer
Position；The second place is that the top of the thimble is used to carry less than the bogey
The position of the loading end of chip；The wafer processing method includes：
Chip raising step, before or after the processing step, and in the purging
Before step, the thimble is driven to rise to described first using the thimble elevating mechanism
Put, held up with the chip being placed on the bogey.
Preferably, in the purge step, according to different processing technologys, setting is described
When the gaseous species combination of purge gas, gas flow, the pressure of the reaction chamber and purging
Between at least one of parameter, effectively to remove the particle in wafer surface.
Preferably, the purge gas gaseous species combination include a kind of inert gas or
The combination of inert gas not of the same race.
Preferably, the inert gas includes nitrogen or argon gas.
Preferably, the span of the gas flow is in 100~200sccm.
Preferably, the span of the pressure of the reaction chamber is in 40~150mT.
Preferably, the span of the purge time is in 4~10s.
The invention has the advantages that：
The wafer processing method that the present invention is provided, it uses with binary channels nozzle of air supply half
Conductor process equipment processed wafer, and purge step is carried out before or after the processing step,
And the purge step is to make the central passage of binary channels nozzle of air supply convey wafer surface to purge
Gas.Due to this special construction of the central passage of binary channels nozzle of air supply, it can improve and blow
The flow velocity of scavenging body, such that it is able to effectively remove the condensation particle for remaining on a surface of a wafer, enters
And product yield can be improved.Being additionally, since into the purge gas in reaction chamber to go out
Existing random mobility status, it is thereby achieved that the hydrogen halogen for efficiently being produced in removal reaction chamber
The technique residual gas of acid etc., and then atmosphere end parts asking by halogen acids corrosion contamination can be alleviated
Topic, such that it is able to reduce wafer defect, improves product yield, while extend semiconductor machining setting
Standby maintenance period.
Brief description of the drawings
Fig. 1 is the structural representation of existing plasma processing device；
Fig. 2 is the semiconductor processing equipment that wafer processing method provided in an embodiment of the present invention is used
Sectional view；
Fig. 3 is the sectional view of the binary channels nozzle of air supply of semiconductor processing equipment in Fig. 2；And
Fig. 4 is the FB(flow block) of wafer processing method provided in an embodiment of the present invention.
Specific embodiment
To make those skilled in the art more fully understand technical scheme, with reference to
Accompanying drawing is described in detail come the wafer processing method to present invention offer.
Wafer processing method provided in an embodiment of the present invention, it is used with binary channels nozzle of air supply
Semiconductor processing equipment chip is processed.Fig. 2 is chip provided in an embodiment of the present invention
The sectional view of the semiconductor processing equipment that processing method is used.Fig. 2 is referred to, semiconductor machining sets
It is standby to include reaction chamber 1, and the carrying dress for bearing wafer 4 is provided with reaction chamber 1
Put 2, such as electrostatic chuck, mechanical chuck or pedestal etc..Binary channels nozzle of air supply is set
At the top of reaction chamber 1, and positioned at the top of bogey 2, Fig. 3 is partly to lead in Fig. 2
The sectional view of the binary channels nozzle of air supply of body process equipment, as shown in figure 3, the nozzle of air supply bag
The circular passage 5 for including central passage 6 and being looped around around the central passage 6.The He of central passage 6
Circular passage 5 is spaced, can independently to conveying gas in reaction chamber 1.
Fig. 4 is the FB(flow block) of wafer processing method provided in an embodiment of the present invention.Refer to figure
4, on the premise of using above-mentioned semiconductor processing equipment, chip provided in an embodiment of the present invention
Processing method includes：
Processing step, technique is processed to chip, and when technique is processed by annular
Passage 5 and/or central passage 6 in reaction chamber 1 to conveying process gas.
Purge step, after processing step is completed, by central passage 6 towards wafer surface
Conveying purge gas.
In processing step, individually with circular passage 5 to conveying process gas in reaction chamber 1
Body, this can not only obtain more uniform plasma distribution, and can make processing step
With purge step respectively using different passages to conveying gas, handoff procedure in reaction chamber 1
Simply, switching efficiency is higher.In actual applications, can be by two pneumatic diaphragm valves etc.
On-off switch individually controls the break-make of circular passage 5 and central passage 6.
From the figure 3, it may be seen that central passage 6 uses elongated hole structure, the structure can make to be flowed from it
The gas for going out has flow velocity higher, and the outlet side of the central passage 6 is located at chip 4
Top, can from top to down spray gas, so as to by the central passage 6, make entrance
The characteristics of gas in reaction chamber 1 has high speed, directionality.Thus, walked by purging
Central passage 6 is used in rapid, preferably purging effect can be played, existed such that it is able to effectively removal
The condensation particle remained in wafer surface, and then product yield can be improved.Be additionally, since into
It is not in random mobility status to enter the purge gas in reaction chamber 1, it is thereby achieved that
The technique residual gas of the halogen acids for efficiently being produced in removal reaction chamber 1 etc., and then can alleviate
Atmosphere end parts, such that it is able to reduce wafer defect, are carried by the problem of halogen acids corrosion contamination
High product yield, while extending the maintenance period of semiconductor processing equipment.Above-mentioned purge gas
Gaseous species combination includes the combination of a kind of inert gas or inert gas not of the same race.Wherein,
Inert gas includes nitrogen or argon gas etc..
In the present embodiment, central passage 6 is made up of single air admission hole, but the present invention is not
This is confined to, in actual applications, central passage 6 can also be made up of multiple air admission holes, used
With in purge step simultaneously to conveying purge gas in reaction chamber.And, by setting
The aperture of air admission hole is stated, the air velocity of purge gas can be adjusted, so that through each
The air velocity that individual air admission hole flows into the purge gas in reaction chamber 1 meets removal chip table
The requirement of the particle on face.Preferably, the span in the aperture of air admission hole is in 1~3mm.
In addition, in actual applications, can also be by the gas being connected with binary channels nozzle of air supply
MFC (quality stream measuring device) is set on body pipeline to control the purge gass of inflow central passage 6
The gas flow of body.
In purge step, the gas of purge gas according to different processing technologys, can be set
At least one of body category combinations, gas flow, the pressure of reaction chamber and purge time are joined
Number, after the processing technologys different such that it is able to targetedly remove completion, in wafer surface
The particle of upper residual.For example, be directed to etching technics, formed on a surface of a wafer in drops
Condensation particle (Condensation defect), and because atmosphere end parts are by halogen acids
Corrosion contamination and the halogen acids particle that is formed on a surface of a wafer.Preferably, the gas of purge gas
The span of body flow is in 100~200sccm.The span of the pressure of reaction chamber exists
40~150mT.Under conditions of the gas flow and chamber pressure, shadow will not be produced to chip
Ring.The span of purge time, within the range can be before production capacity be ensured in 4~10s
Put, effectively remove the particle in wafer surface.
Preferably, in wafer processing method provided in an embodiment of the present invention, can also utilize
Thimble and thimble elevating mechanism in semiconductor processing equipment are blown the lower surface of chip 4
Sweep.Specifically, as shown in Fig. 2 semiconductor processing equipment also includes the He of at least three thimble 3
Thimble elevating mechanism (not shown), wherein, at least three thimbles 3 are used to support chip
4；Thimble elevating mechanism is used to drive at least three thimbles 3 to rise to first position or drop to
The second place, wherein, first position is used to carry for the top of thimble 3 higher than bogey 2
The position of thimble 3 in the position of the loading end of chip, such as Fig. 2.The second place is thimble 3
Top less than bogey be used for bearing wafer loading end position.
Using above-mentioned thimble and thimble elevating mechanism, chip processing side provided in an embodiment of the present invention
Method also includes：
Chip raising step, i.e. after processing step, and before purge step, profit
Thimble 3 is driven to rise to first position with thimble elevating mechanism, to be placed on bogey 2
On chip 4 hold up.
So, when subsequently purge step is carried out, because the lower surface of chip 4 is exposed to anti-
Answer in the environment of chamber 1, the air-flow in reaction chamber 1 can be blown the lower surface of chip 4
Sweep, such that it is able to remove the particle on the lower surface for sticking to chip 4.
It should be noted that in the present embodiment, only after processing step is completed, being blown
Step is swept, or successively carries out chip raising step and purge step.But the present invention not office
It is limited to this, in actual applications, it is also possible to only before processing step, carries out purge step,
Or successively carry out chip raising step and purge step.Or, can also simultaneously in technique step
Before and after rapid, purge step is carried out, or successively carry out chip raising step and blow
Sweep step.
Also, it should be noted that the wafer processing method that the present invention is provided is that have using existing
The semiconductor processing equipment processed wafer of binary channels nozzle of air supply, except according to different processing technologys
The need for, it is not right outside being adjusted to the air inlet hole number of central passage 6 and aperture
The equipment carries out HardwareUpgring transformation, such that it is able to effectively removal wafer surface particle while,
Save the cost of HardwareUpgring transformation.
It is understood that the principle that is intended to be merely illustrative of the present of embodiment of above and
The illustrative embodiments of use, but the invention is not limited in this.For in the art
For those of ordinary skill, without departing from the spirit and substance in the present invention, can do
Go out all variations and modifications, these variations and modifications are also considered as protection scope of the present invention.
Claims (10)
1. a kind of wafer processing method, it is characterised in that using having binary channels nozzle of air supply
Semiconductor processing equipment processed wafer, the semiconductor processing equipment include reaction chamber,
The bogey for bearing wafer is provided with the reaction chamber；The binary channels enters gas blowout
Mouth is arranged on the top of the reaction chamber, and positioned at the top of the bogey, and institute
Stating binary channels nozzle of air supply includes central passage and the annular being looped around around the central passage
Passage, the wafer processing method includes：
Processing step, technique is processed to chip, and lead to when the processing technology is carried out
The circular passage is crossed to conveying process gas in the reaction chamber；
Purge step, before or after the processing step, by the central passage
Purge gas are conveyed towards wafer surface.
2. wafer processing method according to claim 1, it is characterised in that in described
Heart passage includes one or more air admission holes；Made through institute by setting the aperture of the air admission hole
State the air velocity satisfaction removal chip that air admission hole flows into the purge gas in the reaction chamber
The requirement of the particle on surface.
3. wafer processing method according to claim 2, it is characterised in that it is described enter
The span in the aperture of stomata is in 1~3mm.
4. wafer processing method according to claim 1, it is characterised in that described half
Conductor process equipment also include at least three thimbles and thimble elevating mechanism, wherein, it is described at least
Three thimbles are used to support chip；The thimble elevating mechanism is used to drive at least three top
Pin rises to first position or drops to the second place, and the first position is the top of the thimble
End is used for the position of the loading end of bearing wafer higher than the bogey；The second place is
The top of the thimble is used for the position of the loading end of bearing wafer less than the bogey；
The wafer processing method includes：
Chip raising step, before or after the processing step, and in the purging
Before step, the thimble is driven to rise to described first using the thimble elevating mechanism
Put, held up with the chip being placed on the bogey.
5. wafer processing method according to claim 1, it is characterised in that described
In purge step, according to different processing technologys, the gaseous species group of the purge gas is set
At least one of conjunction, gas flow, the pressure of the reaction chamber and purge time parameter,
Effectively to remove the particle in wafer surface.
6. wafer processing method according to claim 5, it is characterised in that described to blow
The gaseous species combination of scavenging body includes the group of a kind of inert gas or inert gas not of the same race
Close.
7. wafer processing method according to claim 6, it is characterised in that described lazy
Property gas include nitrogen or argon gas.
8. wafer processing method according to claim 5, it is characterised in that the gas
The span of body flow is in 100~200sccm.
9. wafer processing method according to claim 5, it is characterised in that described anti-
The span of pressure of chamber is answered in 40~150mT.
10. wafer processing method according to claim 5, it is characterised in that described to blow
The span of flyback time is in 4~10s.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201510870094.2A CN106816359B (en) | 2015-12-02 | 2015-12-02 | Wafer processing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510870094.2A CN106816359B (en) | 2015-12-02 | 2015-12-02 | Wafer processing method |
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| CN106816359A true CN106816359A (en) | 2017-06-09 |
| CN106816359B CN106816359B (en) | 2020-06-19 |
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| CN201510870094.2A Active CN106816359B (en) | 2015-12-02 | 2015-12-02 | Wafer processing method |
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Cited By (4)
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| CN109107987A (en) * | 2017-06-22 | 2019-01-01 | 北京北方华创微电子装备有限公司 | A kind of blowing method |
| CN110957249A (en) * | 2018-09-27 | 2020-04-03 | 大福自动化洁净设备公司 | Equipment front end module |
| CN111952139A (en) * | 2019-05-16 | 2020-11-17 | 北京北方华创微电子装备有限公司 | Semiconductor manufacturing apparatus and semiconductor manufacturing method |
| CN112885745A (en) * | 2021-01-19 | 2021-06-01 | 长鑫存储技术有限公司 | Processing equipment and processing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112885745A (en) * | 2021-01-19 | 2021-06-01 | 长鑫存储技术有限公司 | Processing equipment and processing method |
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| CN106816359B (en) | 2020-06-19 |
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Address after: 100176 No. 8 Wenchang Avenue, Beijing economic and Technological Development Zone Applicant after: Beijing North China microelectronics equipment Co Ltd Address before: 100176 Beijing economic and Technological Development Zone, Wenchang Road, No. 8, No. Applicant before: Beifang Microelectronic Base Equipment Proces Research Center Co., Ltd., Beijing |
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