CN106711234A - 一种高频吸收二极管芯片及其生产方法 - Google Patents

一种高频吸收二极管芯片及其生产方法 Download PDF

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CN106711234A
CN106711234A CN201710028828.1A CN201710028828A CN106711234A CN 106711234 A CN106711234 A CN 106711234A CN 201710028828 A CN201710028828 A CN 201710028828A CN 106711234 A CN106711234 A CN 106711234A
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layer
ion
ion diffusion
diffusion layer
substrate
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CN106711234B (zh
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王兴龙
李述洲
陈亮
张力
潘宜虎
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Chongqing Pingwei Enterprise Co Ltd
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Chongqing Pingwei Enterprise Co Ltd
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Priority to US15/737,546 priority patent/US20200144428A1/en
Priority to PCT/CN2017/071407 priority patent/WO2018129759A1/zh
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Abstract

本发明提供一种高频吸收二极管芯片及其生产方法，该芯片包括衬底，衬底的上表面形成有外延层，外延层上设有基区窗口，基区窗口包括压点区以及位于压点区外围的分压区，外延层将压点区与分压区隔开，基区窗口上形成有第一离子扩散层，第一离子扩散层上设有发射区窗口，发射区窗口上形成有第二离子扩散层，压点区内的第一离子扩散层、第二离子扩散层的上表面设有钝化层，分压区内的第一离子扩散层上表面形成有氧化层，氧化层、钝化层均延伸至外延层的上表面。采用本发明的芯片特别适宜于RCD电路中尖峰吸收，同时，该工艺形成的芯片在125℃下的高温漏电流比传统扩散型二极管芯片小50%以上，缺陷率低，而且本工艺简单，易于实现批量化生产。

Description

一种高频吸收二极管芯片及其生产方法
技术领域
本发明涉及硅体芯片生产技术领域，特别是涉及一种高频吸收二极管芯片及其生产方法。
背景技术
线路中用于回路吸收的二极管，在电源器件选择方面，一般采用普通整流二极管，其应用频率一般在50kHz以下，对于60kHz以上的应用环境，普通整流二极管很难实现完全的吸收效果，并且会伴随强烈的电磁干扰，在RCD回路中电磁干扰现象尤为明显，并且对于专门应用于高频60kHz以上的环境中的吸收二极管还没有文献报道。
发明内容
鉴于以上所述现有技术的缺点，本发明的目的在于提供一种高频吸收二极管芯片及其生产方法，用于解决现有技术中二极管应用于60kHz以上的环境时很难实现完全的吸收效果、电磁干扰强烈等问题。
为实现上述目的及其他相关目的，本发明第二方面提供一种高频吸收二极管芯片，包括衬底，所述衬底的上表面形成有外延层，所述外延层上设有基区窗口，所述基区窗口包括压点区以及位于压点区外围的分压区，所述外延层将压点区与分压区隔开，所述基区窗口上形成有第一离子扩散层，所述第一离子扩散层上设有发射区窗口，所述发射区窗口上形成有第二离子扩散层，所述压点区内的第一离子扩散层、第二离子扩散层的上表面设有钝化层，分压区内的第一离子扩散层上表面形成有氧化层，氧化层、钝化层均延伸至外延层的上表面，钝化层将氧化层与压点区内的第一离子扩散层隔开。
在本发明的一些实施例中，所述衬底为N+半导体，所述外延层为N-半导体，所述第一离子扩散层为硼离子扩散层，所述第二离子扩散层为磷离子扩散层。
在本发明的一些实施例中，所述衬底为P+半导体，所述外延层为P-半导体，所述第一离子扩散层为磷离子扩散层，所述第二离子扩散层为硼离子扩散层。
在本发明的一些实施例中，所述第一离子扩散层与所述第二离子扩散层的深度差为3-5μm，
在本发明的一些实施例中，所述钝化层的上表面形成有表面金属层。
在本发明的一些实施例中，所述衬底的下表面形成有背面金属层。
在本发明的一些实施例中，所述衬底的厚度为215～220μm，所述外延层的厚度≥50μm，所述氧化层的厚度为所述第一离子扩散层的厚度为6～10μm，所述所述第二离子扩散层的厚度为3～5μm，所述表面金属层的厚度为3～6μm，所述背面金属层的厚度为2～4μm。
在本发明的一些实施例中，所述外延层的厚度为50～80μm。
本发明第二方面提供一种高频吸收二极管芯片的生产方法，至少包括如下步骤：
1)衬底氧化：选取半导体衬底，在该衬底上形成外延层，再在外延层上形成氧化层；
2)一次光刻：在所述氧化层上形成第一光刻胶层后，刻蚀第一光刻胶层和氧化层至外延层裸露，定义基区窗口的图形，去除光刻胶；
3)一次离子注入：沿基区窗口注入离子，形成第一离子层；
4)基区扩散氧化：将基区窗口内的离子扩散氧化，第一离子层的离子向下扩散，形成第一离子扩散层，第一离子层5的上表面形成第一离子氧化层；
5)二次光刻：在基区窗口的氧化层上形成第二光刻胶层后，刻蚀第二光刻胶层和第一离子氧化层至露出第一离子扩散层，定义发射区窗口的图形；
6)二次离子注入，沿发射区窗口注入离子，形成第二离子层；
7)发射区扩散氧化：将发射区窗口内的离子扩散氧化，第二离子层的离子向下扩散，形成第二离子扩散层，第二离子层的上表面形成第二离子氧化层；
8)钝化：去除第一离子氧化层、第二离子氧化层，在整个芯片的上表面形成钝化层，所述钝化层延伸至外延层的上表面，将氧化层与压点区内的第一离子扩散层隔开；
9)正面金属蒸发：在所述钝化层的上表面形成表面金属层；
10)三次光刻：在所述表面金属层上涂光刻胶层，刻蚀去掉压点区以外的部分金属层以及钝化层，钝化层延伸至外延层的上表面，将氧化层与压点区内的第一离子扩散层隔开，再去除光刻胶层；
11)背面金属蒸发：在所述衬底的背面形成背面金属层，制得所述二极管芯片。
在本发明的一些实施例中，步骤1)中，所述衬底为N+半导体或P+半导体。
在本发明的一些实施例中，步骤3)和步骤6)中，注入离子前，先进行干氧氧化，再进行离子注入。
在本发明的一些实施例中，步骤3)和步骤6)中，注入离子前，先进行干氧氧化时，氧化温度1100℃，时间60分钟，气氛：N2+O2，具体含有70体积％的氮气和30体积％的氧气。
在本发明的一些实施例中，步骤3)和步骤6)中，注入离子前，先进行干氧氧化时，干氧氧化的厚度为
在本发明的一些实施例中，步骤1)中，所述衬底为N+半导体时，所述外延层为N-半导体，步骤3)中的所述注入离子为硼，步骤6)中的所述注入离子为磷，注入硼离子的能量为60～400KeV，剂量为5*1012～5*1014/cm-2；注入磷离子的能量为0.5～7.5MeV，剂量为2*1012～2*1013/cm-2；或者，步骤1)中，所述衬底为P+半导体，所述外延层为P-半导体，步骤3)中的所述注入离子为磷，步骤6)中的所述注入离子为硼。本说明书中“+”表示重掺杂，“-”表示轻掺杂。
在本发明的一些实施例中，步骤4)中，扩散氧化的温度为1100±50℃，时间120±5分钟，扩散炉保护气体中含有70体积％的氮气和30体积％的氧气。
在本发明的一些实施例中，步骤7)中，扩散氧化的温度为950±50℃，时间120±10分钟，扩散炉保护气体中含有70体积％的氮气和30体积％的氧气。
在本发明的一些实施例中，步骤4)形成的第一离子扩散层与步骤7)形成的第二离子扩散层的深度差为结深D，结深D的深度为3-5μm，结深D决定二极管的高频频率，其高频频率可达到300-500kHz。
在本发明的一些实施例中，步骤8)中，形成所述钝化层的方法为化学气相沉积法，钝化层为磷硅玻璃(PSG)和/或氧化硅(SiO2)。
在本发明的一些实施例中，步骤9)中，所述表面金属层选自铝、钛、镍、银中的一种或多种组合，形成所述表面金属层的方法为物理气相沉积法。
在本发明的一些实施例中，步骤9)中，所述表面金属层的厚度为3～6μm。
在本发明的一些实施例中，步骤10)中，还包括在氢气气氛中使金属与硅进行合金，以获得良好的欧姆接触。
在本发明的一些实施例中，步骤11)中，先对所述衬底背面部分进行减薄处理，露出新鲜硅，再形成所述背面金属层。
在本发明的一些实施例中，步骤15)中，所述背面金属层依次为钛、镍、银。
本发明第三方面提供上述二极管芯片在RCD电路中的用途。
如上所述，本发明的一种高频吸收二极管芯片及其生产方法，具有以下有益效果：采用本发明的生产工艺加工得到的高压芯片特别适宜于RCD电路中尖峰吸收，同时，该工艺形成的芯片在125℃下的高温漏电流比传统扩散型二极管芯片小50％以上,缺陷率低，而且本工艺简单，易于实现批量化生产。
附图说明
图1-14显示为本发明实施例各步骤所得到的芯片结构示意图。
图15显示为本发明实施例2中普通整流管尖峰吸收情况图。
图16显示为本发明实施例2中本发明制得的二极管芯片尖峰吸收情况图。
编号说明；
1—衬底
2—外延层
3—氧化层
4a—第一光刻胶层
4b—基区窗口
5—第一离子层
6a—第一离子扩散层
6b—第一离子氧化层
7a—第二光刻胶层
7b—发射区窗口
8—第二离子层
8a—第二离子扩散层
8b—第二离子氧化层
9—钝化层
10—表面金属层
11—压点区
12—分压区
13—背面金属层
具体实施方式
以下通过特定的具体实例说明本发明的实施方式，本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用，本说明书中的各项细节也可以基于不同观点与应用，在没有背离本发明的精神下进行各种修饰或改变。
实施例1
二极管芯片成品结构如图14所示，包括衬底1，衬底1的上表面形成有外延层2，外延层2上设有基区窗口4b，基区窗口4b包括压点区11以及位于压点区11外围的分压区12，分压区12为封闭的环状，位于压点区11的外围，外延层2将压点区11与分压区12隔开，基区窗口4b上形成有第一离子扩散层6a，第一离子扩散层6a上设有发射区窗口7b，发射区窗口7b内形成有第二离子扩散层8a，第一离子扩散层6a与第二离子扩散层8a之间的深度差为3-5μm，压点区11内的第一离子扩散层6a、第二离子扩散层8a的上表面设有钝化层9，分压区12内的第一离子扩散层6a上表面形成有氧化层3，氧化层3、钝化层9均延伸至外延层2的上表面，钝化层9将氧化层3与压点区11内的第一离子扩散层6a隔开。
作为示例，衬底1为N+半导体，外延层2为N-半导体，第一离子扩散层6a为硼离子扩散层，第二离子扩散层8a为磷离子扩散层，制得的成品为NPN型二极管芯片。
作为示例，衬底1为P+半导体，外延层2为P-半导体，第一离子扩散层6a为磷离子扩散层，第二离子扩散层8a为硼离子扩散层，制得的成品为PNP型二极管芯片。
作为示例，钝化层9的上表面形成有表面金属层10。表面金属层10的上表面也可以形成一层钝化层。
作为示例，衬底1的下表面形成有背面金属层13。
作为示例，衬底1的厚度为215～220μm，外延层2的厚度≥50μm，优选为50～80μm，氧化层3的厚度为第一离子扩散层6a的厚度为6～10μm，第二离子扩散层8a的厚度为3～5μm，表面金属层10的厚度为3-6μm，背面金属层13的厚度为2～4μm。
实施例2
NPN型高频吸收二极管芯片的生产方法包括如下步骤：
1)衬底氧化：选取原始硅片并重掺砷抛光，本实施例选择电阻率β＝15～25Ω*cm、厚度215μm的N+衬底1，其结构如图1所示，根据产品的要求生长约50μm高阻层N-，即外延层2，本实施例对外延层2的电阻率均匀性、晶格缺陷有较高要求，其晶格方向统一定向，避免离子注入时发生沟道效应，外延处理后的芯片结构如图2所示，采用水汽氧化法或湿氧氧化法在高阻层N-表面热生长一层SiO2(氧化硅)，作为基区扩散掩蔽层，即氧化层3，厚度通常为本实施例具体为保证基区的选择性扩散，其结构如图3所示。
2)一次光刻：在氧化层3上形成第一光刻胶层4a后，腐蚀去局部氧化层3，定义基区窗口4b的图形，所述基区窗口4b包括压点区11以及位于压点区11外围的环状分压区12，所述外延层2将压点区11与分压区12隔开，开出基区窗口4b，将窗口内氧化层腐蚀干净，使外延层2裸露，边缘光滑，无毛刺，也不能过多腐蚀。该过程包括涂光刻胶(如图4-1所示)、光刻(如4-2所示)、去除光刻胶(如图4-3所示)。
3)一次离子注入：在离子注入前先进行干氧氧化，在基区窗口4b内的外延层2表面形成干氧化层，氧化温度1100℃：时间60分钟，气氛：N2+O2(含有70体积％的氮气和30体积％的氧气)，以尽量减少离子注入对硅表面的损伤。氧化厚度为本实施例为氧化时应确保较高的均匀性；如图5所示，利用离子注入机在能量200KeV和剂量1.5*1014/cm-2的情况下，将高能的硼(离子)打入硅和二氧化硅(即N-外延层2的裸露表面)，形成第一离子层5，此时，硼进入硅中深度仅仅并且没有活性，硅不具备PN结特性。
4)基区扩散氧化：将基区窗口4b内的离子扩散氧化，如图6所示，第一离子层5的硼离子向下扩散，形成第一离子扩散层6a，第一离子层5的上表面形成第一离子氧化层6b，外延层2、氧化层3所对应的上表面也相应形成氧化层。具体是在950℃氮气沉积20分钟后，1100℃下氧化120分钟，扩散炉保护气体中含有70体积％的氮气和30体积％的氧气，扩散氧化将硼激活，随着时间的变化，硼原子在硅中扩散一定的深度，约为8μm，形成PN结特性，该PN结即为集电结，它决定BVcbo的电压。
5)二次光刻：在第一离子氧化层6b上形成第二光刻胶层7a后，刻蚀第二光刻胶层7a和第一离子氧化层6b至露出第一离子扩散层6a(即硼扩散层)，定义发射区窗口7b的图形(如图7-1所示)，本实施例中，芯片为方形结构，发射区窗口7b为轴对称结构，其对称轴与方形芯片的对称轴重合，该过程具体包括涂二次光刻胶(如图7-2所示)、二次光刻(如图7-3所示)、去除二次光刻胶(如图7-4所示)。
6)二次离子注入：在离子注入前，通过干氧氧化形成一层干氧化层，厚度约为氧化温度1100℃：时间60分钟，气氛：N2+O2(含有70体积％的氮气和30体积％的氧气)；再进行二次离子注入，如图8所示，沿发射区窗口7b注入离子，具体是利用离子注入机在能量1.5MeV和剂量2*1012/cm-2的情况下，沿发射区窗口7b将高能的磷(离子)打入第一离子扩散层6a的表面，形成第二离子层8，此时，磷进入硅中深度仅仅并且没有活性，薄层硅不具备PN结特性。
7)发射区扩散氧化：将发射区窗口7b内的离子扩散氧化，第二离子层8的磷离子向下扩散，形成第二离子扩散层8a，第二离子层8的上表面形成第二离子氧化层8b，外延层2、氧化层3所对应的上表面也相应形成氧化层。具体是在950℃下扩散氧化120分钟，扩散炉保护气体中含有70体积％的氮气和30体积％的氧气，将磷激活，随着时间的变化，磷原子在硅中扩散一定的深度，约为4μm，形成PN结特性，该PN结就是发射结，它决定BVebo的电压和放大调节，其结构如图9所示。步骤4)形成的第一离子扩散层6a与步骤7)形成的第二离子扩散层8a的深度差为结深D，结深D的深度为3-5μm，结深D决定二极管的高频频率，其高频频率可达到300-500kHz，本实施例的结深为4μm。
8)钝化：如图10-1所示，采用氢氟酸的水溶液(按重量计，氟化氢与水的重量比为1：1)去除压点区11的全部氧化层以及外延层2上表面靠近压点区11的部分氧化层，露出部分外延层2及整个压点区11，其他部位的氧化层得以保留，在图10-1中氧化层3即为保留的氧化层部分，如图10-2所示，在整个芯片的上表面形成钝化层9。形成钝化层9的具体方法是采用化学气相淀积(CVD)工艺淀积磷硅玻璃(PSG)、氧化硅(SiO2)，再在900±50℃氮气气氛中退火，使CVD层更加致密。
9)正面金属蒸发：如图11所示，在钝化层9的上表面(即正面)形成表面金属层10，表面金属层10可以为单独的铝层，也可以为从下向上依次形成的钛层、铝层，也可以为从下向上依次形成的钛、镍、银层，本实施例为铝层；具体是通过物理气相沉积(PVD)的方法在钝化层9的上表面蒸发形成一层铝，金属铝层厚3～6μm，具体可以为3μm、4μm、5μm、6μm等，本实施例具体为4μm。
10)三次光刻：在表面金属层10上涂光刻胶层(如图12-1所示)，刻蚀去掉压点区11以外的部分铝以及钝化层(如图12-2所示)，再去除光刻胶层(如图12-3所示)。钝化层9延伸至外延层2的上表面，将氧化层3与压点区11内的第一离子扩散层6a隔开。
11)背面金属蒸发：如图13-1所示，先采用腐蚀液对N+衬底背面部分进行减薄处理，采用的腐蚀液组成成分为：HNO3：HF：HAC：H2O＝1：1：1：(20-25)，本实施例具体采用的腐蚀液组成成分为1：1：1：20，露出新鲜硅，便于与金属键合，如图13-2所示，再依次蒸发背面接触金属Ti、Ni、Ag，形成背面金属层13，厚度约2μm，得成品。图14所示为最后制得的成品结构示意图，图中的氧化层3是指前述各个步骤处理后，最终形成的氧化复合层。
本实施例制得的二极管性能测试结果如下：
下表中，IR是指漏电流，IF是二极管的型号也就是安培数，VR是二极管的反向电压流，VF是指正向压降。
对下表的说明如下：
1:VF1IF＝0.100A PW＝0.5mS Min＝0.600V Max＝0.800V(PRT)(VF1)；
2:VF2IF＝0.500A PW＝0.5mS Min＝0.800V Max＝1.100V(PRT)(VF2)；
3:VR1IB＝10.0uA PW＝30mS Min＝650V Max＝1000V VRG＝1999V(PRT)(VR1)；
4:VR2IB＝100.0uA PW＝30mS Min＝650V Max＝1000V VRG＝1999V(PRT)(VR2)；
5:dVR1Max＝50V dVR＝VR1-VR2(PRT)(dVR1)；
6:IR1VR＝650V PW＝30mS Max＝0.080uA IRG＝9.999uA(PRT)(IR1)；
7:TRR1IF＝0.500A IR＝1.000A IRR＝250mA Min＝1300nS Max＝3000nS Offset＝0nS(PRT)(TRR1)。
表1
在12V2A充电器的RCD回路尖峰吸收表现以及并联MOSFET测试VDS参数表现分别如下：A、普通整流管(1N4007)尖峰吸收情况：VDS＝352V，测试结果如图15所示；B、本发明产品尖峰吸收情况：VDS＝148V，测试结果如图16所示。
综上所述，本发明制得的芯片因其双层PN结所形成的的特殊电容特性，根据版图设计的不同，特别适宜于电流为0.5～5A的RCD电路尖峰吸收，同时，该工艺形成的芯片在125℃下的高温漏电流比传统扩散型二极管芯片小50％以上，缺陷率低，而且本工艺简单，易于实现芯片的批量化生产。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。

Claims (10)

1.一种高频吸收二极管芯片，包括衬底(1)，其特征在于，所述衬底(1)的上表面形成有外延层(2)，所述外延层(2)上设有基区窗口(4b)，所述基区窗口(4b)包括压点区(11)以及位于压点区(11)外围的分压区(12)，所述外延层(2)将压点区(11)与分压区(12)隔开，所述基区窗口(4b)内形成有第一离子扩散层(6a)，所述第一离子扩散层(6a)上设有发射区窗口(7b)，所述发射区窗口(7b)内形成有第二离子扩散层(8a)，所述压点区(11)内的第一离子扩散层(6a)、第二离子扩散层(8a)的上表面均设有钝化层(9)，分压区(12)内的第一离子扩散层(6a)上表面形成有氧化层(3)，所述氧化层(3)、钝化层(9)均延伸至外延层(2)的上表面，钝化层(9)将氧化层(3)与压点区(11)内的第一离子扩散层(6a)隔开。
2.根据权利要求1所述的二极管芯片，其特征在于，所述衬底(1)为N+半导体，所述外延层(2)为N-半导体，所述第一离子扩散层(6a)为硼离子扩散层，所述第二离子扩散层(8a)为磷离子扩散层；或者，所述衬底(1)为P+半导体，所述外延层(2)为P-半导体，所述第一离子扩散层(6a)为磷离子扩散层，所述第二离子扩散层(8a)为硼离子扩散层。
3.根据权利要求1所述的二极管芯片，其特征在于，所述第一离子扩散层(6a)与所述第二离子扩散层(8a)的深度差为3-5μm。
4.根据权利要求1所述的二极管芯片，其特征在于，所述钝化层(9)的上表面形成有表面金属层(10)，所述衬底(1)的下表面形成有背面金属层(13)，优选地，所述表面金属层(10)选自铝、钛、镍、银中的一种或多种组合，所述背面金属层(13)依次为钛、镍、银。
5.根据权利要求1所述的二极管芯片，其特征在于，所述衬底(1)的厚度为215～220μm，所述外延层(2)的厚度≥50μm，所述氧化层(3)的厚度为所述第一离子扩散层(6a)的厚度为6～10μm，所述所述第二离子扩散层(8a)的厚度为3～5μm，所述表面金属层(10)的厚度为3-6μm，所述背面金属层(13)的厚度为2～4μm。
6.一种高频吸收二极管芯片的生产方法，其特征在于，至少包括如下步骤：
1)衬底氧化：选取半导体衬底(1)，在该衬底(1)上形成外延层(2)，再在外延层上形成氧化层(3)；
2)一次光刻：在所述氧化层(3)上形成第一光刻胶层(4a)后，刻蚀第一光刻胶层(4a)和氧化层(3)至外延层(2)裸露，定义基区窗口(4b)的图形，去除光刻胶；
3)一次离子注入：沿基区窗口(4b)注入离子，形成第一离子层(5)；
4)基区扩散氧化：将基区窗口(4b)内的离子扩散氧化，第一离子层(5)的离子向下扩散，形成第一离子扩散层(6a)，第一离子层(5)的上表面形成第一离子氧化层(6b)；
5)二次光刻：在基区窗口(4b)的氧化层上形成第二光刻胶层(7a)后，刻蚀第二光刻胶层(7a)和第一离子氧化层(6a)至露出第一离子扩散层(6a)，定义发射区窗口(7b)的图形；
6)二次离子注入，沿发射区窗口(7b)注入离子，形成第二离子层(8)；
7)发射区扩散氧化：将发射区窗口(7b)内的离子扩散氧化，第二离子层8的离子向下扩散，形成第二离子扩散层(8a)，第二离子层(8)的上表面形成第二离子氧化层(8b)；
8)钝化：去除压点区(11)内的全部氧化层以及外延层(2)上表面靠近压点区(11)的部分氧化层，露出部分外延层(2)及整个压点区(11)，在整个芯片的上表面形成钝化层(9)；
9)正面金属蒸发：在所述钝化层(9)的上表面形成表面金属层(10)；
10)三次光刻：在所述表面金属层(10)上涂光刻胶层，刻蚀去掉压点区(11)以外的部分金属层以及钝化层，钝化层(9)延伸至外延层(2)的上表面，将氧化层(3)与压点区(11)内的第一离子扩散层(6a)隔开，再去除光刻胶层；
11)背面金属蒸发：在所述衬底(1)的背面形成背面金属层(13)，制得所述二极管芯片。
7.根据权利要求6所述的高频吸收二极管芯片的生产方法，其特征在于：步骤1)中，所述衬底(1)为N+半导体时，所述外延层(2)为N-半导体，步骤3)中的所述注入离子为硼；步骤6)中的所述注入离子为磷，注入硼离子的能量为60～400KeV，剂量为5*1012～5*1014/cm-2；注入磷离子的能量为0.5～7.5MeV，剂量为2*1012～2*1013/cm-2。
8.根据权利要求6所述的生产方法，其特征在于：步骤1)中，所述衬底(1)为P+半导体，所述外延层(2)为P-半导体，步骤3)中的所述注入离子为磷，步骤6)中的所述注入离子为硼。
9.根据权利要求6所述的生产方法，其特征在于：步骤4)形成的第一离子扩散层(6a)与步骤7)形成的第二离子扩散层(8a)的深度差为结深D，结深D的深度为3-5μm；。
10.根据权利要求1-5任一项所述的二极管芯片在RCD电路中的用途。
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