CN106711197A - 一种p型CuNiSnO非晶氧化物半导体薄膜及其制备方法 - Google Patents
一种p型CuNiSnO非晶氧化物半导体薄膜及其制备方法 Download PDFInfo
- Publication number
- CN106711197A CN106711197A CN201610914011.XA CN201610914011A CN106711197A CN 106711197 A CN106711197 A CN 106711197A CN 201610914011 A CN201610914011 A CN 201610914011A CN 106711197 A CN106711197 A CN 106711197A
- Authority
- CN
- China
- Prior art keywords
- cunisno
- type
- oxide semiconductor
- thin film
- amorphous oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 239000010409 thin film Substances 0.000 title claims abstract description 24
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 230000005669 field effect Effects 0.000 claims abstract description 8
- 239000000126 substance Substances 0.000 claims abstract description 3
- 239000010408 film Substances 0.000 claims description 42
- 239000000758 substrate Substances 0.000 claims description 29
- 239000012528 membrane Substances 0.000 claims description 11
- 239000000843 powder Substances 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 9
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- 229910052718 tin Inorganic materials 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 239000002994 raw material Substances 0.000 claims description 8
- BERDEBHAJNAUOM-UHFFFAOYSA-N copper(I) oxide Inorganic materials [Cu]O[Cu] BERDEBHAJNAUOM-UHFFFAOYSA-N 0.000 claims description 7
- KRFJLUBVMFXRPN-UHFFFAOYSA-N cuprous oxide Chemical compound [O-2].[Cu+].[Cu+] KRFJLUBVMFXRPN-UHFFFAOYSA-N 0.000 claims description 7
- 238000000227 grinding Methods 0.000 claims description 7
- 238000000608 laser ablation Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 238000002156 mixing Methods 0.000 claims description 7
- 238000010025 steaming Methods 0.000 claims description 7
- 108010075750 P-Type Calcium Channels Proteins 0.000 claims 1
- 239000013049 sediment Substances 0.000 claims 1
- 238000000151 deposition Methods 0.000 abstract description 3
- 239000000919 ceramic Substances 0.000 abstract 1
- 238000002834 transmittance Methods 0.000 abstract 1
- 108091006146 Channels Proteins 0.000 description 19
- 238000004549 pulsed laser deposition Methods 0.000 description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 17
- 239000007789 gas Substances 0.000 description 12
- 229910052681 coesite Inorganic materials 0.000 description 11
- 229910052906 cristobalite Inorganic materials 0.000 description 11
- 239000000377 silicon dioxide Substances 0.000 description 11
- 229910052682 stishovite Inorganic materials 0.000 description 11
- 229910052905 tridymite Inorganic materials 0.000 description 11
- 230000037230 mobility Effects 0.000 description 10
- 238000011056 performance test Methods 0.000 description 10
- 238000012360 testing method Methods 0.000 description 10
- 125000004429 atom Chemical group 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000010453 quartz Substances 0.000 description 6
- 239000012212 insulator Substances 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 230000008021 deposition Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000005525 hole transport Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 229910018572 CuAlO2 Inorganic materials 0.000 description 1
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 1
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 206010034960 Photophobia Diseases 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007850 degeneration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000009396 hybridization Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 230000004807 localization Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
- H01L29/247—Amorphous materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Thin Film Transistor (AREA)
- Physical Vapour Deposition (AREA)
Abstract
本发明公开了一种p型CuNiSnO非晶氧化物半导体薄膜,所述CuNiSnO中,Cu为+1价,Ni为+2价,Sn为+2价;其化学式为CuxNiySnzO0.5x+y+z,其中0.1≦x≦0.5,0.1≦y≦0.5,0.2≦z≦0.5,且x+y+z=1。本发明还公开了p型CuNiSnO非晶氧化物半导体薄膜的制备方法及其在薄膜晶体管中的应用。以CuNiSnO陶瓷片为靶材,采用脉冲激光沉积法制得的p型CuNiSnO非晶薄膜空穴浓度1013~1016cm‑3,可见光透过率≧80%。以该非晶薄膜为沟道层,制备的薄膜晶体管开关电流比在103量级,场效应迁移率0.5~3.2cm2/Vs。
Description
技术领域
本发明涉及一种非晶氧化物半导体薄膜,尤其涉及一种p型非晶氧化物半导体薄膜及其制备方法。
背景技术
薄膜晶体管(TFT)是微电子特别是显示工程领域的核心技术之一。目前,TFT主要是基于非晶硅(a-Si)技术,但是a-Si TFT是不透光的,光敏性强,需要加掩膜层,显示屏的像素开口率低,限制了显示性能,而且a-Si迁移率较低(~2 cm2/Vs),不能满足一些应用需求。基于多晶硅(p-Si)技术的TFT虽然迁移率高,但是器件均匀性较差,而且制作成本高,这限制了它的应用。此外,有机半导体薄膜晶体管(OTFT)也有较多的研究,但是OTFT的稳定性不高,迁移率也比较低(~1 cm2/Vs),这对其实际应用是一个较大制约。
为解决上述问题,人们近年来开始致力于非晶氧化物半导体(AOS)TFT的研究,其中最具代表性的是InGaZnO。与Si基TFT不同,AOS TFT具有如下优点:可见光透明,光敏退化性小,不用加掩膜层,提高了开口率,可解决开口率低对高分辨率、超精细显示屏的限制;易于室温沉积,适用于有机柔性基板;迁移率较高,可实现高的开/关电流比,较快的器件响应速度,应用于高驱动电流和高速器件;特性不均较小,电流的时间变化也较小,可抑制面板的显示不均现象,适于大面积化用途。
由于金属氧化物特殊的电子结构,氧原子的2p能级一般都远低于金属原子的价带电子能级,不利于轨道杂化,因而O 2p轨道所形成的价带顶很深,局域化作用很强,因而空穴被严重束缚,表现为深受主能级,故此,绝大多数的氧化物本征均为n型导电,具有p型导电特性的氧化物屈指可数。目前报道的p型导电氧化物半导体主要为SnO、NiO、Cu2O、CuAlO2等为数不多的几种,但这些氧化物均为晶态结构,不是非晶形态。目前人们正在研究的AOS如InGaZnO等均为n型半导体,具有p型导电的非晶态氧化物半导体几乎没有。因而,目前报道的AOS TFT均为n型沟道,缺少p型沟道的AOS TFT,这对AOS TFT在新一代显示、透明电子学等诸多领域的应用产生了很大的制约。因而,设计和寻找并制备出p型导电的非晶氧化物半导体薄膜是人们亟需解决的一个难题。
发明内容
本发明针对实际应用需求,拟提供一种p型非晶氧化物半导体薄膜及其制备方法。
本发明提供了一种p型CuNiSnO非晶氧化物半导体薄膜,其中:Cu为+1价,Ni为+2价,Sn为+2价,这三种元素各自的氧化物Cu2O、NiO、SnO均为p型导电,因而Cu、Ni和Sn三者组合共同构成的材料基体也为p型导电;同时Sn具有球形电子轨道,在非晶状态下电子云高度重合,因而起到空穴传输通道的作用。
本发明所提供的p型CuNiSnO非晶氧化物半导体薄膜,在CuNiSnO中,Cu为+1价,Ni为+2价,Sn为+2价;CuNiSnO薄膜为非晶态,其化学式为CuxNiySnzO0.5x+y+z,其中0.1≦x≦0.5,0.1≦y≦0.5,0.2≦z≦0.5,且x+y+z=1;CuNiSnO非晶薄膜具有p型导电特性,空穴浓度1013~1016cm-3,可见光透过率≧80%。
本发明还提供了制备上述p型CuNiSnO非晶氧化物半导体薄膜的制备方法,具体步骤如下:
(1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在900~1100℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为(0.1~0.5):(0.1~0.5):(0.2~0.5);
(2)采用脉冲激光沉积(PLD)方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度不高于2×10-3Pa;
(3)通入O2为工作气体,气体压强5~10Pa,衬底温度为25~500℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,在不高于100Pa的O2气氛中自然冷却到室温,得到p型CuNiSnO非晶薄膜。
以本发明的上述p型CuNiSnO非晶氧化物半导体薄膜为沟道层,制备出AOS薄膜晶体管(TFT),所得的p型非晶CuNiSnO TFT开关电流比在103量级,场效应迁移率0.5~3.2cm2/Vs。
上述材料参数和工艺参数为发明人经多次实验确立的,需要严格控制,在发明人的实验中若超出上述参数的范围,则无法实现设计的p型CuNiSnO材料,也无法获得具有p型导电且为非晶态的CuNiSnO薄膜。
本发明的有益效果在于:
1)本发明所述的p型CuNiSnO非晶氧化物半导体薄膜,其中Cu、Ni和Sn三者组合共同构成p型导电的材料基体,同时Sn起到空穴传输通道的作用,基于上述原理,CuNiSnO是一种良好的p型AOS材料。
2)本发明所述的p型CuNiSnO非晶氧化物半导体薄膜,具有良好的材料特性,其p型导电性能易于通过组分比例实现调控。
3)本发明所述的p型CuNiSnO非晶氧化物半导体薄膜,以此作为沟道层制备的p型AOS TFT具有较好的性能,为p型AOS TFT的应用奠定了基础。
4)本发明所述的p型CuNiSnO非晶氧化物半导体薄膜,与已存在的n型InGaZnO非晶氧化物半导体薄膜组合,可形成一个完整的AOS的p-n体系,且p型CuNiSnO与n型InGaZnO均为透明半导体材料,因而可制作透明光电器件和透明逻辑电路,开拓AOS在透明电子产品中应用,促进透明电子学的发展。
5)本发明所述的p型CuNiSnO非晶氧化物半导体薄膜,可在室温下生长,与有机柔性衬底相兼容,因而可在可穿戴、智能化的柔性产品中获得广泛应用。
6)本发明所述的p型CuNiSnO非晶氧化物半导体薄膜,在生长过程中存在较宽的参数窗口,易于大面积室温沉积,能耗低,制备工艺简单、成本低,可实现工业化生产。
附图说明
图1为各实施例所采用的p型非晶CuNiSnO TFT器件结构示意图。图中,1为低阻n++ Si衬底,同时也作为栅极,2为SiO2绝缘介电层,3为p型非晶CuNiSnO沟道层,4为金属Ni源极,5为金属Ni漏极。
图2为实施例1制得的以p型CuNiSnO非晶氧化物半导体薄膜为沟道层的TFT的转移特性曲线。
具体实施例
以下结合附图及具体实施例进一步说明本发明。
实施例1
(1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在1000℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为0.25:0.25:0.5;
(2)采用脉冲激光沉积(PLD)方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度为1.8×10-3Pa;
(3)通入O2为工作气体,气体压强5Pa,衬底温度为25℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,便得到p型Cu0.25Ni0.25Sn0.5O0.875非晶薄膜。
以石英为衬底,按照上述生长步骤制得p型Cu0.25Ni0.25Sn0.5O0.875薄膜,对其进行结构、电学和光学性能测试,测试结果为:薄膜为非晶态,厚度46nm;具有p型导电特性,空穴浓度1015cm-3;可见光透过率81%。
以镀覆有300nm厚度SiO2的n++-Si为衬底,按照上述生长步骤制得p型Cu0.25Ni0.25Sn0.5O0.875薄膜,以此作为沟道层,采用图1所示的结构制作出TFT器件,n++-Si为栅极,300nm厚的SiO2为栅极绝缘层,Cu0.25Ni0.25Sn0.5O0.875沟道层厚度46nm,100nm厚的Ni金属为源极和漏极, TFT沟道层长和宽分别为200μm和1000μm。对该p型CuAlSnO非晶薄膜为沟道层的TFT进行器件性能测试,如图2,测试结果:开关电流比为2.4×103,场效应迁移率0.9cm2/Vs。
实施例2
(1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在900℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为0.1:0.5:0.4;
(2)采用脉冲激光沉积(PLD)方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度为9×10-4Pa;
(3)通入O2为工作气体,气体压强5Pa,衬底温度为25℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,便得到p型Cu0.1Ni0.5Sn0.4O0.95非晶薄膜。
以石英为衬底,按照上述生长步骤制得p型Cu0.1Ni0.5Sn0.4O0.95薄膜,对其进行结构、电学和光学性能测试,测试结果为:薄膜为非晶态,厚度42nm;具有p型导电特性,空穴浓度1013cm-3;可见光透过率82%。
以镀覆有300nm厚度SiO2的n++-Si为衬底,按照上述生长步骤制得p型Cu0.1Ni0.5Sn0.4O0.95薄膜,以此作为沟道层,采用图1所示的结构制作出TFT器件,n++-Si为栅极,300nm厚的SiO2为栅极绝缘层,Cu0.1Ni0.5Sn0.4O0.95沟道层厚度42nm,100nm厚的Ni金属为源极和漏极, TFT沟道层长和宽分别为200μm和1000μm。对该p型CuAlSnO非晶薄膜为沟道层的TFT进行器件性能测试,测试结果:开关电流比为2.1×103,场效应迁移率0.5cm2/Vs。
实施例3
(1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在1000℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为0.4:0.1:0.5;
(2)采用脉冲激光沉积(PLD)方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度为1×10-3Pa;
(3)通入O2为工作气体,气体压强7Pa,衬底温度为150℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,在100Pa的O2气氛中自然冷却到室温,得到p型Cu0.4Ni0.1Sn0.5O0.8非晶薄膜。
以石英为衬底,按照上述生长步骤制得p型Cu0.4Ni0.1Sn0.5O0.8薄膜,对其进行结构、电学和光学性能测试,测试结果为:薄膜为非晶态,厚度45nm;具有p型导电特性,空穴浓度1014cm-3;可见光透过率80%。
以镀覆有300nm厚度SiO2的n++-Si为衬底,按照上述生长步骤制得p型Cu0.4Ni0.1Sn0.5O0.8薄膜,以此作为沟道层,采用图1所示的结构制作出TFT器件,n++-Si为栅极,300nm厚的SiO2为栅极绝缘层,Cu0.4Ni0.1Sn0.5O0.8沟道层厚度45nm,100nm厚的Ni金属为源极和漏极, TFT沟道层长和宽分别为200μm和1000μm。对该p型CuAlSnO非晶薄膜为沟道层的TFT进行器件性能测试,测试结果:开关电流比为7.5×103,场效应迁移率3.2cm2/Vs。
实施例4
(1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在1050℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为0.3:0.5:0.2;
(2)采用脉冲激光沉积(PLD)方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度为9×10-4Pa;
(3)通入O2为工作气体,气体压强8Pa,衬底温度为300℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,在90Pa的O2气氛中自然冷却到室温,得到p型Cu0.3Ni0.5Sn0.2O0.85非晶薄膜。
以石英为衬底,按照上述生长步骤制得p型Cu0.3Ni0.5Sn0.2O0.85薄膜,对其进行结构、电学和光学性能测试,测试结果为:薄膜为非晶态,厚度49nm;具有p型导电特性,空穴浓度1015cm-3;可见光透过率83%。
以镀覆有300nm厚度SiO2的n++-Si为衬底,按照上述生长步骤制得p型Cu0.3Ni0.5Sn0.2O0.85薄膜,以此作为沟道层,采用图1所示的结构制作出TFT器件,n++-Si为栅极,300nm厚的SiO2为栅极绝缘层,Cu0.3Ni0.5Sn0.2O0.85沟道层厚度49nm,100nm厚的Ni金属为源极和漏极, TFT沟道层长和宽分别为200μm和1000μm。对该p型CuAlSnO非晶薄膜为沟道层的TFT进行器件性能测试,测试结果:开关电流比为8.5×103,场效应迁移率2.6cm2/Vs。
实施例5
(1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在1100℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为0.5:0.2:0.3;
(2)采用脉冲激光沉积(PLD)方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度为9×10-4Pa;
(3)通入O2为工作气体,气体压强10Pa,衬底温度为500℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,在80Pa的O2气氛中自然冷却到室温,得到p型Cu0.5Ni0.2Sn0.3O0.75非晶薄膜。
以石英为衬底,按照上述生长步骤制得p型Cu0.5Ni0.2Sn0.3O0.75薄膜,对其进行结构、电学和光学性能测试,测试结果为:薄膜为非晶态,厚度52nm;具有p型导电特性,空穴浓度1016cm-3;可见光透过率85%。
以镀覆有300nm厚度SiO2的n++-Si为衬底,按照上述生长步骤制得p型Cu0.5Ni0.2Sn0.3O0.75薄膜,以此作为沟道层,采用图1所示的结构制作出TFT器件,n++-Si为栅极,300nm厚的SiO2为栅极绝缘层,Cu0.5Ni0.2Sn0.3O0.75沟道层厚度52nm,100nm厚的Ni金属为源极和漏极, TFT沟道层长和宽分别为200μm和1000μm。对该p型CuAlSnO非晶薄膜为沟道层的TFT进行器件性能测试,测试结果:开关电流比为3.7×103,场效应迁移率1.2cm2/Vs。
上述各实施例中,使用的原料Cu2O粉末、NiO粉末和SnO粉末的纯度均在99.99%以上。
本发明p型CuNiSnO非晶氧化物半导体薄膜制备所使用的衬底,并不局限于实施例中的单晶硅片和石英片,其它各种类型的衬底均可使用。
Claims (5)
1.一种p型CuNiSnO非晶氧化物半导体薄膜,其特征在于:所述CuNiSnO中,Cu为+1价,Ni为+2价,Sn为+2价;且所述p型CuNiSnO非晶氧化物半导体薄膜的化学式为CuxNiySnzO0.5x+y+z,其中0.1≦x≦0.5,0.1≦y≦0.5,0.2≦z≦0.5,且x+y+z=1。
2.根据权利要求1所述的一种p型CuNiSnO非晶氧化物半导体薄膜,其特征在于:所述p型CuNiSnO非晶氧化物半导体薄膜的空穴浓度1013~1016cm-3,可见光透过率≧80%。
3.如权利要求1或2所述的一种p型CuNiSnO非晶氧化物半导体薄膜的制备方法,其特征在于包括步骤:
1)以高纯Cu2O、NiO和SnO粉末为原材料,混合,研磨,在900~1100℃的Ar气氛下烧结,制成CuNiSnO陶瓷片为靶材,其中Cu、Ni、Sn三组分的原子比为0.1~0.5:0.1~0.5:0.2~0.5;
2)采用脉冲激光沉积方法,将衬底和靶材安装在PLD反应室中,抽真空至真空度不高于2×10-3Pa;
3)通入O2为工作气体,气体压强5~10Pa,衬底温度为25~500℃,以脉冲激光轰击靶材,靶材表面原子和分子熔蒸后在衬底上沉积,形成一层薄膜,在不高于100Pa的O2气氛中自然冷却到室温,得到p型CuNiSnO非晶薄膜。
4.如权利要求1或2所述的一种p型CuNiSnO非晶氧化物半导体薄膜在薄膜晶体管中的应用,其特征在于:所述p型CuNiSnO非晶氧化物半导体薄膜为薄膜晶体管的p型沟道层。
5. 如权利利要求4所述的一种p型CuNiSnO非晶氧化物半导体薄膜在薄膜晶体管中的应用, 其特征在于:所述薄膜晶体管的开关电流比在103量级,场效应迁移率0.5~3.2cm2/Vs。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610914011.XA CN106711197B (zh) | 2016-10-20 | 2016-10-20 | 一种p型CuNiSnO非晶氧化物半导体薄膜及其制备方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610914011.XA CN106711197B (zh) | 2016-10-20 | 2016-10-20 | 一种p型CuNiSnO非晶氧化物半导体薄膜及其制备方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106711197A true CN106711197A (zh) | 2017-05-24 |
CN106711197B CN106711197B (zh) | 2020-04-14 |
Family
ID=58940697
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610914011.XA Expired - Fee Related CN106711197B (zh) | 2016-10-20 | 2016-10-20 | 一种p型CuNiSnO非晶氧化物半导体薄膜及其制备方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106711197B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109037031A (zh) * | 2018-07-11 | 2018-12-18 | 华东师范大学 | 一种掺镍氧化铜薄膜晶体管及制备方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150236169A1 (en) * | 2010-04-15 | 2015-08-20 | Electronics And Telecommunications Research Institute | Semiconductor device and method of manufacturing the same |
-
2016
- 2016-10-20 CN CN201610914011.XA patent/CN106711197B/zh not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150236169A1 (en) * | 2010-04-15 | 2015-08-20 | Electronics And Telecommunications Research Institute | Semiconductor device and method of manufacturing the same |
Non-Patent Citations (2)
Title |
---|
MING YANG ET AL: "Copper doped nickel oxide transparent p-type conductive thinfilms deposited by pulsed plasma deposition", 《THIN SOLID FILMS》 * |
TENGDA LIN ET AL: "HIgh performance p-type NIOx thin-film transistor by Sn doping", 《APPLIED PHYSICS LETTERS》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109037031A (zh) * | 2018-07-11 | 2018-12-18 | 华东师范大学 | 一种掺镍氧化铜薄膜晶体管及制备方法 |
CN109037031B (zh) * | 2018-07-11 | 2021-11-19 | 华东师范大学 | 一种掺镍氧化铜薄膜晶体管及制备方法 |
Also Published As
Publication number | Publication date |
---|---|
CN106711197B (zh) | 2020-04-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104584200B (zh) | 薄膜晶体管和显示装置 | |
Sanal et al. | Room temperature deposited transparent p-channel CuO thin film transistors | |
CN102738206B (zh) | 氧化物半导体膜及半导体装置 | |
CN102124569B (zh) | 使用多有源沟道层的薄膜晶体管 | |
CN104900654B (zh) | 双栅极氧化物半导体tft基板的制作方法及其结构 | |
CN105849878A (zh) | 具有未图案化的蚀刻停止的motft | |
CN103779209A (zh) | 一种多晶硅薄膜晶体管的制备方法 | |
CN106783871A (zh) | 一种阵列基板、显示面板及制作方法 | |
CN103346089B (zh) | 一种自对准双层沟道金属氧化物薄膜晶体管及其制作方法 | |
CN102683423A (zh) | 一种顶栅结构金属氧化物薄膜晶体管及其制作方法 | |
CN110416087A (zh) | 具有钝化增强层的金属氧化物薄膜晶体管及其制作方法 | |
CN106328592A (zh) | 薄膜晶体管及其制作方法、阵列基板和显示装置 | |
TW201220504A (en) | Metal oxide thin film transistor and manufacturing method thereof | |
CN109767989A (zh) | 柔性衬底的薄膜晶体管及其制备方法 | |
CN106711197A (zh) | 一种p型CuNiSnO非晶氧化物半导体薄膜及其制备方法 | |
CN103545377A (zh) | 一种氧化物薄膜晶体管及其制造方法 | |
CN106298953B (zh) | 一种高性能氧化镍基p型薄膜晶体管及其制备方法 | |
CN106711196B (zh) | 一种p型ZnGeSnO非晶氧化物半导体薄膜及其制备方法 | |
CN102969364A (zh) | 一种改善器件均匀性的顶栅结构金属氧化物薄膜晶体管及其制作方法 | |
CN106702326A (zh) | 一种p型NiMSnO非晶氧化物半导体薄膜及其制备方法 | |
CN106711195A (zh) | 一种p型ZnMSnO非晶氧化物半导体薄膜及其制备方法 | |
CN106711192B (zh) | 一种p型CuMSnO非晶氧化物半导体薄膜及其制备方法 | |
CN106711198A (zh) | 一种p型CuMInO非晶氧化物半导体薄膜及其制备方法 | |
CN106711201A (zh) | 一种p型CrMCuO非晶氧化物半导体薄膜及其制备方法 | |
CN106711202A (zh) | 一种p型ZnAlSnO非晶氧化物半导体薄膜及其制备方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200414 |