CN106684066B - 一种封装芯片及基于封装芯片的信号传输方法 - Google Patents

一种封装芯片及基于封装芯片的信号传输方法 Download PDF

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CN106684066B
CN106684066B CN201611264772.1A CN201611264772A CN106684066B CN 106684066 B CN106684066 B CN 106684066B CN 201611264772 A CN201611264772 A CN 201611264772A CN 106684066 B CN106684066 B CN 106684066B
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chip
carrier
rewiring
interconnection metal
metal wire
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CN106684066A (zh
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馬志強
林志荣
张晓东
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN201611264772.1A priority Critical patent/CN106684066B/zh
Priority to CN202010120311.7A priority patent/CN111968958B/zh
Publication of CN106684066A publication Critical patent/CN106684066A/zh
Priority to PCT/CN2017/114772 priority patent/WO2018121195A1/zh
Priority to EP17210862.3A priority patent/EP3343608A1/en
Priority to US15/858,302 priority patent/US10490506B2/en
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Abstract

本发明实施例提供一种封装芯片，封装芯片包括封装结构、重布线结构和载体，封装结构包括第一芯片和与第一芯片相邻的第二芯片；重布线结构用于电连接第一芯片与载体，并用于电连接第二芯片与载体，重布线结构包括由绝缘材料构成的主体和焊接于主体的下表面的凹凸焊接阵列；主体的内部设有重布线金属线组和具有弯曲或弯折设计的互连金属线组；载体用于固定重布线结构，载体的下表面设有焊接球或焊盘或连接器；重布线结构的主体的上表面贴合第一芯片和第二芯片的下表面，重布线结构的凹凸焊接阵列焊接于载体的上表面。本发明实施例能够在保证信号通路较短的情况下，提高传输的可靠性。

Description

一种封装芯片及基于封装芯片的信号传输方法
技术领域
本发明涉及电子封装技术领域，具体涉及一种封装芯片及基于封装芯片的信号传输方法。
背景技术
随着消费类电子产品的需求驱动，如智能手机、平板电脑等电子产品的封装面向薄、小及低成本的方向发展，这样便对半导体工艺以及芯片提出更高的要求，要求一个封装芯片中能够装载越来越多的集成电路。基于产业和工业制造商的需求，应用于封装芯片中的集成电路被搭载在各种各样的基础芯片(例如，裸芯片等)中。随着工艺的发展和出于更高功能的需求，将两个或两个以上裸芯片封装在一起的封装方式越来越受到业界的重视。当前针对高端产品采用2.5D扇出封装(Fan-out Package，FOP)，2.5D FOP即由扇出重布线层(Re Distribution Layer，RDL)实现高密度互连串连起不同功能及大小的裸芯片。
扇出封装是近年来推出的一种新的先进封装方法，其最初结合了晶圆级封装制造技术与单颗裸芯片的传统封装优势进行批量制造，从而大幅度降低了电子产品的封装成本。典型的扇出封装工艺流程，首先将裸芯片贴装在晶圆载体上，塑封后将晶圆载体拆键合，其后制作重布线层(Re Distribution Layer，RDL)并植球，最后切片做可靠性测试及产品包封。
封装在一个封装芯片中的多个裸芯片并不是独立工作的，不同的裸芯片之间存在数据交互、信号传递的需求。2.5D扇出封装结构为实现相邻两个裸芯片之间的信号传递，两个裸芯片之间的互连布层线必须跨越两个裸芯片之间的铸模(Molding Compound)扇出区。目前，该互连布线层设计在跨越两个裸芯片的部分为最短距离直线的设计，可参见图3，为现有技术中的裸芯片的管脚通过互连金属模块进行互连的俯视图但是，2.5D扇出封装工艺中采用了不同热膨胀系数的封装材料，如塑封料、芯片和载体等。若所采用的材料间热膨胀系数不匹配，因温度循环产生的应力无法延伸，会引起相邻两个裸芯片之间的互连布层线几毫米、几十毫米的弯曲，甚至断裂，影响相邻两个裸芯片传输的可靠性。
发明内容
本发明实施例提供一种封装芯片及基于封装芯片的信号传输方法，能够在保证信号通路较短的情况下，提高相邻两个芯片之间传输的可靠性。
本发明实施例第一方面提供一种封装芯片，所述封装芯片包括封装结构、重布线结构和载体；
所述封装结构包括第一芯片和与所述第一芯片相邻的第二芯片；
所述重布线结构用于电连接所述第一芯片与所述载体，并用于电连接所述第二芯片与所述载体，所述重布线结构包括由绝缘材料构成的主体和焊接于所述主体的下表面的凹凸焊接阵列；所述主体的内部设有重布线金属线组，所述重布线金属线组与所述第一芯片、所述第二芯片电连接，所述重布线金属线组通过所述凹凸焊接阵列与所述载体电连接；所述主体的内部设有具有弯曲设计的互连金属线组，所述互连金属线组与所述第一芯片、所述第二芯片电连接；
所述载体用于固定所述重布线结构，所述载体的下表面设有焊接球或焊盘或连接器；
所述重布线结构的主体的上表面贴合所述第一芯片和所述第二芯片的下表面，所述重布线结构的凹凸焊接阵列焊接于所述载体的上表面。
本发明实施例第一方面，通过互连金属线组连接相邻的芯片可以保证信号通路较短，采用弯曲设计的互连金属线组可以避免互连金属线组因温度循环而产生应力时的无法延伸而断裂，提高相邻两个功芯片之间的传输可靠性。
在一种可能的设计中，所述第一芯片和所述第二芯片的下表面设有管脚，所述管脚包括第一组管脚和第二组管脚，所述第一组管脚用于实现所述重布线金属线组与所述第一芯片、所述第二芯片之间的电连接；所述第二组管脚用于实现所述互连金属线组与所述第一芯片、所述第二芯片之间的电连接。所述第一组管脚和所述第二组管脚连接的对象不同，在外形、工艺上无差别。
在一种可能的设计中，所述重布线金属线组的一端连接所述第一芯片、所述第二芯片的第一组管脚，所述重布线金属线组的另一端焊接所述凹凸焊接阵列，即所述重布线金属线组贯穿所述重布线结构的主体，实现所述第一芯片与所述载体以及所述第二芯片与所述载体之间的电连接，以建立所述第一芯片与所述载体以及所述第二芯片与所述载体之间的信号通路。
在一种可能的设计中，所述互连金属线组的一端连接所述第一芯片的第二组管脚，所述互连金属线组的另一端连接所述第二芯片的第二组管脚，实现所述互连金属线组与所述第一芯片、所述第二芯片之间的电连接，以通过所述互连金属线组建立所述第一芯片与所述第二芯片之间的信号通路。
在一种可能的设计中，所述互连金属线组从上至下包括第一互连金属层、参考层和第二互连金属层，，所述第一互连金属层和所述第二互连金属层用于所述第一芯片与所述第二芯片之间的信号传输，即一个用于发送信号，一个用户接收信号；所述参考层与所述第一互连金属层、所述第二互连金属层绝缘，能够减少所述第一互连金属层与所述第二互连金属层之间的干扰，提高所述第一互连金属层与所述第二互连金属层之间信号的稳定性。
在一种可能的设计中，所述第一互连金属层、所述参考层和所述第二互连金属层相互平行，即三者的弯曲的弧度或角度相同，确保信号的稳定性。
在一种可能的设计中，所述封装结构还包括胶体，所述胶体用于包裹所述第一芯片除所述第一芯片的下表面之外的其它面以及所述第二芯片除所述第二芯片的下表面之外的其它面，所述胶体用于避免其它器件对所述第一芯片、所述第二芯片的干扰。
在一种可能的设计中，所述胶体还用于填充所述凹凸焊接阵列的间隙和周围，以缓解重布线结构的凸点上的应力。
在一种可能的设计中，所述第一芯片和所述第二芯片为裸芯片或堆栈裸芯片，实际应用中，所述封装结构包括至少两个裸芯片，或包括至少两个堆栈裸芯片，或包括至少一个裸芯片和至少一个堆栈裸芯片，扩大本发明实施例的应用范围。
在一种可能的设计中，所述弯曲设计在所述重布线结构的主体的水平方向包括至少一段弧线或折线，即从所述重布线结构的主体的水平方向或上表面或下表面看，所述弯曲设计包括至少一段弧线或折线，能够提高相邻两个芯片之间传输的可靠性
本发明实施例第二方面提供一种基于封装芯片的信号传输方法，所述封装芯片是第一方面提供的封装芯片，所述方法包括：
所述第一芯片通过所述互连金属线组将信号从所述第一芯片传输至所述第二芯片。
本发明实施例第二方面，通过互连金属线组实现相邻两个芯片之间的信号传输，可以保证信号通路较短，采用具有弯曲设计的互连金属线组能够提高相邻两个芯片之间的传输可靠性。
在本发明实施例中，通过互连金属线组连接相邻的芯片可以保证信号通路较短，采用具有弯曲设计的互连金属线组可以避免互连金属线组因温度循环而产生应力时的无法延伸而断裂，提高相邻两个芯片之间的传输可靠性。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下表面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下表面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的封装芯片的截面示意图；
图2为本发明实施例提供的重布线结构的截面示意图；
图3为现有技术中裸芯片的管脚通过互连金属线组进行互连的俯视图；
图4a为本发明实施例提供的一种裸芯片的管脚通过互连金属线组进行互连的俯视图；
图4b为本发明实施例提供的另一种裸芯片的管脚通过互连金属线组块进行互连的俯视图；
图4c本发明实施例提供的又一种裸芯片的管脚通过互连金属线组进行互连的俯视图；
图4d为本发明实施例提供的又一种裸芯片的管脚通过互连金属线组进行互连的俯视图；
图5为本发明实施例提供的封装芯片的制造流程示意图。
具体实施方式
为了解决2.5D扇出封装结构中相邻两个芯片之间的可靠性较差的问题，本发明实施例提供一种封装芯片，将互连金属线组设计为具有弯曲或弯折设计，能够避免互连金属线组因温度循环而产生应力时的无法延伸而断裂，提高相邻两个芯片之间传输的可靠性。其中，所述封装结构包括至少两个并排的相邻的芯片，所述封装结构可为2.5D扇出封装结构，也可为2.5D扇出封装结构与3D扇出封装结构相结合的封装结构。
请参见图1，为本发明实施例提供的封装芯片的截面示意图。封装芯片10包括载体120，重布线结构140和封装结构160。基于图1所示的截面示意图，依据从上至下的顺序对封装芯片进行介绍。
图1所示的封装结构160包括第一芯片1611和与所述第一芯片1611相邻的第二芯片1612。实际应用中，所述封装结构160包括至少两个相邻的芯片，图1所示两个芯片1611和1612仅用于示例性举例，并不构成对本发明实施例的限定。相邻，指一条线上的位置相邻，可以是前后相邻，也可以是左右相邻，图1所示的两个相邻芯片之间有一定的空隙，实际应用中，两个相邻芯片之间可以有空隙，也可以没有空隙。
所述第一芯片1611与所述第二芯片1612可以是并排相邻。并排，指排列在一条线上，不分前后，即任意两个芯片排列在一条线上。
其中，所述第一芯片1611或所述第二芯片1612可以为裸芯片(Die)或堆栈裸芯片(Stack Dies)，或堆栈裸芯片构成的功能性模组，甚至是已经经过一次封装的“芯片”。裸芯片，半导体元器件制造完成、封装之前的产品形式，通常是大圆片形式(wafer form)或单颗芯片(die form)的形式存在，封装后成为半导体元件、集成电路、或更复杂电路(混合电路)的组成部分。堆栈裸芯片，即多个裸芯片堆叠在一起形成的芯片。
所述封装结构160中的至少两个芯片，彼此之间可以为同质芯片，也可以为异质芯片，比如可以将模拟裸芯片和数字裸芯片封装在一起；也可以将在不同晶圆工艺节点下生产的裸芯片封装在一起；或者将不同功能的裸芯片封装在一起。
所述第一芯片1611和所述第二芯片1612的下表面设有管脚，所述管脚包括第一组管脚和第二组管脚。需要说明的是，所述第一组管脚和所述第二组管脚所连接的对象有所差别，在外形、工艺上无差别。
图1所示的重布线结构140用于电连接所述第一芯片1611与所述载体120，并用于电连接所述第二芯片1612与所述载体。请参见图2，为本发明实施例提供的重布线结构的截面示意图，所述重布线结构140包括由绝缘材料构成的主体和焊接于所述主体的下表面的凹凸焊接阵列145，所述重布线结构140的主体即为图2所示截面示意图中的点状部分。
所述重布线结构140的主体的上表面贴合所述第一芯片1611和所述第二芯片1612的下表面，所述重布线结构140的凹凸焊接阵列145焊接于所述载体120的上表面，以使得所述重布线结构140固定在所述载体120上。
所述主体的内部设有重布线金属线组，所述重布线金属线组与所述第一芯片1611、所述第二芯片1612电连接，所述重布线金属线组通过所述凹凸焊接阵列145与所述载体120电连接，从而实现所述重布线结构电连接所述第一芯片1611与所述载体120，并用于电连接所述第二芯片1612与所述载体120。具体的，所述重布线金属线组通过所述第一组管脚与所述第一芯片1611、所述第二芯片1612电连接。所述重布线金属线组贯穿所述主体，一端连接所述第一芯片1611、所述第二芯片1612的第一组管脚，另一端焊接所述凹凸焊接阵列145，并且所述凹凸焊接阵列145焊接于所述载体120的上表面，从而实现所述第一芯片1611与所述载体120以及所述第二芯片1612与所述载体120之间的电连接。
基于图2所示的截面示意图，所述重布线金属线组包括至少一个树形结构，即所述主体的内部设有至少一个树形结构，下面将以一个树形结构为例进行介绍。一个树形结构包括至重布线金属层142以及镀通孔或盲孔143。需要说明的是，所述重布线金属层142和所述镀通孔或所述盲孔143的数量不止一个，具体数量在此不做限定。所述重布线金属层142与所述载体120的水平方向平行，所述镀通孔或所述盲孔143与所述载体120的水平方向垂直。所述重布线金属层142的端口在所述主体内，所述镀通孔或所述盲孔143的端口在所述主体内或表面上。处于所述重布线结构140表面的所述重布线金属层142，或，所述镀通孔或所述盲孔143的某一端的端口与所述第一芯片1611、所述第二芯片1612的第一组管脚贴附在一起。在所述主体内的所述镀通孔或所述盲孔143用于电连接相邻的所述重布线金属层142。
所述主体的内部设有具有弯曲设计的互连金属线组144，所述互连金属线组144与所述第一芯片1611、所述第二芯片1612电连接。具体的，所述互连金属线组144通过所述第二组管脚与所述第一芯片1611、所述第二芯片1612电连接。所述互连金属线组144的一端连接所述第一芯片1611的第二组管脚，所述互连金属线组144的另一端连接所述第二芯片1612的第二组管脚，从而实现所述互连金属线组144与所述第一芯片1611、所述第二芯片1612之间的电连接。
需要说明的是，若所述第一组管脚用于连接所述重布线金属线组，则所述第二组管脚用于连接所述互连金属线组144。反之，若所述第二组管脚用于连接所述重布线金属线组，则所述第一组管脚用于连接所述互连金属线组144。
基于图2所示的截面示意图，所述互连金属线组144从上至下包括第一互连金属层1442、参考层1444和第二互连金属层1446，每个层相互平行。所述第一互连金属层1442和所述第二互连金属层1446用于所述第一芯片1611与所述第二芯片1612之间的信号传输，例如，所述第一芯片1611通过所述第一互连金属层1442将信号传输至所述第二芯片1612，所述第二芯片1612通过所述第二互连金属层1446将信号传输至所述第一芯片1611；或者，所述第一芯片1611通过所述第二互连金属层1446将信号传输至所述第二芯片1612，所述第二芯片1612通过所述第一互连金属层1442将信号传输至所述第一芯片1611。
本发明实施例中提供的所述互连金属线组144具有弯曲设计，弯曲即不直，从所述重布线结构140的主体的上表面或下表面看起来，该弯曲设计可以为有弧度的曲线或“S”线，也可以为有弯折角度的折线，弯折角度可以为锐角、钝角、直角。例如，所述互连线金属线组144与所述载体120的水平方向相互平行的部分不是最短距离直线的设计，而是包括至少一段弧线或折线的设计。请参见图4a-4d，为本发明实施例提供的裸芯片的管脚通过互连金属线组进行互连的俯视图。图4a-4d中的小圆圈可以看作是所述第一芯片1611和所述第二芯片1612的管脚，该管脚用于电连接所述互连金属线组144，虚线小圆圈在此不做限定。
在图4a中，所述互连金属线组144与所述载体120的水平方向相互平行的部分包括至少一段弧线，以避免互连金属线组144因温度循环而产生应力时的无法延伸而断裂，提高相邻两个芯片之间传输的可靠性。在图4b、4c及4d中，所述互连金属线组144与所述载体120的水平方向相互平行的部分包括至少一段折线，达到的效果与图4a相同。需要说明的是，所述互连金属线组144还可以设计为同时包括弧线或折线的结构。
其中，所述参考层1444与所述第一互连金属层1442、第二互连金属层1446绝缘，用于隔离所述第一互连金属层1442与所述第二互连金属层1446，能够减少所述第一互连金属层1442与所述第二互连金属层1446之间的干扰，提高所述第一互连金属层1442与所述第二互连金属层1446之间信号的稳定性。所述参考层1444可以为与所述第一互连金属层1442、所述第二互连金属层1446相互平行且重叠的部分。
图1所示的载体120可以为基板，用于固定所述重布线结构140，所述凹凸焊接阵列145以焊锡的方式将所述重布线结构140固定在所述载体120上。所述载体120的下表面设有焊接球180或焊盘180或连接器180，用于电连接所述载体120与其它器件，例如印刷电路板(Printed Circuit Board，PCB)。
图1所示的封装结构160还包括胶体162，所述第一芯片1611除所述第一芯片1611的下表面之外的其它面被所述胶体162包裹，所述第二芯片1612除所述第二芯片1612的下表面之外的其它面被所述胶体162包裹。实际应用中，所述胶体162用于包裹任意一个芯片中除与所述重布线结构140的主体的上表面相贴合的那面之外的其它面。
所述胶体162还用于填充所述凹凸焊接阵列145的间隙或周围，以缓解所述重布线结构140的凸点上的应力。应力是指物体由于外因(受力、湿度、温度场变化等)而变形时，在物体内各部分之间产生相互作用的内力，以抵抗这种外因的作用，并试图使物体从变形后的位置恢复到变形前的位置。
本发明实施例提供的一种基于封装芯片的信号传输方法，所述方法应用于图1所示的封装芯片中，所述封装芯片包括载体、重布线结构和封装结构；所述封装结构包括第一芯片和与所述第一芯片相邻的第二芯片；所述重布线结构用于电连接所述第一芯片与所述载体，并用于电连接所述第二芯片与所述载体，所述重布线结构包括由绝缘材料构成的主体和焊接于所述主体的下表面的凹凸焊接阵列；所述主体的内部设有重布线金属线组，所述重布线金属线组与所述第一芯片、所述第二芯片电连接，所述重布线金属线组通过所述凹凸焊接阵列与所述载体电连接；所述主体的内部设有具有弯曲设计的互连金属线组，所述互连金属线组与所述第一芯片、所述第二芯片电连接；所述载体用于固定所述重布线结构，所述载体的下表面设有焊接球或焊盘或连接器；所述重布线结构的主体的上表面贴合所述第一芯片和所述第二芯片的下表面，所述重布线结构的凹凸焊接阵列焊接于所述载体的上表面。
所述方法包括：所述第一芯片通过所述互连金属线组将信号从所述第一芯片传输至所述第二芯片。
其中，信号可以是所述第一芯片从其它芯片接收到的信号，也可以是所述第一芯片自主生成的信号。信号可以携带指令、数据等内容。所述第二芯片也可以通过所述互连金属线组将信号从所述第二芯片传输至所述第一芯片。具体的，所述第一芯片通过所述第一互连金属层将信号从所述第一芯片传输至所述第二芯片，所述第二芯片通过所述第二互连金属层从所述第二芯片传输至所述第一芯片；或者，所述第一芯片通过所述第二互连金属层将信号从所述第一芯片传输至所述第二芯片，所述第二芯片通过所述第一互连金属层从所述第二芯片传输至所述第一芯片。换言之，对所述第一芯片而言，若所述第一互连金属层为发送通道，则所述第二互连金属层为接收通道，此时，对所述第二芯片而言，所述第一互连金属层为接收通道，所述第二互连金属层为发送通道；反之，对所述第一芯片而言，若所述第二互连金属层为接收通道，则所述第一互连金属层为发送通道，此时，对所述第二芯片而言，所述第一互连金属层为发送通道，所述第二互连金属层为接收通道。
在本发明实施例中，通过所述互连金属线组在两个芯片之间传输信号，无需跨越重布线结构通过载体转发，可以保证较短的信号通路。采用具有弯曲设计的互连金属线组可以避免互连金属线组因温度循环而产生应力时的无法延伸而断裂，提高相邻两个芯片之间的可靠性。
请参见图5，为本发明实施例提供的封装芯片的制作流程示意图，其制作流程可包括：
601，通过晶圆切割的方式在原始晶圆上切割出至少两个裸芯片；
602，将切割出来的裸芯片重构(Reconstitution)在预定大小尺寸的载体上；
需要说明的是，裸芯片间的间距会影响裸芯片之间的高密度互连的性能，在工艺允许的情况下，尽量缩短裸芯片间的间距，比如50um以下。
603，通过模塑的方式形成胶体对裸芯片进行包裹形成封装结构；
在胶体将裸芯片包裹之后需要通过一定的工艺处理方法使得裸芯片与重布线结构相对应的一侧裸露出来。比如，使用研磨的方法；或者在模塑的过程中通过临时载体遮住裸芯片的相应位置，待包裹完成后直接去掉临时载体即可。
604，通过重布线(Redistribution)工艺在裸芯片的与重布线结构相对应的一侧上制作出重布线结构。
其中，重布线结构的主体的介质可以为绝缘的、可曝光显影的有机介质构成，比如聚酰亚胺(Polyimide，PI)，聚对苯撑苯并双口恶唑(Poly-p-phenylenebenzobisthiazole，PBO)或环氧树脂基的聚合物(Epoxy Based Polymer，EBP)。而重布线金属层和互连金属层则可以在主体的介质的基础上通过溅射、电镀等工艺制作，使用的材料可以为铜。金属层的最小线宽线距可分别为线宽2um/线距2um至线宽1um/线距1um或更小。而在该主体的介质上可以制作镀铜孔(镀通孔或盲孔)从而实现不同重布线金属层之间的互连，镀铜孔的孔(Via)和孔盘(Via Land)的直径分别可达5um/10um或更小。
605，将重布线结构贴合在载体上；
待裸芯片、胶体和重布线结构被生成之后，可以采用热风重熔(Mass Reflow)或热压键合(Thermo Compression Bonding)等方式将重布线结构贴合在载体(基板)上。底部填充胶可以根据需要在重布线结构与基板之间施加，来缓解重布线结构的凸点上的应力，以提高封装的可靠性。载体可以为多层基板，通过激光钻孔Laser Drill或机械钻孔Mechanical Drill并镀铜等方式实现层之间的信号互通。载体的底部布设有焊接球，以通过钎料球(Solder Ball)与PCB接合。在其他实施方式中，基板底部也可以通过可插拔连接器(Socket)的方式与PCB接合。
以上所述，以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。

Claims (9)

1.一种封装芯片，其特征在于，所述封装芯片包括封装结构、重布线结构和载体；
所述封装结构包括第一芯片和与所述第一芯片并排相邻的第二芯片；
所述重布线结构用于电连接所述第一芯片与所述载体，并用于电连接所述第二芯片与所述载体，所述重布线结构包括由绝缘材料构成的主体和焊接于所述主体的下表面的凹凸焊接阵列；所述主体的内部设有重布线金属线组，所述重布线金属线组与所述第一芯片、所述第二芯片电连接，所述重布线金属线组通过所述凹凸焊接阵列与所述载体电连接；所述主体的内部设有互连金属层，所述互连金属层上布设有具有弯曲设计的互连金属线组，所述互连金属线组与所述第一芯片、所述第二芯片电连接；所述弯曲设计在与所述重布线结构的主体的水平方向相互平行的部分包括至少一段弧线或折线，所述弧线为有弧度的曲线；
所述载体用于固定所述重布线结构，所述载体的下表面设有连接器；
所述重布线结构的主体的上表面贴合所述第一芯片和所述第二芯片的下表面，所述重布线结构的凹凸焊接阵列焊接于所述载体的上表面。
2.如权利要求1所述的封装芯片，其特征在于，所述第一芯片和所述第二芯片的下表面设有管脚，所述管脚包括第一组管脚和第二组管脚；所述第一组管脚用于实现所述重布线金属线组与所述第一芯片、所述第二芯片之间的电连接；所述第二组管脚用于实现所述互连金属线组与所述第一芯片、所述第二芯片之间的电连接。
3.如权利要求2所述的封装芯片，其特征在于，所述重布线金属线组的一端连接所述第一芯片、所述第二芯片的第一组管脚，所述重布线金属线组的另一端焊接所述凹凸焊接阵列，所述重布线金属线组用于实现所述第一芯片与所述载体以及所述第二芯片与所述载体之间的电连接。
4.如权利要求2所述的封装芯片，其特征在于，所述互连金属线组的一端连接所述第一芯片的第二组管脚，所述互连金属线组的另一端连接所述第二芯片的第二组管脚，实现所述互连金属线组与所述第一芯片、所述第二芯片之间的电连接。
5.如权利要求4所述的封装芯片，其特征在于，所述互连金属线组从上至下包括第一互连金属层、参考层和第二互连金属层；所述第一互连金属层和所述第二互连金属层用于所述第一芯片与所述第二芯片之间的信号传输；所述参考层与所述第一互连金属层、所述第二互连金属层绝缘，用于隔离所述第一互连金属层与所述第二互连金属层。
6.如权利要求1至5任一所述的封装芯片，其特征在于，所述封装结构还包括胶体，所述胶体用于包裹所述第一芯片除所述第一芯片的下表面之外的其它面以及所述第二芯片除所述第二芯片的下表面之外的其它面。
7.如权利要求6所述的封装芯片，其特征在于，所述胶体还用于填充所述凹凸焊接阵列的间隙和周围。
8.如权利要求1所述的封装芯片，其特征在于，所述第一芯片和所述第二芯片为裸芯片或堆栈裸芯片。
9.一种基于封装芯片的信号传输方法，其特征在于，所述封装芯片是如权利要求1至8任一所述的封装芯片，所述方法包括：
所述第一芯片通过所述互连金属线组将信号从所述第一芯片模块传输至所述第二芯片。
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