CN106663669A - 图案化接地以及形成图案化接地的方法 - Google Patents

图案化接地以及形成图案化接地的方法 Download PDF

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Publication number
CN106663669A
CN106663669A CN201580046601.9A CN201580046601A CN106663669A CN 106663669 A CN106663669 A CN 106663669A CN 201580046601 A CN201580046601 A CN 201580046601A CN 106663669 A CN106663669 A CN 106663669A
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CN
China
Prior art keywords
ground plane
integrated antenna
body layer
inductive element
wire
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CN201580046601.9A
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English (en)
Inventor
U-M·乔
Y·K·宋
J·H·尹
J-H·李
X·张
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Qualcomm Inc
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Qualcomm Inc
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Publication of CN106663669A publication Critical patent/CN106663669A/zh
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Abstract

根据本公开的一些示例的一种半导体封装可包括：第一主体层(250)，可包括位于第一主体层之上的一个或多个电感器、耦合电感器、或电感性元件的变压器(220)。第一接地平面(260)在第一主体层(250)与该电感性元件(220)之间的第一主体层的顶部上。第一接地平面可具有与由该电感性元件所生成的磁场大致垂直的导线，以及在第一主体层的底部上与第一接地平面对向的第二接地平面(270)。第一接地平面和第二接地平面还可为半导体提供热耗散元件(280)以及减少或消除由该电感性元件所产生的涡流电流和寄生效应。

Description

图案化接地以及形成图案化接地的方法
公开领域
本公开一般涉及半导体封装接地，且尤其但不排他地涉及用于半导体封装的图案化接地。
背景
在常规的方形扁平无引线(QFN)封装中，凸块或铜柱将包含电感性元件的芯片与包含金属封装接地的封装体分隔开。这些柱或凸块是短的，并且导致芯片与金属封装接地之间的微小分隔。电感性元件生成磁场，该磁场感生或导致金属封装接地中的涡流电流。所感生的涡流电流的幅值部分地取决于将磁场源(电感性元件)与金属封装接地分隔开的距离。所感生的涡流电流是有问题的，因为它们具有寄生效应并且使电感性元件的性能降级。通过在封装中在电感性元件之下以及在电感性元件与金属封装接地之间增大空洞，电感性元件的性能能够由于电感性元件与金属封装接地的增大的分隔被改善。然而，这一设计使封装的热耗散能力降级。相应地，存在对于通过减小所感生的涡流电流同时提供改进的热耗散来对常规方法进行改进的集成电路封装结构和方法的需要。
作为这些教导的特性的发明性特征、连同进一步的特征和优点从详细说明和附图中被更好地理解。
概述
以下给出了与本文所公开的装置和方法相关联的一个或多个方面和/或示例相关的简化概述。如此，以下概述既不应被视为与所有构想的方面和/或示例相关的详尽纵览，以下概述也不应被认为标识与所有构想的方面和/或示例相关的关键性或决定性要素或描绘与任何特定方面和/或示例相关联的范围。相应地，以下概述仅具有在以下给出的详细描述之前以简化形式呈现与关于本文所公开的装置和方法的一个或多个方面和/或示例相关的某些概念的目的。
本公开的一些示例涉及用于电感器或电感性元件之下的图案化接地设计的系统、装置和方法，该电感器或电感性元件例如半导体封装的变压器中的耦合电感器。该图案化接地消除或显著减少与电感器或变压器相关联的涡流电流，并且还对由半导体封装中的各个组件所生成的热提供更好的热耗散。
在本公开的一些示例中，该系统、装置和方法包括：金属层，位于该金属层之上的电感性元件，毗邻该电感性元件的第一接地平面，该第一接地平面具有与由该电感性元件所生成的磁场大致垂直的导线；以及第二接地平面。
基于附图和详细描述，与本文公开的装置和方法相关联的其它特征和优点对本领域的技术人员而言将是明了的。
附图简要说明
给出了附图以描述本教导的示例，并且附图并不作为限定。给出附图以助益本公开的示例的描述，并且提供这些附图仅仅是为了解说示例而非对其进行限制。
图1描绘了QFN封装的横截面视图。
图2描绘面栅阵列(LGA)封装的框图。
图3描绘一示例性图案化接地的俯视图。
图4描绘一示例性图案化接地的俯视图。
图5描绘一示例性图案化接地的俯视图。
图6描绘一示例性图案化接地的俯视图。
图7描绘一示例性图案化接地的俯视图。
图8描绘一示例性图案化接地的俯视图。
图9A-E描绘用于形成一示例性图案化接地的过程流程。
根据惯例，附图中所描绘的特征可能并非按比例绘制。相应地，出于清晰起见，所描绘的特征的尺寸可能被任意放大或缩小。根据惯例，为了清楚起见，某些附图被简化。因此，附图可能未绘制特定装备或方法的所有组件。此外，类似附图标记贯穿说明书和附图标示类似特征。
详细描述
本文所公开的各示例性方法、装置和系统有利地提供一种集成电路封装，该集成电路封装具有电感性元件(诸如在变压器内)，以及被图案化到一形状中的接地平面，该接地平面具有与由该电感性元件所生成的磁场大致垂直的导线。该图案化接地的导线的形状和垂直取向抑制了由该电感性元件(例如该封装中的变压器中的耦合电感器)所生成的磁场所创生的涡流电流，并且还提供了耗散由该集成电路封装的各组件所生成的热的热通路。该图案化接地平面的垂直取向提供了抑制涡流电流的抵消效应，同时该图案化接地平面的尺寸和宽度比率可以被确定大小以优化这一效应。该图案化接地结构可包括中央导线或替换地中央间隙。中央间隙可为图案化接地结构提供附加热阻，而中央导线可以提供附加热通路并且增大抵消效应。
由于图案化接地平面中感生的涡流电流的幅值部分地由图案化接地平面与电感性元件(磁场源)(诸如在变压器中)之间的距离决定，因此图案化接地平面可以与电感性元件间隔开以增加这两个元件之间的距离。通过增大将这两个元件分隔开的距离，所感生的涡流电流可以被减小或消除。可以通过这两个元件之间的空气间隙或在这两个元件之间包括电介质材料来实现该分隔。
该集成电路封装还可包括在一个表面上具有第一接地平面以及在对向表面上具有第二接地平面的主体层。第二接地平面的添加增多了用于耗散由该集成电路封装所生成的热的热路径。通过添加第二接地平面，可以在主体层中提供热通路。主体层中的热通路可以是将第一接地平面与第二接地平面热耦合的通孔。这些通孔可以是中空的，从而仅提供热通路，或者这些通孔可以填充有导电材料，该导电材料将第一接地平面和第二接地平面进行电耦合和热耦合。
在以下描述和相关附图中公开了各种方面以示出与本公开相关的具体示例。替换示例在相关领域的技术人员阅读本公开之后将是显而易见的，且可被构造并实施，而不背离本文公开的范围或精神。另外，众所周知的元素将不被详细描述或可被省去以免模糊本文所公开的各方面和示例的相关细节。
措辞“示例性”在本文中用于表示“用作示例、实例或解说”。本文中描述为“示例性”的任何示例不必被解释为优于或胜过其他示例。同样，术语“示例”并不要求所有示例都包括所讨论的特征、优点、或工作模式。术语“在一个示例中”、“示例”、“在一个特征中”和/或“特征”在本说明书中的使用并非必然引述相同特征和/或示例。此外，特定特征和/或结构可与一个或多个其他特征和/或结构组合。并且，由此描述的装备的至少一部分可被配置成执行由此描述的方法的至少一部分。
本文所使用的术语是仅出于描述特定示例的目的，而不意在限制本公开的诸示例。如本文所使用的，单数形式的“一”、“某”和“该”旨在也包括复数形式，除非上下文另有明确指示。还将理解，术语“包括”、“具有”、“包含”和/或“含有”在本文中使用时指明所陈述的特征、整数、步骤、操作、元素、和/或组件的存在，但并不排除一个或多个其他特征、整数、步骤、操作、元素、组件和/或其群组的存在或添加。
应该注意，术语“连接”、“耦合”或其任何变体意指在元件之间的直接或间接的任何连接或耦合，且可涵盖两个元件之间中间元件的存在，这两个元件经由该中间元件被“连接”或“耦合”在一起。元件之间的耦合和/或连接可为物理的、逻辑的、或其组合。如本文所采用的，元件可例如通过使用一条或多条导线、电缆、和/或印刷电气连接以及通过使用电磁能量被“连接”或“耦合”在一起。电磁能量可具有在射频区域、微波区域和/或光学(可见和不可见两者)区域中的波长。这些是若干非限定和非穷尽性示例。
本文中使用诸如“第一”、“第二”等之类的指定对元素的任何引述并不限定那些元素的数量和/或次序。确切而言，这些指定被用作区别两个或更多个元素和/或者元素实例的便捷方法。因此，对第一元素和第二元素的引述并不意味着仅能采用两个元素，或者第一元素必须必然地位于第二元素之前。同样，除非另外声明，否则元素集合可包括一个或多个元素。另外，在说明书或权利要求中使用的“A、B、或C中的至少一者”形式的术语可被解读为“A或B或C或这些元素的任何组合”。
本文所公开的图案化接地结构可以在数种不同的半导体封装中使用，诸如晶片级封装、倒装芯片封装、LGA封装、以及QFN封装，仅举若干示例。例如，本文所公开的图案化接地可以在图1中示出的QFN封装类型中使用。
现在参考图1，QFN封装100包括具有接地的硅集成电路110、管芯附连120、暴露热焊盘130、引线框架140、线缆接合150、以及包封该封装的塑料封装160。引线框架140可以由铜合金制成，并且导热粘合剂120可以被用于将硅IC 110附连到热焊盘130。硅管芯110可以通过例如1-2密耳直径或20-50微米直径的金线缆150被电连接到引线框架140。
图2描绘LGA封装。在图2中，半导体封装200可包括管芯210、用于传递管芯210中嵌入的能量的变压器或装置220、概念性地表示管芯210中当功率被施加到它们时生成热的各种组件和/或集成电路的热源230、焊球240、封装基板250、第一接地结构260、第二接地结构270以及热通孔280。热通孔280可以提供从第一接地结构260到第二接地结构270的热传递路径。用于由热源230(诸如管芯210的活跃区域)所生成的热的热耗散可以通过第一接地结构260、热通孔280、和第二接地结构270以及附加的封装上组件和封装外组件(未示出)的组合来提供。热源230被示出为管芯210内的分立元件，但应当理解，热源230表示管芯210中生成热的任何区域、组件或元件。例如，当管芯210的一区域活跃或正在操作中(汲取电流)时，该区域将产生应当被耗散的热。为了辅助这些组件的热传递和耗散能力，第一接地结构260、热通孔280、以及第二接地结构270可以由导热材料组成，诸如金属和金属合金。由于管芯210与第一接地结构260之间的短距离，可能在第一接地结构260中产生涡流电流和寄生电容。通过使用本文所描述的接地结构，那些效应可以被消除或最小化。
根据本公开的一些示例，图3描绘具有中央导线或隆脊的图案化接地结构。如图3所示，半导体封装300可包括概念性地表示在操作期间由封装300的一个或多个组件(诸如管芯的活跃区域(未示出))所生成的热的热源310、用于传递半导体封装的能量的变压器或装置320、以及用于使电流接地的第一接地结构或装置330。热源310和变压器320可以位于管芯中并且在z方向上被置于接地结构330之上。如图所示，热源310与接地结构330在y方向上偏移，而变压器320直接位于接地结构330之上，但应当理解，变压器元件320和热源310两者可以被置于接地结构330之上、向接地结构330的一侧偏移或者向接地结构330的对向侧偏移。变压器元件320可包括将能量从封装300中的一个组件传递到另一组件的一个或多个电感器或电感性元件(诸如耦合电感器)。
接地结构330可包括用于提供支撑的主体或装置331、在y方向上延伸的多个导线或隆脊332、在x方向上延伸的多个导线或隆脊333、以及中央导线或隆脊334。多个导线或隆脊332-334可以由间隙335分隔开，并且被取向成与位于相应导线或隆脊332-333之上的变压器320的绕组中的电流流动相垂直。导线或隆脊332-334与间隙335的垂直取向可以被配置并且确定大小以增大接地结构330对由变压器320产生的涡流电流和寄生电容的衰减效应(dampening effect)，同时仍然为热源310所产生的热提供热耗散。导线或隆脊332-334与间隙335的数目、大小和配置可以基于变压器320线圈的电流量和/或大小。
尽管未示出，但还可包括用于使电流接地的第二接地结构或装置。第二接地结构可以与第一接地结构类似地被图案化，或者可以是提供用于热耗散和热储存的附加区域的实心体。第二接地结构可以在基板的与第一接地结构对向的一侧上。第一接地平面和第二接地平面的面积可以大于或小于变压器或电感性元件的面积。
根据本公开的一些示例，图4描绘具有中央间隙的图案化接地结构。如图4所示，半导体封装400可包括概念性地表示封装400中可生成热的各个组件(诸如管芯的活跃区域(未示出))的热源410、用于传递半导体封装的能量的变压器或装置420、以及用于使电流接地的第一接地结构或装置430。热源410和变压器420可以位于管芯中并且在z方向上被置于接地结构430之上。如图所示，在一个示例中，热源410与接地结构430在y方向上偏移，而变压器420直接位于接地结构430之上，但应当理解，变压器420和热源410两者可以被置于接地结构430之上、向接地结构430的一侧偏移或者向接地结构430的对向侧偏移。变压器420可包括传递能量的一个或多个电感器、耦合电感器或电感性元件。
接地结构430可包括用于提供支撑的主体或装置431、在y方向上延伸的多个导线或隆脊432、在x方向上延伸的多个导线或隆脊433、以及中央间隙434。多个导线或隆脊432和433可以由间隙435分隔开，并且被取向成与位于相应导线或隆脊432和433之上的变压器420的绕组中的电流流动相垂直。导线或隆脊432-433与间隙434-435的垂直取向被配置并且可以被确定大小以增大接地结构430对由变压器或装置420所产生的涡流电流和寄生电容的衰减效应，同时仍然为热源410所产生的热提供热耗散。导线或隆脊432-433与间隙434-435的数目、大小和配置可以基于变压器420线圈的电流量和/或大小。
根据本公开的一些示例，图5描绘具有可变宽度的导线或隆脊以及在导线或隆脊之间并且将导线或隆脊分隔开的可变宽度间隙的图案化接地结构。如图5所示，半导体封装500可包括被解说为热源510的在操作期间生成热的各个组件(诸如管芯的活跃区域(未示出))、用于传递半导体封装的能量的变压器或装置520、以及用于使电流接地的第一接地结构或装置530。热源510和变压器520可以位于管芯中并且在z方向上被置于接地结构530之上。如图所示，热源510与接地结构530在y方向上偏移，而变压器520直接位于接地结构530之上，但应当理解，变压器520和热源510两者可以被置于接地结构530之上、向接地结构530的一侧偏移或者向接地结构530的对向侧偏移。变压器520包括一个或多个电感器或电感性元件。
接地结构530可包括用于提供支撑的主体或装置531、在y方向上延伸的多个导线或隆脊532、在x方向上延伸的多个导线或隆脊533、以及中央导线或隆脊534。该多个导线或隆脊532-534可以由间隙535分隔开，并且被取向成与位于相应导线或隆脊532-533之上的变压器520的绕组中的电流流动相垂直。导线或隆脊532-534与间隙535的垂直取向可以被配置并且确定大小以增大接地结构530对由变压器520所产生的涡流电流和寄生电容的衰减效应，同时仍然为热源510所产生的热提供热耗散。导线或隆脊532-534与间隙535的数目、大小和配置可以基于变压器520线圈的电流量和/或大小。
尽管导线或隆脊532-534的形状和大小被示为大致统一，但形状和大小可以在个体的基础上改变，以使得例如导线或隆脊532的大小和形状不同于导线或隆脊533和534的大小和形状、每一导线或隆脊集合532-534可以不同于每一其他集合、并且每一个体隆脊532-534可以不同于每一其他个体隆脊以及以上的组合(例如参见图6)。由接地结构530的各组件所占据的金属区域可以关于中央导线或隆脊534被平衡，以使得该金属区域跨接地结构530被均等地分布。这提供了衰减效应和热耗散特性的均匀分布，并且避免了局部“热点”。附加地，接地结构530的金属区域可以与可任选的第二接地结构的金属区域相平衡。这同样会改进热耗散特性，并且通过维持金属密度的平衡分布来避免局部“热点”。
间隙535在x方向上的宽度(W)536以及导线或隆脊532在x方向上的宽度(S)537可以是各种尺寸的，并且可以是统一的或非统一的。例如，宽度536和537可以是：
W(536)＝10um；S(537)＝5um
W(536)＝10um；S(537)s＝10um
W(536)＝10um；S(537)＝20um
W(536)＝20um；S(537)＝5um
W(536)＝20um；S(537)＝10um
W(536)＝20um；S(537)＝20um
通过改变间隙535以及导线或隆脊532的宽度，可以改变所得到的衰减和耗散效应。例如，下表解说了由于上述各种宽度引起的对电感性元件性能的影响，其中‘pri’意指主线圈；‘sec’意指副线圈；而‘kd’意指5.5GHz处的耦合系数。
根据本公开的一些示例，图6描绘一图案化接地结构，该图案化接地结构在x方向上的导线或隆脊的形状和大小与y方向上的导线或隆脊不同。如图6所示，半导体封装600可包括在操作期间生成热且可被视为热源的各个组件(诸如管芯的活跃区域(未示出))、用于传递半导体封装的能量的变压器或装置620、以及用于使电流接地的第一接地结构或装置630。热源和变压器620可以位于管芯中并且在z方向上被置于接地结构630之上。如图所示，变压器620被直接置于接地结构630之上，但应当理解，变压器530可以被置于接地结构630之上或者向一侧偏移。变压器620可包括一个或多个电感器、耦合电感器或电感性元件。
接地结构630可包括用于提供支撑的主体或装置631、在y方向上延伸的多个导线或隆脊632、在x方向上延伸的多个导线或隆脊633、以及中央间隙634。多个导线或隆脊632和633可以由间隙635分隔开，并且被取向成与位于相应导线或隆脊632和633之上的变压器620的绕组中的电流流动相垂直。导线或隆脊632-633与间隙634-635的垂直取向被配置并且可以被确定大小以增大接地结构630对由变压器620所产生的涡流电流和寄生电容的衰减效应，同时仍然为热源610所产生的热提供热耗散。导线或隆脊632-633与间隙634-635的数目、大小和配置可以基于变压器620线圈的电流量和/或大小并且无需是统一的或基本相似的。
根据本公开的一些示例，图7描绘用于螺旋电感器的图案化接地结构，该螺旋电感器可以在半导体封装中提供的变压器中使用。如图7中所示，用于传递能量的变压器或装置700可包括螺旋状电感器，并且被置于接地结构或装置710之上以用于使电流接地。接地结构710可包括中央中枢711、从中枢711辐射的多个轮辐712、以及轮辐712之间的多个间隙713。轮辐712和间隙713可以被取向成与位于轮辐712和间隙713之上的电感器700的一部分中的电流流动相垂直。轮辐712和间隙713的垂直取向被配置并且可以被确定大小以增大接地结构710对由变压器700的螺旋电感器所产生的涡流电流和寄生电容的衰减效应，同时仍然为可由变压器700的电感器和/或容纳变压器700的电感器和接地结构710的半导体封装所产生的热提供热耗散。轮辐712和间隙713的数目、大小和配置可以基于变压器700的电感器线圈的电流量和/或大小并且无需是统一的或基本相似的。
根据本公开的一些示例，图8描绘用于使用方形电感器的变压器的图案化接地结构。如图8中所示，用于传递能量的方形变压器或装置800被置于用于使电流接地的接地结构或装置810之上。接地结构810可包括中央中枢811、从中枢811辐射的多个主轮辐812、从主轮辐812往外分支的多个副轮辐814、以及副轮辐814之间的多个间隙813。副轮辐814和间隙813可以被取向成与位于轮辐814和间隙813之上的电感器800的一部分中的电流流动相垂直。轮辐814和间隙813的垂直取向被配置并且可以被确定大小以增大接地结构810对由变压器800中的方形电感器所产生的涡流电流和寄生电容的衰减效应，同时仍然为可由变压器800中的电感器和/或容纳变压器800中的方形电感器和接地结构810的半导体封装所产生的热提供热耗散。轮辐812和814以及间隙813的数目、大小和配置可以基于变压器800线圈中的电感器的电流量和/或大小并且无需是统一的或基本相似的。
根据本公开的一些示例，图9A-E描绘用于形成图案化接地的部分过程流程。如图9A中所示，该部分过程流程描绘开始于接地主体已经具有施加于接地主体的顶部和底部的图案化蚀刻掩模或层。如图9A中所示，接地主体900在主体900顶部上具有第一蚀刻掩模910以及在主体900底部上具有第二蚀刻掩模920。主体900可以由可蚀刻材料组成，该可蚀刻材料为电流提供接地路径以及热耗散。主体900可以由传导电流并且存储或传导热的金属或金属合金组成。第一蚀刻掩模910被示出为已经被图案化，但应当理解，图案化可以由任何合适的手段来创建。第一蚀刻掩模910中的图案可包括暴露区域911和912。暴露区域911可以被定位成与接地结构的间隙的期望位置相对应。暴露区域912和922可以被定位成与接地结构的热通孔的期望位置相对应。区域911、912和922的数目和大小可以根据期望的间隙、隆脊和通孔图案而改变，并且无需是统一的。
在图9B中，在示例性过程的下一阶段中，蚀刻材料可以被施加于第一蚀刻掩模910以在暴露区域911和912中部分地蚀刻主体900。蚀刻的深度可以根据期望特性而改变，并且暴露区域911的深度可以与暴露区域912的深度不同，并且深度无需对于所有暴露区域911都是统一的。应当理解，其他移除工艺可以被使用以代替蚀刻，诸如机械或激光手段。
在图9C中，在示例性过程的下一阶段中，蚀刻掩模910可以从主体900移除，并且半导体管芯930和焊球940可以在主体900的顶部被附连到主体900。应当理解，该过程的这一部分可以在该过程中稍后进行，诸如在图9D中示出的蚀刻之后进行。
在图9D中，在示例性过程的下一阶段中，蚀刻材料的第二应用可以被施加于第二蚀刻掩模920以在暴露区域922中部分地蚀刻主体900。蚀刻深度可以改变并且可以被控制以完全蚀刻从暴露区域922到暴露区域912的路径。由此创建的路径为来自主体900之上或之下的热(诸如来自管芯930的热)提供路径。尽管未示出，但该过程可以通过从主体900移除蚀刻掩模920来继续，并且可包括附连第二接地结构。该过程还可包括完全或部分地用导热材料来填充这些路径中的一者或两者。
在图9E中，在示例性过程的下一阶段中，封装材料950可以被添加以包封管芯930和图案化主体900。尽管各路径和间隙被示出为被填充，但各路径和间隙可以保持开放，或者用除了该封装材料之外的材料来填充。
应理解，尽管以上描述提及了空气间隙和中空热通孔，但替代材料可被用于代替空气。替代材料可包括统一地或选择性地用于空气间隙的电介质材料以及用于热通孔的导热材料。
本文所描述的方法、装置和系统的示例可在数个应用中使用。例如，所描述的示例可以在倒装芯片封装、扁平无引线封装、LGA封装和晶片级封装中使用。进一步的应用对于本领域普通技术人员应该是显而易见的。
本申请中已描述或解说描绘的任何内容都不旨在指定任何组件、步骤、特征、益处、优点、或等同物奉献给公众，无论这些组件、步骤、特征、益处、优点或等同物是否记载在权利要求中。
尽管已经结合器件描述了一些方面，但毋庸置疑，这些方面也构成了相应方法的描述，并且因此设备的框或组件还应被理解为相应的方法步骤或方法步骤的特征。与之类似地，结合或作为方法步骤描述的方面也构成相应器件的相应块或细节或特征的描述。方法步骤中的一些或全部可由硬件装置(或使用硬件装置)来执行，诸如举例而言，微处理器、可编程计算机或电子电路。在一些示例中，最重要的方法步骤中的一些或多个可由此种装置来执行。
以上描述的示例仅构成本公开的原理的解说。毋庸置疑，本文所描述的布局和细节的修改和变动将对于本领域其他技术人员将变得明了。因此，本公开旨在仅由所附专利权利要求的保护范围来限定，而非由在本文的示例的描述和解释的基础上所提出的具体细节来限定。
在以上详细描述中，可以看到不同特征在示例中被编组在一起。这种公开方式并不应被理解为所要求保护的示例需要比相应权利要求中所明确提及的特征更多的特征的意图。确切而言，该情形是使得发明性的内容可驻留在少于所公开的个体示例的所有特征的特征中。因此，以下权利要求由此应该被认为是被纳入到该描述中，其中每项权利要求自身可为单独的示例。尽管每项权利要求自身可为单独示例，但应注意，尽管权利要求书中的从属权利要求可引用具有一个或多个权利要求的具体组合，但其他示例也可涵盖或包括所述从属权利要求与具有任何其他从属权利要求的主题内容的组合或任何特征与其他从属和独立权利要求的组合。此类组合在本文提出，除非显示表达了并不以某一具体组合为目标。并且，还旨在使权利要求的特征可被包括在任何其他独立权利要求中，即使所述权利要求不直接从属于该独立权利要求。
此外，在一些示例中，个体步骤/动作可被细分为多个子步骤或包含多个子步骤。此类子步骤可被包含在个体步骤的公开中并且可以是个体步骤的公开的一部分。
尽管前面的公开示出了本公开的解说性示例，但是应当注意在其中可作出各种变更和修改而不会脱离如所附权利要求定义的本公开的范围。根据本文中所描述的本公开的各示例的方法权利要求中的功能、步骤和/或动作无需以任何特定次序执行。此外，尽管本公开的要素可能是以单数来描述或主张权利的，但是复数也是已料想了的，除非显式地声明了限定于单数。

Claims (27)

1.一种集成电路封装，包括：
第一主体层；
位于所述第一主体层之上的电感性元件；
在所述第一主体层与所述电感性元件之间的在所述第一主体层顶部上的第一接地平面，所述第一接地平面具有与由所述电感性元件所生成的磁场大致垂直的导线；以及
所述第一主体层的底部上与所述第一接地平面对向的第二接地平面。
2.如权利要求1所述的集成电路封装，其特征在于，所述第一主体层是电介质基板并且所述电感性元件在集成电路中。
3.如权利要求1所述的集成电路封装，其特征在于，所述第一接地平面与所述第二接地平面电隔离。
4.如权利要求1所述的集成电路封装，其特征在于，进一步包括以下之一：通孔、焊凸块、铜柱、或者在所述第一接地平面与所述第二接地平面之间延伸通过所述第一主体层的导电路径。
5.如权利要求1所述的集成电路封装，其特征在于，所述第一接地平面具有比所述电感性元件的面积更大的面积。
6.如权利要求1所述的集成电路封装，其特征在于，所述第一接地平面具有比所述电感性元件的面积更小的面积。
7.如权利要求1所述的集成电路封装，其特征在于，所述第一接地平面包括实心中心部分。
8.如权利要求1所述的集成电路封装，其特征在于，所述第二接地平面是实心体。
9.如权利要求1所述的集成电路封装，其特征在于，所述电感性元件是耦合电感器或变压器。
10.如权利要求1所述的集成电路封装，其特征在于，所述集成电路封装是方形扁平无引线封装，并且所述第一接地平面被电耦合至所述第二接地平面。
11.如权利要求1所述的集成电路封装，其特征在于，所述集成电路封装是面栅阵列封装或晶片级封装。
12.如权利要求1所述的集成电路封装，其特征在于，所述第一接地平面在所述第一主体层之上并且与所述第一主体层分隔开。
13.如权利要求1所述的集成电路封装，其特征在于，所述第二接地平面在所述第一主体层之下并且与所述第一主体层分隔开。
14.如权利要求1所述的集成电路封装，其特征在于，进一步包括：
与所述第一主体层接触的电介质层；其中所述电感性元件包括电感性迹线；以及
其中所述第一接地平面导线被布置在显著抑制由所述电感性元件中的电流在所述第一接地平面中的电流感生的几何形状图案中。
15.如权利要求14所述的集成电路封装，其特征在于，所述电感性元件的电感性迹线以螺旋形式被布置。
16.如权利要求14所述的集成电路封装，其特征在于，所述第一接地平面导线包括被取向成与所述电感性元件的电感性迹线相垂直的导线段。
17.如权利要求14所述的集成电路封装，其特征在于，所述第一接地平面具有经平衡的金属区域。
18.如权利要求17所述的集成电路封装，其特征在于，所述第一接地平面包括非传导线和导线。
19.如权利要求18所述的集成电路封装，其特征在于，所述第一接地平面的所述非传导线和所述导线具有统一宽度。
20.如权利要求19所述的集成电路封装，其特征在于，所述第一接地平面导线的宽度约为所述非传导线宽度的一半。
21.如权利要求19所述的集成电路封装，其特征在于，所述第一接地平面导线的宽度约等于所述非传导线的宽度。
22.如权利要求19所述的集成电路封装，其特征在于，所述第一接地平面导线的宽度约为所述非传导线宽度的两倍。
23.如权利要求19所述的集成电路封装，其特征在于，所述第一接地平面导线的宽度约为所述非传导线宽度的四倍。
24.一种集成电路封装，包括：
用于提供支撑的第一主体装置；
用于传递集成电路的能量的第三装置，所述第三装置位于所述第一主体装置之上；
用于使电流接地的第一接地装置，所述第一接地装置位于所述第一主体装置与所述第三装置之间的所述第一主体装置的顶部上，所述第一接地装置具有与由所述第三装置所生成的磁场大致垂直的导线；以及
用于使电流接地的第二接地装置，所述第二接地装置位于所述第一主体装置的与所述第一接地装置对向的底部上。
25.一种用于具有电感性元件的集成电路封装的接地结构，所述接地结构包括：
位于电感性元件之下的第一主体层；
在所述第一主体层与所述电感性元件之间的在所述第一主体层顶部上的第一接地平面，所述第一接地平面具有与由所述电感性元件所生成的磁场大致垂直的导线；以及
所述第一主体层的底部上与所述第一接地平面对向的第二接地平面。
26.一种制造集成电路封装的方法，包括：
形成第一主体层；
提供位于所述第一主体层之上的电感性元件；
在所述第一主体层与所述电感性元件之间的在所述第一主体层顶部上形成第一接地平面，所述第一接地平面具有与由所述电感性元件所生成的磁场大致垂直的导线；以及
在所述第一主体层的与所述第一接地平面对向的底部上形成第二接地平面。
27.如权利要求26所述的方法，其特征在于，进一步包括在所述第一主体层中形成通孔，所述通孔通过所述第一主体层从所述第一接地平面延伸到所述第二接地平面。
CN201580046601.9A 2014-09-02 2015-09-01 图案化接地以及形成图案化接地的方法 Pending CN106663669A (zh)

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