CN106558536A - 半导体装置的制造方法 - Google Patents
半导体装置的制造方法 Download PDFInfo
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- CN106558536A CN106558536A CN201510859666.7A CN201510859666A CN106558536A CN 106558536 A CN106558536 A CN 106558536A CN 201510859666 A CN201510859666 A CN 201510859666A CN 106558536 A CN106558536 A CN 106558536A
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- arsyl
- nano wire
- phosphorio
- layer
- semiconductor device
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- 238000000034 method Methods 0.000 title claims abstract description 90
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 42
- 239000004065 semiconductor Substances 0.000 title claims abstract description 42
- 239000002070 nanowire Substances 0.000 claims abstract description 141
- -1 phosphorio Chemical class 0.000 claims abstract description 84
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 25
- 239000010410 layer Substances 0.000 claims description 116
- 239000007789 gas Substances 0.000 claims description 32
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 claims description 20
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 17
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims description 17
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims description 17
- 239000002356 single layer Substances 0.000 claims description 15
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 9
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 7
- 229910052785 arsenic Inorganic materials 0.000 claims description 5
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 5
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims description 2
- 125000000999 tert-butyl group Chemical group [H]C([H])([H])C(*)(C([H])([H])[H])C([H])([H])[H] 0.000 claims description 2
- 229910005540 GaP Inorganic materials 0.000 claims 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 claims 1
- 239000002243 precursor Substances 0.000 description 34
- 238000005229 chemical vapour deposition Methods 0.000 description 17
- 239000000463 material Substances 0.000 description 16
- 229910000673 Indium arsenide Inorganic materials 0.000 description 13
- 238000005530 etching Methods 0.000 description 10
- 239000000126 substance Substances 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 7
- 229910052738 indium Inorganic materials 0.000 description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 6
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 241000209094 Oryza Species 0.000 description 4
- 235000007164 Oryza sativa Nutrition 0.000 description 4
- 125000004429 atom Chemical group 0.000 description 4
- 239000000470 constituent Substances 0.000 description 4
- 230000018109 developmental process Effects 0.000 description 4
- 230000005669 field effect Effects 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 4
- 125000004437 phosphorous atom Chemical group 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 235000009566 rice Nutrition 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000000609 electron-beam lithography Methods 0.000 description 3
- 235000012149 noodles Nutrition 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000005660 chlorination reaction Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000001127 nanoimprint lithography Methods 0.000 description 2
- 239000005416 organic matter Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 2
- 238000002207 thermal evaporation Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- KZNMRPQBBZBTSW-UHFFFAOYSA-N [Au]=O Chemical compound [Au]=O KZNMRPQBBZBTSW-UHFFFAOYSA-N 0.000 description 1
- CTNCAPKYOBYQCX-UHFFFAOYSA-N [P].[As] Chemical compound [P].[As] CTNCAPKYOBYQCX-UHFFFAOYSA-N 0.000 description 1
- 229910000070 arsenic hydride Inorganic materials 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- ZGNPLWZYVAFUNZ-UHFFFAOYSA-N tert-butylphosphane Chemical compound CC(C)(C)P ZGNPLWZYVAFUNZ-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66522—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with an active layer made of a group 13/15 material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02513—Microstructure
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02543—Phosphides
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02603—Nanowires
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
- H01L21/30621—Vapour phase etching
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
- H01L29/0669—Nanowires or nanotubes
- H01L29/0676—Nanowires or nanotubes oriented perpendicular or at an angle to a substrate
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
- H01L29/42392—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor fully surrounding the channel, e.g. gate-all-around
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66469—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with one- or zero-dimensional channel, e.g. quantum wire field-effect transistors, in-plane gate transistors [IPG], single electron transistors [SET], Coulomb blockade transistors, striped channel transistors
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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Abstract
本公开提供一种半导体装置的制造方法,包括:形成罩幕层于基板上;形成开口于罩幕层中;自基板成长砷基纳米线,砷基纳米线延伸穿过开口;移除罩幕层;形成磷基层于砷基纳米线上;及移除磷基层。本公开方法制造的半导体装置具有超细直径的纳米线,则整体上可具有较佳的性能。
Description
技术领域
本公开涉及半导体技术,且特别涉及半导体装置的制造方法。
背景技术
半导体集成电路工业在过去数十年间经历了快速的成长。半导体材料与设计技术的进步使得电路越来越小也越来越复杂。由于相关工艺技术的进步,使得上述材料与设计方面的进步得以实现。在半导体发展的历程中,功能密度(例如单一芯片面积上互连的装置的数量)增加,而几何尺寸(例如可使用工艺步骤制造的最小元件或线)变小。此微小化的过程通过增加生产效率以及降低相关成本而带了利益。此微小化过程亦增加了制造集成电路的复杂度。为了实现上述进一步微小化的发展,于集成电路工艺中需要相似的发展。除了工艺与材料的进步外,要更进一步缩小几何尺寸时,传统的平面金氧半场效晶体管遇到了挑战。因此,许多非平面装置或包括非平面元件的装置受到了注目。例如,鳍式场效晶体管装置、垂直场效晶体管等等。
虽然目前的非平面半导体(例如垂直场效晶体管)的工艺步骤大致上接符合需桥,然而其并非各方面皆令人满意。
发明内容
本公开提供一种半导体装置的制造方法,包括:形成罩幕层于基板上;形成开口于罩幕层中;自基板成长砷基纳米线,砷基纳米线延伸穿过开口;移除罩幕层;形成磷基层于砷基纳米线上;及移除磷基层。
本公开更提供一种半导体装置的制造方法,包括:形成罩幕层于基板上;形成开口于罩幕层中;通过施加砷基气体,以自基板成长第一砷基纳米线,第一砷基纳米线延伸穿过开口,其中第一砷基纳米线具有第一直径;移除罩幕层;通过施加磷基气体,以形成磷基单层于第一砷基纳米线上;及通过施加氯化氢以移除磷基单层,并藉此形成第二砷基纳米线,其中第二砷基纳米线具有第二直径,且第二直径与第一直径不同。
本公开又提供一种半导体装置的制造方法,包括:于腔体(chamber)中形成罩幕层于基板上;形成开口于罩幕层中;通过将砷基气体流入腔体中以成长砷基纳米线,砷基纳米线穿过开口;移除罩幕层;通过将磷基气体流入腔体中以形成磷基层于砷基纳米线上;及通过将氯化氢气体流入腔体中以移除磷基层。
本公开方法制造的半导体装置具有超细直径的纳米线,则整体上可具有较佳的性能。
为让本公开的特征、和优点能更明显易懂,下文特举出较佳实施例,并配合说明书附图,作详细说明如下。
附图说明
图1是本公开一些实施例的具有纳米线的装置的制造方法的流程图。
图2A是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2B是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2C是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2D是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2E是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2F是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2G是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2H是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图2I是显示根据本公开一些实施例所述的具有纳米线的装置根据图1的制造方法的其中一步骤的半导体装置的剖面图。
图3是显示根据本公开一些实施例由图1的方法所制造的纳米线的阵列。
图4A是显示根据图1的方法以形成砷基纳米线、磷基层并移除磷基层的顺序。
图4B是显示根据图1的方法以形成砷基纳米线、磷基层并移除磷基层的顺序。
图4C是显示根据图1的方法以形成砷基纳米线、磷基层并移除磷基层的顺序。
其中,附图标记说明如下:
100 方法;
102 步骤;
104 步骤;
106 步骤;
108 步骤;
110 步骤;
112 步骤;
200 装置;
202 基板;
204 罩幕层;
206 开口;
208 纳米线;
208’ 纳米线;
208” 纳米线;
209 步骤;
210 磷基层;
210’ 磷基层;
211 步骤;
216 源极区;
218 通道区;
220 漏极区;
222 栅极介电层;
224 栅极接触;
300 装置;
310 纳米线;
402 信号;
402-A 高值;
402-B 低值;
404 信号;
404-A 高值;
404-B 低值;
406 信号;
406-A 高值;
406-B 低值;
D1 直径;
D2 直径;
D3 直径。
具体实施方式
附图中各个元件将于下文中详细说明以使此技术领域中技术人员了解。其中两个或多个附图中的相同元件是以相同标号表示,以清楚说明本公开实施例。
以下针对本公开的半导体装置的制造方法作详细说明。应了解的是,以下的叙述提供许多不同的实施例或例子,用以实施本公开的不同样态。以下所述特定的元件及排列方式仅为简单清楚描述本公开。当然,这些仅用以举例而非本公开的限定。此外,在不同实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本公开,不代表所讨论的不同实施例及/或结构之间具有任何关连性。再者,当述及一第一材料层位于一第二材料层上或之上时,包括第一材料层与第二材料层直接接触的情形。或者,亦可能间隔有一或更多其它材料层的情形,在此情形中,第一材料层与第二材料层之间可能不直接接触。
必需了解的是,附图的元件或装置可以此技术人士所熟知的各种形式存在。此外,当某层在其它层或基板「上」时,有可能是指「直接」在其它层或基板上,或指某层在其它层或基板上,或指其它层或基板之间夹设其它层。
此外,实施例中可能使用相对性的用语,例如「较低」或「底部」及「较高」或「顶部」,以描述附图的一个元件对于另一元件的相对关系。能理解的是,如果将附图的装置翻转使其上下颠倒,则所叙述在「较低」侧的元件将会成为在「较高」侧的元件。
在此,「约」、「大约」、「大抵」的用语通常表示在一给定值或范围的20%之内,较佳是10%之内,且更佳是5%之内,或3%之内,或2%之内,或1%之内,或0.5%之内。在此给定的数量为大约的数量,亦即在没有特定说明「约」、「大约」、「大抵」的情况下,仍可隐含「约」、「大约」、「大抵」的含义。
能理解的是,虽然在此可使用用语「第一」、「第二」、「第三」等来叙述各种元件、组成成分、区域、层、及/或部分,这些元件、组成成分、区域、层、及/或部分不应被这些用语限定,且这些用语仅是用来区别不同的元件、组成成分、区域、层、及/或部分。因此,以下讨论的一第一元件、组成成分、区域、层、及/或部分可在不偏离本公开的教示的情况下被称为一第二元件、组成成分、区域、层、及/或部分。
除非另外定义,在此使用的全部用语(包括技术及科学用语)具有与此篇公开所属的一般技艺者所通常理解的相同涵义。能理解的是这些用语,例如在通常使用的字典中定义的用语,应被解读成具有一与相关技术及本公开的背景或上下文一致的意思,而不应以一理想化或过度正式的方式解读,除非在此特别定义。
本公开实施例可配合附图一并理解,本公开的附图亦被视为公开对其进行说明一部分。需了解的是,本公开的附图并未以实际装置及元件的比例绘示。在附图中可能夸大实施例的形状与厚度以便清楚表现出本公开的特征。此外,附图中的结构及装置是以示意的方式绘示,以便清楚表现出本公开的特征。
在本公开中,相对性的用语例如「下」、「上」、「水平」、「垂直」、「之下」、「之上」、「顶部」、「底部」等等应被理解为该段以及相关附图中所绘示的方位。此相对性的用语仅是为了方便对其进行说明用,其并不代表其所叙述的装置需以特定方位来制造或运作。而关于接合、连接的用语例如「连接」、「互连」等,除非特别定义,否则可指两个结构是直接接触,或者亦可指两个结构并非直接接触,其中有其它结构设于此两个结构之间。且此关于接合、连接的用语亦可包括两个结构都可移动,或者两个结构都固定的情况。
应注意的是,在后文中「基板」一词可包括半导体晶圆上已形成的元件与覆盖在晶圆上的各种膜层,其上方可以已形成任何所需的半导体元件,不过此处为了简化附图,仅以平整的基板表示。此外,「基板表面」是包括半导体晶圆上最上方且暴露的膜层,例如一硅表面、一绝缘层及/或金属线。
图1是本公开一些实施例的具有纳米线的装置200的制造方法100的流程图。方法100是以图1配合图2A-2G说明。图2A-2G是显示根据本公开一些实施例所述的具有纳米线的装置200根据图1的制造方法100的其中一步骤的半导体装置的剖面图。在一些实施例中,根据图1的制造方法100制造的具有纳米线的装置200可为场效晶体管的一元件。例如,此具有纳米线的装置可形成垂直场效晶体管的一通道、一源极及/或一漏极。方法100仅为举例说明用,并非用以限定本公开。额外的步骤可于方法100之前、之中、之后实施。且本公开中所描述的一些步骤可于其它实施例中被取代、省略或对调。
如上所述,方法100公开形成一具有纳米线的装置(nanowire-based device)200,其纳米线具有超细的直径。一般而言,超细的直径是指未大于约10纳米的直径。具有超细直径的纳米线相当重要,因为具有纳米线的装置若具有此超细直径的纳米线,则整体上可具有较佳的性能。例如,更高的开关速度、更低的漏电流、更低的接触电阻等等。此效果于非平面装置中更加显著。
参见图1及2A,方法100始于步骤102,该步骤提供由具有开口206的罩幕层204覆盖的基板202。在一些实施例中,基板202为包括硅基板的半导体基板。或者,基板202可包括锗、硅锗及/或其它半导体材料,例如三五族材料(例如InAs、GaAs、InP、GaN等)。在其它实施例中,基板202可包括由适当的技术形成的用以隔离之内埋介电材料层,此技术可为注氧隔离(separation by implantation of oxygen,SIMOX)。在一些实施例中,基板202可包括绝缘层上覆半导体,例如绝缘层上覆硅。
在一些实施例中,罩幕层204可由介电层形成,例如氮化硅(SiNx)、及/或氧化硅(SiOx)。罩幕层204可由任一沉积步骤形成,例如物理气相沉积、化学气相沉积及/或原子层沉积。在此实施例中,开口206贯穿罩幕层204。开口206可通过任何可形成尺寸(例如直径)及位置控制良好的开口的方法形成。例如,开口206可通过电子束微影蚀刻(electron beam lithography,EBL)、纳米压印微影蚀刻(nanoimprint lithography)、光微影蚀刻、反应离子蚀刻及/或湿式化学蚀刻形成。
在一些实施例中,由俯视图观察开口206,其具有曲线形状(例如圆形),如图2B所示。因此,开口206可具有直径D1。在一些实施例中,直径D1可为约15纳米至约100纳米。尽管在此实施例中,开口206为圆形,开口206可具有任何其它的形状。可通过形成开口206的方法改变其形状。
参见图1及2C,方法100进行至步骤104,该步骤自基板202成长砷基纳米线208,此砷基纳米线208延伸穿过罩幕层204中的开口206。在一些实施例中,砷基纳米线208的材料可与基板202的材料相同或不同。在一些实施例中,砷基纳米线208可由砷基/五族半导体材料形成,例如InAs、GaAs、InGaAs等。而基板的材料为硅。在一些实施例中,形成砷基纳米线208穿过开口206的方法包括选区成长金属有机物化学气相沉积法(selective areagrowth metal organic chemical vapour deposition,SAG-MOCVD)或选区成长金属有机物化学气相磊晶法(selective area growth metal organic vapour phaseepitaxy,SAG-MOVPE)沉积步骤。然而,在其它实施例中,形成砷基纳米线208的方法可包括任何适合的工艺步骤(例如化学气相沉积、有机金属化学气相沉积),且亦在本公开的范围中。在以选区成长金属有机物化学气相沉积法成长砷基纳米线208的实施例中,步骤104包括将砷基前躯物(例如三氢化砷(arsine,AsH3))流入金属有机物化学气相沉积腔体(chamber)中。在一些实施例中,由于砷基纳米线208是形成于罩幕层204中的开口206中,此砷基纳米线208包括曲线形状(例如圆形)的剖面,且此曲线形的砷基纳米线208的直径可大抵与直径D1相同。
参见图1及2D,方法100进行至步骤106,该步骤移除罩幕层204。移除罩幕层204的方法可包括湿蚀刻及/或干蚀刻。在特定的实施例中,接续前述砷基纳米线208是形成于金属有机物化学气相沉积腔体中的实施例,移除罩幕层204的步骤亦可通过化学干蚀刻于相同的金属有机物化学气相沉积腔体中进行,例如,使用四氟化碳/氧(CF4/O2)等离子体蚀刻步骤。
参见图1及2E,方法100进行至步骤108,该步骤形成磷基层210于砷基纳米线208上。如图2E的实施例所示,磷基层210是形成于纳米线208之中。易言之,在形成磷基层210后,纳米线208是由纳米线208’以及覆盖纳米线208’的磷基层210形成。因此,纳米线208’具有直径D2,此直径D2小于纳米线208的直径D1。特定的实施例中,接续前述于金属有机物化学气相沉积腔体中形成砷基纳米线208并移除罩幕层204的实施例,形成磷基层210的步骤108可包括将磷基前躯物(例如图2E中的步骤209)流入相同的金属有机物化学气相沉积腔体(chamber)中。任何适合的磷基前躯物可用于步骤108中,例如叔丁基膦(tertiarybutylphosphine,TBP)或磷化氢(phosphine,PH3)等等。此形成磷基层210于纳米线208’的表面上的过程是基于砷-磷互换机制(As-P exchange mechanism)实现,此机制将于后文详细描述。
在纳米线208是以InAs形成(以方法100中的步骤104形成)的实施例中,当将磷基前躯物(例如图2E中的步骤209)流入金属有机物化学气相沉积腔体(chamber)中时,自磷基前躯物分离出的磷原子与砷化铟(InAs)纳米线208表面上的铟原子作用。如此,砷化铟(InAs)纳米线208表面上的铟原子(以砷化铟的形式存在)与分离出的磷原子反应,并藉此形成磷化铟层(亦即磷基层210)。此磷化铟层210覆盖砷化铟纳米线208’的表面。易言之,只有砷化铟(InAs)纳米线208表面上的铟原子与分离出的磷原子反应并转变为磷化铟的形式,而砷化铟纳米线208的内部(例如纳米线208’)仍维持砷化铟的形式。为了不使此实施例中的砷化铟纳米线208气化(evaporate),当将磷基前躯物(例如图2E中的步骤209)流入金属有机物化学气相沉积腔体(chamber)中时,金属有机物化学气相沉积腔体中的温度是维持于不超过约550℃。在此特定实施例中,形成的磷化铟层210可为一单层,此表示原纳米线208的表面上的单层由砷化铟的形式被转变成磷化铟的形式。
参见图1及2F,方法100进行至步骤110,该步骤自纳米线208’移除磷基层210。如图2F所示,于移除磷基层210后(亦即步骤211),纳米线208’的表面被露出,故露出的纳米线208’具有上述直径D2。以上述特定实施例作说明(砷化铟纳米线208’及磷化铟层210),移除磷基层210的步骤211可包括将氯化氢气体流入金属有机物化学气相沉积腔体中。由于形成的磷基层210是形成于原纳米线208中,纳米线208’的直径D2可不大于原纳米线208的直径D1,亦即D2≤D1。更详细而言,于形成砷化铟纳米线208、单层的磷化铟层210及砷化铟纳米线208’的实施例中,纳米线208’的直径D2可等于原纳米线208的直径D1减去两倍的磷化铟单层层的厚度,亦即D2=D1–2x(磷化铟单层层的厚度)。在一些实施例中,直径D2可为约5纳米至约10纳米(亦即小于约10纳米)。
在一些实施例中,方法100的步骤108与110可反复的进行。详细而言,于进行步骤108与110(第一次循环)之后,方法100可反复的再进行步骤108与110,直到达到所需的直径D2。在每一个循环之后,可得到更薄的纳米线(更小的直径)。
于图2G、2H所示的实施例中,分别绘示第二循环的步骤209及其后的步骤211。步骤209于纳米线208’中形成磷基层210’(对应步骤108),而步骤211移除形成的磷基层210’(对应步骤110)。如图2G所示的实施例中,且参照上述相同的特定实施例,磷化铟层210’是通过砷化铟(InAs)纳米线208’表面上的铟原子与分离出的磷原子反应而得,而砷化铟纳米线208’的内部仍维持纳米线208”。通过将氯化氢气体流入金属有机物化学气相沉积腔体中(对应图2H的步骤211),可移除形成的磷化铟层210’,并使砷化铟纳米线208”露出。此砷化铟纳米线208”可具有直径D3,此直径D3小于直径D2。在一些实施例中,直径D3可为约5纳米至约10纳米(亦即小于约10纳米)。
参见图1及2I,方法100进行至步骤112,此步骤包括后续的其它工艺步骤。在装置200为垂直场效晶体管的实施例中,源极区216、通道区218及漏极区220可形成于纳米线208’/208”。因此,栅极介电层222与栅极接触224可形成并包围通道区218。此工艺步骤可使装置200形成为垂直场效晶体管的一元件。在一些实施例中,步骤112可包括一或多个工艺步骤,以形成上述元件(源极区216、通道区218、漏极区220、栅极介电层222与栅极接触224等)。步骤112可包括,但不限于图案化步骤、掺杂步骤、磊晶成长步骤及/或上述的组合。图2I所示的实施例仅为本公开的其中一实施例。本公开可包括任何图2I并未绘示的装置200的步骤、元件,例如源极/漏极的接点,不同元件之间的层间介电层、内连线层等等。
此外,参见图3,该图绘示具有纳米线的装置(nanowire-based device)300,此具有纳米线的装置300包括形成于基板202上的多个纳米线310。在一些实施例中,此多个纳米线310可形成一纳米线阵列。此具有纳米线的装置300可通过方法100形成。
参见图4A、4B及4C,其绘示形成砷基纳米线(如图1的步骤104所述)、形成磷基层(如图1的步骤108所述)及移除形成的磷基层(如图1的步骤110所述)的顺序的一些实施例。于图4A-4C中,信号402表示于时间轴上将砷基前躯物流入金属有机物化学气相沉积腔体的逻辑波形(logicwaveform)。信号404表示于时间轴上将磷基前躯物流入金属有机物化学气相沉积腔体的逻辑波形。信号406表示于时间轴上将氯化氢气体流入金属有机物化学气相沉积腔体的逻辑波形。详细而言,于时间轴上,每一个逻辑波形具有两个值(高及低)。例如,信号402的逻辑波形包括一高值402-A及一低值402-B,其中高值402-A表示将砷基前躯物流入金属有机物化学气相沉积腔体,而低值402-B表示停止将砷基前躯物流入金属有机物化学气相沉积腔体。相似地,信号404的逻辑波形包括一高值404-A及一低值404-B,其中高值404-A表示将磷基前躯物流入金属有机物化学气相沉积腔体,而低值404-B表示停止将磷基前躯物流入金属有机物化学气相沉积腔体。信号406的逻辑波形包括一高值406-A及一低值406-B,其中高值406-A表示将氯化氢流入金属有机物化学气相沉积腔体,而低值406-B表示停止将氯化氢流入金属有机物化学气相沉积腔体。
如图4A的实施例所示,砷基前躯物的流入可由一开始(t=0)持续至t1。接着,自t1开始,停止流入砷基前躯物,并开始流入磷基前躯物,并由t1持续至t2。接着,自t2开始,仍持续停止砷基前躯物的流入,且停止流入磷基前躯物,并开始流入氯化氢气体,并由t2续至t3。于t3之后,停止流入氯化氢气体,并重新开始流入砷基前躯物。因此,在t=0至t1之间,成长砷基纳米线208(亦即方法100的步骤104)。在t1至t2之间,形成磷基层210(亦即方法100的步骤106)。在t2至t3之间,形成的磷基层210被移除,且留下具有较小直径的纳米线208’/208”(亦即方法100的步骤110)。于t3之后,重新开始流入的砷基前躯物可用于多种用途,例如钝化留下的纳米线(例如208’及208”)的表面。
如图4B的实施例所示,砷基前躯物的流入可由一开始(t=0)持续至t1。接着,自t1开始,停止流入砷基前躯物,并开始流入磷基前躯物,并由t1持续至t2。接着,自t2开始,重新开始流入砷基前躯物,且停止流入磷基前躯物,并开始流入氯化氢气体,并由t2续至t3。于t3之后,停止流入氯化氢气体,并仍持续流入砷基前躯物。因此,在t=0至t1之间,成长砷基纳米线208(亦即方法100的步骤104)。在t1至t2之间,形成磷基层210(亦即方法100的步骤106)。在t2至t3之间,形成之磷基层210被移除,且留下具有较小直径的纳米线208’/208”(亦即方法100的步骤110)。此外,重新流入的砷基前躯物可用以防止纳米线208’/纳米线208”的热气化(thermalevaporation)。于t3之后,重新流入的砷基前躯物可用于多种用途,例如钝化留下的纳米线(例如208’及208”)的表面。
如图4C的实施例所示,砷基前躯物的流入可由一开始(t=0)持续至t1。接着,自t1开始,停止流入砷基前躯物,并开始流入磷基前躯物及氯化氢气体,并由t1持续至t2。接着,自t2开始,重新开始流入砷基前躯物,且停止流入磷基前躯物及氯化氢气体,并由t2续至t3。于t3之后,仍持续流入砷基前躯物。因此,在t=0至t1之间,成长砷基纳米线208(亦即方法100的步骤104)。在t1至t2之间,当磷基层210形成(亦即方法100的步骤106)时。此磷基层210即于形成之后被蚀刻/移除,及/或于形成的同时被蚀刻/移除,以形成被留下的纳米线208’/208”(亦即方法100的步骤110)。在t2至t3之间及t3之后,重新流入的砷基前躯物可用于多种用途,例如钝化留下的纳米线(例如208’及208”)的表面。
本公开提供形成具有超细直径的砷基纳米线(直径小于10纳米)的实施例。此实施例通过于砷基纳米线的表面上(反复)形成/蚀刻磷基层,以形成上述具有超细直径的砷基纳米线。相较于传统形成具有细的直径的砷基纳米线的方法,此实施例提供许多优点。在一些实施例中,通过依序控制前躯物气体/蚀刻气体流入相同腔体,砷基纳米线的成长、覆盖于其上的磷基层的形成、后续对此磷基层的蚀刻可依序/同时于相同的腔体中进行。之后,可防止任何在此成长过程中及/或蚀刻步骤中的不欲的污染物。在另一实施例中,于传统的方法中,为了达到具有如此细的直径(小于10纳米)的砷基纳米线,湿蚀刻是蚀刻已形成的纳米线的表面的其中一种方法。然而,此湿蚀刻通常会造成纳米线的损害(例如机械扭曲、表面损害等)。相较之下,本公开实施例将已成长的砷基纳米线的表面转变为磷基层,接着流入蚀刻气体以选择性蚀刻此磷基层。通过此方法,可避免于湿蚀刻步骤中常于纳米线上发生的机械扭曲。此外,于另一实施例中,由于在砷基纳米线的表面上形成/蚀刻磷基层的步骤可被反复进行,本公开实施例的方法可形成具有非常细的直径(小于5纳米)的砷基纳米线。
本公开提供形成具有纳米线的装置的多个实施例。其中一些实施例提供一种半导体装置的制造方法,包括:形成罩幕层于基板上;形成开口于罩幕层中;自基板成长砷基纳米线,砷基纳米线延伸穿过开口;移除罩幕层;形成磷基层于砷基纳米线上;及移除磷基层。
本公开实施例更提供一种半导体装置的制造方法,包括:形成罩幕层于基板上;形成开口于罩幕层中;通过施加砷基气体,以自基板成长第一砷基纳米线,第一砷基纳米线延伸穿过开口,其中第一砷基纳米线具有第一直径;移除罩幕层;通过施加磷基气体,以形成磷基单层于第一砷基纳米线上;及通过施加氯化氢以移除磷基单层,并藉此形成第二砷基纳米线,其中第二砷基纳米线具有第二直径,且第二直径与第一直径不同。
本公开实施例又提供一种半导体装置的制造方法,包括:于腔体(chamber)中形成罩幕层于基板上;形成开口于罩幕层中;通过将砷基气体流入腔体中以成长砷基纳米线,砷基纳米线穿过开口;移除罩幕层;通过将磷基气体流入腔体中以形成磷基层于砷基纳米线上;及通过将氯化氢气体流入腔体中以移除磷基层。
虽然本公开的实施例及其优点已公开如上,但应该了解的是,任何所属技术领域中技术人员,在不脱离本公开的精神和范围内,当可作变动、替代与润饰。此外,本公开的保护范围并未局限于说明书内所述特定实施例中的工艺、机器、制造、物质组成、装置、方法及步骤,任何所属技术领域中技术人员可从本公开公开内容中理解现行或未来所发展出的工艺、机器、制造、物质组成、装置、方法及步骤,只要可以在此处所述实施例中实施大抵相同功能或获得大抵相同结果皆可根据本公开使用。因此,本公开的保护范围包括上述工艺、机器、制造、物质组成、装置、方法及步骤。另外,每一权利要求构成个别的实施例,且本公开的保护范围也包括各个权利要求及实施例的组合。
Claims (10)
1.一种半导体装置的制造方法,包括:
形成一罩幕层于一基板上;
形成一开口于该罩幕层中;
自该基板成长一砷基纳米线,该砷基纳米线延伸穿过该开口;
移除该罩幕层;
形成一磷基层于该砷基纳米线上;及
移除该磷基层。
2.如权利要求1所述的半导体装置的制造方法,其中形成该磷基层包括将叔丁基膦或磷化氢施加于该砷基纳米线上,且温度不超过500℃。
3.如权利要求1所述的半导体装置的制造方法,其中该砷基纳米线是由下列至少一者形成:
铟化砷,砷化镓和砷化镓铟。
4.如权利要求1所述的半导体装置的制造方法,其中该磷基层是由下列至少一者形成:
磷化铟,磷化镓和磷化镓铟。
5.如权利要求1所述的半导体装置的制造方法,其中该磷基层为一单层。
6.如权利要求1所述的半导体装置的制造方法,其中移除该磷基层包括:
将氯化氢气体施加至该磷基层。
7.一种半导体装置的制造方法,包括:
形成一罩幕层于一基板上;
形成一开口于该罩幕层中;
通过施加一砷基气体,以自该基板成长一第一砷基纳米线,该第一砷基纳米线延伸穿过该开口,其中该第一砷基纳米线具有一第一直径;
移除该罩幕层;
通过施加一磷基气体,以形成一磷基单层于该第一砷基纳米线上;及
通过施加一氯化氢以移除该磷基单层,并藉此形成一第二砷基纳米线,其中该第二砷基纳米线具有一第二直径,且该第二直径与该第一直径不同。
8.如权利要求7所述的半导体装置的制造方法,其中通过施加氯化氢以移除该磷基单层包括:
停止供应该砷基气体及停止供应该磷基气体。
9.如权利要求7所述的半导体装置的制造方法,其中通过施加氯化氢以移除该磷基单层包括:
持续供应该砷基气体及停止供应该磷基气体至一腔体中。
10.如权利要求7所述的半导体装置的制造方法,其中通过施加氯化氢以移除该磷基单层包括:
停止供应该砷基气体及持续供应该磷基气体至一腔体中。
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TW201246599A (en) * | 2011-05-06 | 2012-11-16 | Nanocrystal Asia Inc Taiwan | Semiconductor substrate and fabricating method thereof |
KR20130017685A (ko) * | 2011-08-11 | 2013-02-20 | 한국과학기술연구원 | 대면적 나노임프린트 방법으로 패턴된 (111) 실리콘 기판위에 Volmer―Weber 방법으로 성장한 InGaAs 나노선 |
-
2015
- 2015-09-25 US US14/865,354 patent/US9698238B2/en active Active
- 2015-11-25 TW TW104139094A patent/TWI585031B/zh active
- 2015-11-30 CN CN201510859666.7A patent/CN106558536B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090008630A1 (en) * | 2006-01-25 | 2009-01-08 | Nxp B.V. | Tunneling transistor with barrier |
US20120235117A1 (en) * | 2009-12-01 | 2012-09-20 | National University Corporation Hokkaido University | Light emitting element and method for manufacturing same |
TW201246599A (en) * | 2011-05-06 | 2012-11-16 | Nanocrystal Asia Inc Taiwan | Semiconductor substrate and fabricating method thereof |
KR20130017685A (ko) * | 2011-08-11 | 2013-02-20 | 한국과학기술연구원 | 대면적 나노임프린트 방법으로 패턴된 (111) 실리콘 기판위에 Volmer―Weber 방법으로 성장한 InGaAs 나노선 |
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US20170092739A1 (en) | 2017-03-30 |
TW201711950A (zh) | 2017-04-01 |
US9698238B2 (en) | 2017-07-04 |
CN106558536B (zh) | 2019-10-18 |
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