CN106531887B - It is a kind of can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage - Google Patents
It is a kind of can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
- H10K10/471—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising only organic materials
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/464—Lateral top-gate IGFETs comprising only a single gate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
- H10K10/474—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising a multilayered structure
Abstract
The invention discloses it is a kind of can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, be divided into two class formation of bottom gate and top-gated；Wherein, bottom grating structure is successively made of substrate, gate electrode, the gate dielectric layer of interlayer structure, organic semiconductor layer and source-drain electrode from top to bottom；Top gate structure is successively made of substrate, source-drain electrode, organic semiconductor layer, the gate dielectric layer of interlayer structure and gate electrode from top to bottom；The gate dielectric layer of the interlayer structure is the ultra-thin ferroelectric thin film composition of two layers of ultra-thin insulation film sandwich.Under low erasable voltage polarization reversal can occur for ferroelectric thin film, conducive to erasable operation is carried out at low voltage.Two layers of ultra-thin insulation film greatly inhibits the grid Leakage Current generated because using ferroelectric thin film, can guarantee the job stability and reliability of memory.In addition, the ultrathin insulating film being inserted between ultra-thin ferroelectric film and organic semiconductor layer can promote the mobility that charge transmits in channel, conducive to the working frequency for promoting memory.
Description
Technical field
The invention belongs to ferroelectricity organic transistor non-volatile memory technologies fields, and in particular to one kind uses sandwich
The ferroelectricity gate dielectric layer of structure, realizing being capable of the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage.
Background technique
The organic field effect tube nonvolatile memory prepared based on ferroelectric material as ferroelectricity gate dielectric layer is (referred to as
Ferroelectricity organic transistor nonvolatile memory) because in necks such as the storage of non-volatile information, integrated circuit and FPD
The potential application advantage that domain has has started one research boom in the whole world in recent years.Such memory technology, which has, quickly wipes
Write operation, the storage unit of one-transistor structure, the non-destructive that stores information read, the non-volatile memories of information, soft
Property application, can low temperature preparation, solution processable and it is at low cost the advantages that, make its promise to be a new generation non-volatile memories
Technology, while also by the good non-volatile memories for being used as a new generation of more and more research institutions in the world and major company
Device.
This concept of ferroelectricity organic transistor nonvolatile memory is referred to based on ferroelectric material as ferroelectricity gate medium
Layer, using organic semiconductor as active layer, the organic transistor device of preparation.For such devices, respectively plus opposed polarity
After erasable voltage, the different polarized states that ferroelectric material generates due to the arrangement of internal dipole changes are removing outer power-up
After pressure, polarized state can persistently be kept, and incude different source-drain currents, correspond respectively to logical one and " 0 " state,
It is provided with non-volatile information storage function, therefore also referred to as ferroelectricity organic transistor nonvolatile memory.Such devices
It is registered earliest in 2001, French G.Velu et al. is used as ferroelectricity gate medium using ferroelectric material lead zirconium titanate (PbZrTiO3)
Layer, using six thiophene of organic semiconductor (α 6T) as active layer, is prepared for organic transistor [Appl.Phys.Lett. (2001)
79,659], which only shows current-voltage lagging characteristics, though a possibility that being provided with as memory device, but
It is not provide corresponding storage performance parameter, including storage switch durability and storing data persistence etc..Hereafter, in the world
Many well-known scientific research institutions to ferroelectricity organic transistor nonvolatile memory carried out research [Adv.Mater. (2004) 16,
633；Nat.Mater.(2005)4,243].In the research work of such devices, it has been found that ferroelectric polymers polyvinylidene fluoride
Alkene-trifluoro-ethylene (P (VDF-TrFE)) have spontaneously form crystallization ferroelectricity phase, can low temperature and solution processing, at low cost, work
Skill is simple, can the advantages such as flexible application, thus become that develop ferroelectricity organic transistor nonvolatile memory most widely used
Material.In the recent decade, the development work of ferroelectricity organic transistor nonvolatile memory has also mainly used P (VDF-
TrFE) it is used as ferroelectricity gate dielectric layer.But P (VDF-TrFE) Curie's electric field with higher.Therefore, using P (VDF-TrFE)
The higher erasable voltage of needs of ferroelectricity organic transistor nonvolatile memory generality as the preparation of ferroelectricity gate dielectric layer,
Reach 30~100V, this is not able to satisfy the requirement [Adv.Funct.Mater. (2009) 19,1609 of useization in fact；
Adv.Funct.Mater.(2009)19,2812；Adv.Mater.(2012)24,5910；Sic.Rep.(2014)4,7227；
Org.Electron.(2015)16,46；Adv.Electron.Mater.(2016)2,1500206].Although there is a small number of projects
Group uses relatively thin P (VDF-TrFE) film as ferroelectricity gate dielectric layer, and it is relatively low (8~18V) to obtain erasable voltage
Ferroelectricity organic transistor nonvolatile memory；But, on the one hand, the erasable voltage of 8~18V is still relatively high, is unfavorable for
The functionization of device；On the other hand, it because of larger grid Leakage Current caused by relatively thin P (VDF-TrFE) film, seriously affects
The stability of memory operation makes it not be able to satisfy practical requirement [Appl.Phys.Lett. (2005) 87,203509；
Nano Lett.(2011)11,138；ACS Appl.Mater.Interfaces(2014)6,438].
It is that acquisition can the erasable ferroelectricity of low-voltage using the ferroelectric material with low Curie's electric field as ferroelectricity gate dielectric layer
Another approach of organic transistor nonvolatile memory.But use the ferroelectric material of low Curie's electric field as ferroelectricity grid
The report of dielectric layer, the ferroelectricity organic transistor nonvolatile memory of preparation is seldom, and because needing suppressor Leakage Current,
And thicker ferroelectricity gate dielectric layer has been used, cause the erasable voltage of device to be up to 15V [Sic.Rep. (2016) 3,36291].
In view of energy consumption problem, practical ferroelectricity organic transistor nonvolatile memory must have sufficiently low erasable voltage
(should be less than 5V).
In view of the working mechanism of ferroelectricity organic transistor nonvolatile memory, if using the ferroelectricity material of low Curie's electric field
Material makes ultra-thin ferroelectric thin film as gate dielectric layer, is that the ferroelectricity for being hopeful to obtain low voltage operating (ideal value is lower than 5V) has
Machine transistor, non-volatile memory；However, it is necessary to solve grid Leakage Current this problem caused by ultra-thin ferroelectric thin film.If
Ultra-thin insulation film is prepared in ultra-thin ferroelectric thin film two sides, the gate dielectric layer of an interlayer structure is constructed, by reasonable
Structure design, can great suppressor Leakage Current, promote the functional reliability and stability of memory, be not only able to achieve full
Foot it is practical it is requiring, can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, moreover it is possible to increase the field of memory
Effect mobility, and then promote the working frequency of memory.Unfortunately, so far, there are no researchers to propose this base
In the gate dielectric layer for the interlayer structure that double-deck ultrathin insulating film combines ultra-thin ferroelectric thin film to construct, being used for preparation can
The erasable ferroelectricity organic transistor nonvolatile memory of low-voltage.
Summary of the invention
The present invention be directed to it is lacking at present, can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, mention
Supplied prepared by a kind of gate dielectric layer based on interlayer structure can the erasable high-performance ferroelectricity organic transistor of low-voltage it is non-volatile
Property memory is deposited different from traditional ferroelectricity organic transistor prepared by single layer ferroelectric thin film as gate dielectric layer is non-volatile
Reservoir, the gate dielectric layer of device architecture of the present invention are that ultra-thin ferroelectric thin film structure is clipped by two layers of ultra-thin insulation film
Interlayer structure made of building.
The present invention is achieved through the following technical solutions:
It is a kind of can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, be divided into two class knot of bottom gate and top-gated
Structure；Wherein, bottom grating structure is from top to bottom successively by substrate, gate electrode, the gate dielectric layer of interlayer structure, organic semiconductor layer and source
Drain electrode composition；Top gate structure from top to bottom successively by substrate, source-drain electrode, organic semiconductor layer, interlayer structure gate medium
Layer and gate electrode composition；The gate dielectric layer of the interlayer structure is the ultra-thin ferroelectricity of two layers of ultra-thin insulation film sandwich
Film composition.
Further, the substrate is rigid substrates or the polyethylene terephthalates, poly- first such as glass, silicon
The flexible substrates such as base methacrylate, polyethylene naphthalate, polyimides, polyether sulfone.
Further, the gate electrode and source-drain electrode be transparent tin indium oxide, silver (Ag), golden (Au), copper (Cu),
Aluminium (Al), graphene, carbon nanotube or poly- (3,4- ethene dioxythiophene).
Further, the organic semiconductor layer: can be small molecule organic semiconductor layer (such as: pentacene, phthalocyanine
Copper, Phthalocyanine Zinc, fluoro CuPc (CuF16PC), 60 (C of carbon60), 6,13- bis- (triisopropyl silicon side acetenyls), the bis- octyls of 2,7-
[1] benzothiophene simultaneously [3,2-b] [1] benzothiophene (C8-BTBT) etc.) or polymer organic semiconductor layer (such as: 3- oneself
Base substituting polythiophene (P3HT), { [bis- (2- octyldodecanol) naphthalene -1,4,5,8- couples-(dicarboximide) -2,6- two of N, N ' -
Base] -5,5 '-(2,2 '-bis- thiophene) } copolymer (P (NDI2ODT2)), (9,9- octyl fluorenes-diazosulfide) copolymer
(F8BT) etc.).
Further, the ultra-thin insulating layer of thin-film is the inorganic insulating materials such as aluminium oxide, zirconium oxide, silica,
Or the insulating material of polymer such as polymethyl methacrylate, polystyrene, polyimides, polyvinyl alcohol；Ferroelectric thin film is inclined
Copolymer (P (VDF-TrFE)), the vinylidene-trifluoro-ethylene-chlorotrifluoroethylene (P of the borontrifluoride polyethylene of vinyl fluoride-
Or vinylidene-trifluoro-ethylene-vinyl chloride copolymer (P (VDF-TrFE-CFE)) (VDF-TrFE-CTFE)).
Further, in the gate dielectric layer of the interlayer structure ultra-thin ferroelectric film with a thickness of 20~100nm, it is ultra-thin
Insulation film with a thickness of 1~15nm, organic semiconductor layer with a thickness of 20~100nm.
The above-mentioned material referred to can from Taiwan slope and Science and Technology Ltd. (Corporation web site: http: //
Www.lumtec.com.tw), French piezoelectricity scientific & technical corporation (Corporation web site: http://www.piezotech.eu), Sigma
Aldrich (Shanghai) trade Co., Ltd (Corporation web site: http://www.sigmaaldrich.com/china-
) etc. mainland.html buy.
Compared with prior art, the beneficial effects of the present invention are: due to using ultra-thin ferroelectric thin film, iron is directly reduced
Curie's voltage needed for conductive film polarization reversal, therefore significantly reduce the erasable voltage of memory.In ultra-thin ferroelectric film two
The ultrathin insulating film of side preparation, significantly reduces the grid Leakage Current of the memory of preparation, greatly improves memory
Job stability and reliability.In addition, the ultrathin insulating film being inserted between ultra-thin ferroelectric film and organic semiconductor layer, energy
Inhibit the disturbance from ferroelectric thin film microdomain polarization fluctuation to charge is transmitted in memory channel, and then the field effect of increase device
Mobility is answered, therefore improves the performance parameter of memory.
Detailed description of the invention
Fig. 1: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The structural schematic diagram of the property lost memory；
Wherein, a is bottom grating structure, and b is top gate structure；Substrate 1, gate electrode 2, the first ultrathin insulating layer 3, ultra-thin ferroelectricity
Film 4, the second ultrathin insulating layer 5, organic semiconductor layer 6, source/drain electrode 7；
Fig. 2: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The current-voltage transfer curve of the property lost memory (bottom grating structure)；
Fig. 3: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The erasable cyclic durability test of the property lost memory (bottom grating structure)；
Fig. 4: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The data storage retention performance test of the property lost memory (bottom grating structure)；
Fig. 5: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The current-voltage transfer curve of the property lost memory (top gate structure)；
Fig. 6: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The erasable cyclic durability test of the property lost memory (top gate structure)；
Fig. 7: the gate dielectric layer of the invention based on interlayer structure can the erasable ferroelectricity organic transistor of low-voltage it is non-easily
The data storage retention performance test of the property lost memory (top gate structure)；
Specific embodiment
The present invention is described further with reference to the accompanying drawing.
Embodiment 1:
It is a kind of can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, be divided into two class knot of bottom gate and top-gated
Structure；Wherein, the device of bottom grating structure is from top to bottom successively by substrate, gate electrode, the gate dielectric layer of interlayer structure, organic semiconductor
Layer and source-drain electrode composition；The gate dielectric layer of the interlayer structure is the ultra-thin iron of two layers of ultra-thin insulation film sandwich
Conductive film composition.
Wherein, substrate is polyethylene naphthalate (PEN) flexible substrate, and ultra-thin insulating layer of thin-film is oxidation
Aluminium；Ferroelectric thin film is vinylidene-trifluoro-ethylene-chlorotrifluoroethylene copolymer, and gate electrode is aluminium, and organic semiconductor layer is simultaneously
Pentaphene, source-drain electrode are copper.
Gate dielectric layer based on interlayer structure of the invention can the erasable ferroelectricity organic transistor of low-voltage it is non-volatile
The preparation process of memory is as follows:
Firstly, substrate is placed in multi-source organic molecule/vapor deposited metal system, using vacuum heat deposition technique, system
The aluminium film of standby 40nm；The substrate of aluminium film will be had, be placed in UV ozone processing system, carries out UV ozone processing, time
20min, so that aluminium film surface forms one layer of ultra-thin aluminum oxide film, with a thickness of 3.0nm.
Then, ferroelectric material vinylidene-trifluoro-ethylene-chlorotrifluoroethylene is dissolved in butyl acetate solvent
In, configure solution, concentration be 2% (mass percent), after configured vinylidene-trifluoro-ethylene-chlorotrifluoroethylene is total
The solution of polymers drips on the substrate for foring ultrathin alumina film, using spin coating proceeding, prepares one layer of vinylidene-trifluoro
The ultra-thin ferroelectric film of ethylene-chlorotrifluoro-ethylene copolymer, with a thickness of 60nm.Later, the lining of ultra-thin ferroelectric film will be prepared for
Bottom is placed in baking oven, 120 DEG C, is heated 120min, is removed remaining butyl acetate solvent.
The substrate after heating is again placed in multi-source organic molecule/vapor deposited metal system again, it is heat sink using vacuum
Product technique grows one layer of ultra-thin aluminium film in ultra-thin ferroelectric film surface, with a thickness of 40nm.Substrate is placed in again ultraviolet smelly
In oxygen processing system, UV ozone processing, time 30min are carried out.So that being grown in the ultra-thin of ultra-thin ferroelectric film surface growth
Aluminium film be oxidized to ultra-thin aluminum oxide film.So far, it completes by two layers of ultrathin insulating film combination ultra-thin ferroelectric film
Composition interlayer structure gate dielectric layer preparation.
Finally, it is heavy to be placed in multi-source organic molecule/metal gas phase for the substrate for the gate dielectric layer for having prepared interlayer structure
In product system, one layer of pentacene (organic half is grown on ultrathin insulating film (aluminium oxide) surface using vacuum heat deposition technique
Conductor) film, thickness 40nm, 0.2 angstroms per second of evaporation rate.And then, raw on pentacene surface using vacuum heat deposition technique
Long Copper thin film is as source-drain electrode, with a thickness of 70nm.It is graphical to source/drain electrode using mask plate, the channel of the device of preparation
Length and width is 100 microns and 1000 microns respectively.
All electrical performance characteristics Agilent B1500A of the ferroelectricity organic transistor nonvolatile memory of preparation
The measurement of semiconductor test analyzer, all tests are carried out in atmosphere at room temperature environment.
The current-voltage transfer characteristic of ferroelectricity organic transistor nonvolatile memory of the invention, storage cycling durable
Characteristic and charge storage retention performance are respectively as shown in Fig. 2,3 and 4.It can be seen from the figure that of the invention based on interlayer structure
Gate dielectric layer ferroelectricity organic transistor nonvolatile memory have good storage performance, especially its wipe/write voltage
Electric current ratio can be stored up to 1000 up to 3.8V down to ± 4V, memory window；It is more than in the storage cyclic durability of actual measurement
Within 2700 circulations, indicate that the threshold voltage of 1 and 0 state of storage is not decayed significantly；It is stored in actual 80,000 seconds data
In retention time test, there is no significantly decaying for the electric current of expression 1 and 0 state of storage；Show it is of the invention can low-voltage wipe
The ferroelectricity organic transistor nonvolatile memory write has good storage performance.
Embodiment 2
It is a kind of can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, be divided into two class knot of bottom gate and top-gated
Structure；Wherein, top gate structure from top to bottom successively by substrate, source-drain electrode, organic semiconductor layer, interlayer structure gate dielectric layer and
Gate electrode composition；The gate dielectric layer of the interlayer structure is the ultra-thin ferroelectric thin film of two layers of ultra-thin insulation film sandwich
Composition.
Wherein, substrate is polyethylene naphthalate (PEN) flexible substrate, and source-drain electrode is gold；Organic semiconductor
Layer is 3- hexyl substituting polythiophene (P3HT), and ultra-thin insulating layer of thin-film is polystyrene；Ferroelectric thin film is vinylidene-trifluoro
The copolymer of ethylene-chlorinated, gate electrode are aluminium.
Gate dielectric layer based on interlayer structure of the invention can the erasable ferroelectricity organic transistor of low-voltage it is non-volatile
The preparation process of memory is as follows:
Firstly, substrate is placed in multi-source organic molecule/vapor deposited metal system, using vacuum heat deposition technique, system
The gold thin film of standby 30nm, as source/drain electrode, 0.2 angstroms per second of evaporation rate；It is graphical to source/drain electrode using mask plate, system
The channel length and width of standby device are 100 microns and 1000 microns respectively.
3- hexyl substituting polythiophene (P3HT) is dissolved in chloroform solvent, solution is configured, concentration is 0.5% (quality hundred
Divide ratio).Then, configured 3- hexyl substituting polythiophene solution is dripped to the substrate in the Au film (source-drain electrode) prepared
On, using spin coating proceeding, prepare one layer of 3- hexyl substituting polythiophene (P3HT) film as organic semiconductor layer, with a thickness of
50nm.Later, it will be prepared for the substrate of ultrathin insulating film, be placed in baking oven, 120 DEG C, 5min is heated, remove remaining chlorine
Imitative solvent.
Polystyrene is dissolved in butyl acetate and chlorobenzene solvent respectively, configures solution, concentration is 0.3% (quality
Percentage).Then, configured polystyrene solution (solvent is butyl acetate) is dripped and replaces poly- thiophene in the 3- hexyl prepared
On the substrate of pheno film (organic semiconductor layer), using spin coating proceeding, the ultrathin insulating film of a strata styrene, thickness are prepared
For 10nm.Later, it will be prepared for the substrate of ultrathin insulating film, be placed in baking oven, 120 DEG C, heat 20min, removal is remaining
Butyl acetate solvent.
Then, by ferroelectric material vinylidene-trifluoro-ethylene-, that chlorotrifluoroethylene is dissolved in cellosolvo is molten
In agent, configure solution, concentration is 2% (mass percent), after by configured vinylidene-trifluoro-ethylene-chlorotrifluoroethylene
The solution of copolymer drips on the substrate for foring ultra-thin polystyrene film, using spin coating proceeding, prepares one layer of vinylidene-
Trifluoro-ethylene-chlorotrifluoroethylene ultra-thin ferroelectric film, with a thickness of 55nm.Later, ultra-thin ferroelectric film will be prepared for
Substrate, be placed in baking oven, 120 DEG C, heat 120min, remove remaining cellosolvo solvent.
Then, configured polystyrene solution (solvent is chlorobenzene) is dripped to the substrate in the ultra-thin ferroelectric film prepared
On, using spin coating proceeding, the ultrathin insulating film of a strata styrene is prepared, with a thickness of 10nm.Later, it will be prepared for ultra-thin exhausted
The substrate of edge film, is placed in baking oven, 120 DEG C, heats 20min, removes remaining chlorobenzene solvent.So far, it completes by two
The preparation of the gate dielectric layer of the interlayer structure of the composition of layer ultrathin insulating film combination ultra-thin ferroelectric film.
Finally, it is heavy to be placed in multi-source organic molecule/metal gas phase for the substrate for the gate dielectric layer for having prepared interlayer structure
In product system, one layer of aluminium film is grown as grid on ultrathin insulating film (polystyrene) surface using vacuum heat deposition technique
Electrode, thickness 100nm, 3 angstroms per second of evaporation rate.And then gate electrode overlay area is etched away using oxygen plasma etching technics
Extra various thin polymer films in addition complete graphically the device of preparation, and in the process, gate electrode aluminium film is taken on
Protective film.
All electrical performance characteristics Agilent B1500A of the ferroelectricity organic transistor nonvolatile memory of preparation
The measurement of semiconductor test analyzer, all tests are carried out in atmosphere at room temperature environment.
The current-voltage transfer characteristic of ferroelectricity organic transistor nonvolatile memory of the invention, storage cycling durable
Characteristic and charge storage retention performance are respectively as shown in Fig. 5,6 and 7.It can be seen from the figure that of the invention based on interlayer structure
Gate dielectric layer ferroelectricity organic transistor nonvolatile memory have good storage performance, especially its wipe/write voltage
Electric current ratio can be stored up to 50 up to 4.0V down to ± 4V, memory window；It is more than in the storage cyclic durability of actual measurement
Within 2700 circulations, indicate that the threshold voltage of 1 and 0 state of storage is not decayed significantly；It is stored in actual 60,000 seconds data
In retention time test, there is no significantly decaying for the electric current of expression 1 and 0 state of storage；Show it is of the invention can low-voltage wipe
The ferroelectricity organic transistor nonvolatile memory write has good storage performance.
Although in conjunction with example, the present invention is described, the invention is not limited to examples detailed above and attached drawing, for
It for the researcher of the art, can also modify to the present invention, these improvement also belong to the claims in the present invention
Protection scope in.
Claims (5)
1. one kind can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, which is characterized in that be divided into bottom gate and top
Two class formation of grid；Wherein, bottom grating structure from top to bottom successively by substrate, gate electrode, interlayer structure gate dielectric layer, organic partly lead
Body layer and source-drain electrode composition；Top gate structure is from top to bottom successively by substrate, source-drain electrode, organic semiconductor layer, interlayer structure
Gate dielectric layer and gate electrode composition；The gate dielectric layer of the interlayer structure is that two layers of ultra-thin insulation film sandwich is super
Thin ferroelectric thin film composition；Wherein, the ultra-thin insulating layer of thin-film is aluminium oxide, zirconium oxide, silica inorganic insulation material
Material or polymethyl methacrylate, polystyrene, polyimides, polyvinyl alcohol polymer insulating materials；The ferroelectric thin
Film is copolymer, vinylidene-trifluoro-ethylene-chlorotrifluoroethylene or the inclined fluorine second of the borontrifluoride polyethylene of vinylidene-
Alkene-trifluoro-ethylene-vinyl chloride copolymer；Wherein, in the gate dielectric layer of the interlayer structure ultra-thin ferroelectric film with a thickness of
20~100nm, ultrathin insulating film with a thickness of 1~15nm, the thickness of organic semiconductor layer is 20~100nm.
2. one kind as described in claim 1 can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, feature
Be, the substrate be glass, silicon rigid substrate, or for polyethylene terephthalate, polymethyl methacrylate,
Polyethylene naphthalate, polyimides, polyether sulfone flexible substrate.
3. one kind as described in claim 1 can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, feature
It is, the gate electrode and source-drain electrode are transparent tin indium oxide, silver, gold, copper, aluminium, graphene, carbon nanotube or poly-
(3,4- ethene dioxythiophene).
4. one kind as described in claim 1 can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, feature
It is, the organic semiconductor layer: can be small molecule organic semiconductor layer or polymer organic semiconductor layer.
5. one kind as claimed in claim 4 can the erasable ferroelectricity organic transistor nonvolatile memory of low-voltage, feature
It is, the small molecule organic semiconductor layer is pentacene, CuPc, Phthalocyanine Zinc, fluoro CuPc, carbon 60,6,13- bis-
(triisopropyl silicon side acetenyl), the bis- octyls of 2,7- [1] benzothiophene simultaneously [3,2-b] [1] benzothiophene；The polymer has
Machine semiconductor layer is 3- hexyl substituting polythiophene, { [(two formyls are sub- by N, N '-bis- (2- octyldodecanol) naphthalene -1,4,5,8- couples -
Amine) -2,6- diyl] -5,5 '-(2,2 '-bis- thiophene) } copolymer or (9,9- octyl fluorenes-diazosulfide) copolymer.
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| CN109411605A (en) * | 2018-10-26 | 2019-03-01 | 福州大学 | A kind of ferroelectric memory and preparation method thereof |
| CN109494228B (en) * | 2018-11-08 | 2021-05-28 | 吉林大学 | Nonvolatile memory with multi-bit storage function and preparation method thereof |
| CN110047996B (en) * | 2019-04-24 | 2021-01-05 | 南京大学 | Ultra-low power consumption ferroelectric transistor type memory based on two-dimensional organic functional material and preparation method thereof |
| CN110391250A (en) * | 2019-06-21 | 2019-10-29 | 长江存储科技有限责任公司 | A kind of three-dimensional storage and preparation method thereof |
| CN112447831B (en) * | 2020-10-19 | 2022-01-18 | 清华大学 | Device structure for improving performance of ferroelectric transistor and preparation method thereof |
| CN112531112B (en) * | 2020-12-03 | 2024-03-22 | 南京大学 | Ultrahigh-gain organic thin film transistor and preparation method thereof |
| US11232824B1 (en) | 2020-12-11 | 2022-01-25 | International Business Machines Corporation | Non-volatile analog resistive memory cells implementing ferroelectric select transistors |
| CN112909172B (en) * | 2021-01-18 | 2022-08-30 | 合肥工业大学 | Solar blind area deep ultraviolet light multi-stage nonvolatile memory based on organic field effect transistor |
| WO2022188040A1 (en) * | 2021-03-09 | 2022-09-15 | 华为技术有限公司 | Ferroelectric field effect transistor, storage array, memory and preparation method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1577912A (en) * | 2003-07-03 | 2005-02-09 | 三星电子株式会社 | Organic thin film transistor comprising multi-layered gate insulator |
| CN105552226A (en) * | 2016-01-20 | 2016-05-04 | 上海交通大学 | Organic thin-film transistor-based temperature sensor |
| CN105591029A (en) * | 2016-03-24 | 2016-05-18 | 华南师范大学 | Organic non-volatile memory device based on high K materials and preparation method thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1577912A (en) * | 2003-07-03 | 2005-02-09 | 三星电子株式会社 | Organic thin film transistor comprising multi-layered gate insulator |
| CN105552226A (en) * | 2016-01-20 | 2016-05-04 | 上海交通大学 | Organic thin-film transistor-based temperature sensor |
| CN105591029A (en) * | 2016-03-24 | 2016-05-18 | 华南师范大学 | Organic non-volatile memory device based on high K materials and preparation method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 《Low-Voltage Operation of Ferroelectric Gate Thin Film Transistors Using Indium Gallium Zinc Oxide-Channel and Ferroelectric Polymer Poly(vinylidene fluoride–trifluoroethylene)》;Gwang-Geun Lee, et al.;《Applied Physics Express》;20110819;第4卷;(091103)1-3 |
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