CN105679938B - A kind of loop coil small molecule floating gate type organic field effect tube memory and preparation method thereof - Google Patents
A kind of loop coil small molecule floating gate type organic field effect tube memory and preparation method thereof Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/10—Organic polymers or oligomers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/60—Organic compounds having low molecular weight
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Abstract
The present invention relates to the organic non-volatile field effect transistor storage device fields based on small molecule.Disclose a kind of loop coil small molecule floating gate type organic field effect tube memory and preparation method thereof.Structure includes source-drain electrode, semiconductor layer, tunnel layer, floating gate layer, electric charge barrier layer to the memory successively from top to bottom, and gate insulation layer, wherein tunnel layer, floating gate layer, electric charge barrier layer have been together to form electric charge capture layer.Transistorized memory of the present invention is prepared using solution processing method, it is easy to operate, it is of low cost, it is energy saving, being conducive to large-scale batch production electric charge capture layer, to be the one layer of smooth composite nano film of small molecule spiro material and high dielectric constant polymer memory realize high density, the non-volatile memory capabilities of stabilization, and keeps high mobility and on-off ratio (104), and operating procedure is simple, cost is relatively low, popularization, production convenient for memory device.
Description
Technical field
The invention belongs to organic field effect tube memory device fields, more particularly to the ambipolar of small molecule floating gate type
Organic field effect tube memory and preparation method thereof.
Background technology
High performance organic memory cell is organic integrated circuits, RFID tag (RFID Tags), large-area displays
Deng application in required component part.Meanwhile compared with traditional inorganic semiconductor device, the device based on organic semiconducting materials
Part has many advantages, such as at low cost, achievable large area processing, can be integrated with flexible substrates；Depositing based on organic field effect tube
Also there is reservoir available single transistor to realize, non-destructive is read, be easy to the advantages such as organic circuit is integrated, therefore be considered
It is a kind of organic memory device of most application prospect.
According to the difference of operation principle and device architecture, the organic non-volatile memory studied both at home and abroad at present can divide
For floating gate type, electret type and ferroelectric type memory device based on organic field effect tube structure.OFET(organic
Field effecttransistor) memory generally use transistor input-output characteristic, memory window, carrier mobility,
Write-in erasing speed, memory retention time and read-write wipe the performance parameters such as cycle to characterize.Nowadays has a large amount of research work
Work is dedicated to realizing high density, the storage of the non-volatile high-performance of high speed.Wherein organic nano floating gate type transistorized memory by
It is concerned in can be applied to flexible and scalability storage device, under certain DC Electric Field, is embedded in charge
Floating gate layer nano-particle between barrier layer and tunnel layer realizes writing for storage by capture to electric charge carrier and release
Enter and wipes.But the nano-particle pattern of this dispersion is difficult to accurately control and density is limited, mobility of the charge in floating gate layer
It is relatively low, therefore usually highdensity storage performance relatively difficult to achieve.And the method for taking small molecule floating boom of the size within 1nm
This problem can be well solved.
There is small molecule material stable performance, molecule and electronic structure definition to define and can carry out electronics knot according to demand
The advantages such as the design of structure and energy band, but the extensive use compared to polymer in charge storage, are dedicated to small molecule material
It is also seldom applied to stable non-volatile charge storage, apply more only C60, AlQ3 etc. at present, and usual mobility compared with
It is low, it is more difficult to realize high performance storage.It can be seen that nanometer floating gate type memory always exist charge floating gate layer mobility
The low and limited problem of storage density, it is more difficult to realize high performance storage.
Invention content
In view of existing in the prior art above-mentioned technical problem, the present invention propose it is a kind of will be with excellent charge-trapping ability
Ease of solubility small molecule material and hydrophobicity high dielectric constant polymer PS are blended spin coating and are fabricated to a kind of small molecule type floating boom storage
Method, efficiently solve the problems, such as that the storage density present in general nanometer floating gate type memory is relatively low, technique is more complex,
High density, non-volatile memories based on small molecule material are realized, and preparation process can simply accurately control, effectively
Advance the progress that small molecule material is applied to storage.
In order to solve the above technical problems, the technical solution adopted in the present invention is as follows：
A kind of molecule floating gate type organic field effect tube (OFET) memory based on small molecule spiro material, from up to
Under successively include source-drain electrode, semiconductor layer, tunnel layer, floating gate layer, electric charge barrier layer, gate insulation layer, wherein tunnel layer, floating boom
Layer, electric charge barrier layer have been together to form electric charge capture layer.It is characterized in that：Electric charge capture layer is one layer smooth in structure
The composite nano film of small molecule loop coil and high dielectric constant polymer.Floating gate type OFET memories not only enormously simplify system
Make technique, while also larger by the way of molecule floating boom improving storage density.
Heretofore described floating gate layer is that one layer of small molecule material SFDBAO of blending spin coating and the compound of polymer P S are received
Rice film, Film roughness is relatively low, very smoothly, compared to common nanoparticle form floating boom, effectively improves charge-trapping
The mobility of density and charge in floating gate layer.Moreover, the composite nano film of SFDBAO and PS can simultaneously be used as hole and
Electronics trapping layer generates larger positive and negative two-way memory window, and the stability being maintained for a long time.In this way, just improving
Mobility and storage density of the charge of OFET memories in floating gate layer.
In further technical solution, the lowest part of the floating gate type OFET memories further includes substrate and is formed in lining
Gate electrode on bottom.
Small molecule loop coil in the composite nano film is spiral shell [fluorenes -9,7- dibenzo [c, h] acridine -5- ketone]
(SFDBAO), it can be prepared by green day photooxidation reaction, stability is preferable, and hydroxyl and steric hindrance structure are contained in molecular formula,
And there is higher electron-withdrawing ability, be conducive to capture charge, and dissolubility is preferable, is easy to spin coating；Polymer is selected from Gao Jie
K polymer materials, the high dielectric constant polymer material are common polystyrene PS.The SFDBAO and PS pass through
Solution mode, which is blended, to be spun on the gate insulation layer.The structural formula of the SFDBAO is as follows：
The composite nano film of above-mentioned SFDBAO and PS is as the mixing molar ratio of electric charge capture layer：SFDBAO:PS=
1:5-25, preferably 1:10；The thickness of the film is 30-45nm.
SFDBAO materials provide higher hole capture density.The addition of PS materials has greatly improved memory device
Hold time and stability, within 50,000 second testing time without apparent charge leakage the case where.Device provided by the present invention exists
Hole and electronics can be captured simultaneously under applied voltage effect, and there is positive and negative two-way big memory window (positive and negative two-way write-in window
Mouth can reach 70V or so).PS is captured into electronics well and SFDBAO captures the ability integration in hole on a device.
The substrate is selected from highly doped silicon chip, sheet glass or plastics PET.The material that the gate electrode uses is selected from highly doped
Silicon, aluminium, copper, silver, gold, titanium or tantalum.The material that the gate insulation layer uses is selected from silica, aluminium oxide, zirconium oxide, polyphenyl second
The film thickness of alkene PS or polyvinylpyrrolidone PVP, the gate insulation layer are 100-300nm.What the semiconductor layer used
Material is selected from pentacene, aphthacene, rubrene, anthracene or 3- hexyl thiophenes, and the semiconductor uses thermal vacuum evaporation film-forming
Method forms a film, and is covered in tunnelling layer surface and forms conducting channel, thickness 40-50nm.The source-drain electrode materials are metal
Or organic conductor material, thickness 100nm.
In further technical solution, the device architecture of the OFET memories is respectively highly doped silicon from inside to outside
Piece is received as the silica (SiO2) of substrate and gate electrode, 300nm as gate insulation layer, the SFDBAO of 35nm and the compound of PS
Rice film is used as source-drain electrode as electric charge capture layer, pentacene as semiconductor layer, gold.
For its memory window characteristic curve of memory test of the present invention, it is known that write-in window is very big, and can be with
Realize that two-way write-in and erasing, display device have good memory characteristics；Its write-in-reading-erasing-reading characteristic quantity
There is good repeatedly erasable ability, after the erasable cycle of longer cycle, the erasable window of device according to the also surface memory
Mouth does not change substantially；For its data holding ability, after being up to 50,000 seconds, the charge of storage is still sufficiently stable,
Illustrate that the memory reliability of device is higher.
The present invention also provides the preparation methods of above-mentioned OFET memory devices, specifically comprise the following steps：
(1) small molecule loop coil and high dielectric constant polymer with excellent charge-trapping ability are chosen, toluene is dissolved in, is made
It is standby to become blend solution, solution concentration 5-15mg/ml, preferred a concentration of 5mg/ml；The blend solution configured is passed through
The ultrasonication 10-15min of 80KHz, stands 5h, it is made fully to dissolve later；
(2) suitable gate electrode and gate insulation layer substrate are selected, is dried after cleaning up substrate；
(3) the good sample of spin coating is put into 80 DEG C of baking ovens by the blend solution in clean substrate surface spin-coating step (1)
Middle drying obtains laminated film floating gate layer；
(4) vacuum evaporation semiconductor layer and source-drain electrode above laminated film floating gate layer after the drying.
It is in the mixing molar ratio of step (1) small molecular loop coil and high dielectric constant polymer：SFDBAO:PS=1:5-
25, preferably 1:10.The small molecule loop coil is spiral shell [fluorenes -9,7- dibenzo [c, h] acridine -5- ketone] (SFDBAO), can be led to
The preparation of green day photooxidation reaction is crossed, stability is preferable, hydroxyl and steric hindrance structure is contained in molecular formula, and with higher suction electricity
Sub- ability is conducive to capture charge, and dissolubility is preferable, is easy to spin coating；The polymer is selected from high dielectric constant polymer
Material, the high dielectric constant polymer material are common polystyrene PS.The structural formula of the SFDBAO is as follows：
The material that the gate electrode described in step (2) uses is selected from highly doped silicon, aluminium, copper, silver, gold, titanium or tantalum；The grid
The material that insulating layer uses is selected from silica, aluminium oxide, zirconium oxide, polystyrene PS or polyvinylpyrrolidone PVP, described
The film thickness of gate insulation layer is 100-300nm.
Spincoating conditions parameter is in step (3)：Rotating speed 3000rps, time set 30 seconds, and spin coating controls the thickness of film
For 30-45nm；
The material that the semiconductor layer described in step (4) uses is selected from pentacene, aphthacene, rubrene, anthracene or 3-
Hexyl thiophene, thickness 40-50nm；The source-drain electrode materials are metal or organic conductor material, thickness 100nm.
The evaporation rate of vacuum evaporation semiconductor layer described in step (4) isVacuum degree control is 5 × 10- 4pa-2×10-5The evaporation rate of pa, the vacuum evaporation source-drain electrode is
The present invention has the advantages that：
1, OFET memories provided by the present invention have the high hole capture density and height of small molecule spiro material simultaneously
The length of dielectric constant polymer material is held time and high stability, without apparent charge leakage within 50,000 second testing time
Situation.
2, OFET memory devices provided by the present invention not only with it is excellent hold time, with multistage store function and
With higher mobility (0.55cm2V-1S-1) and on-off ratio (104)。
3, device provided by the present invention is prepared using solution processing method, easy to operate, of low cost, energy saving, is had
Conducive to large-scale batch production.
Description of the drawings
Fig. 1 is OFET memory device junction compositions of the present invention.
Fig. 2 is the AFM shape appearance figures of SFDBAO molecule floating gate layer composite nano films prepared by embodiment 1；
Fig. 3 is the AFM shape appearance figures of semiconductor layer pentacene thin film prepared by embodiment 1；
Fig. 4 is the transfer characteristic curve of organic field effect tube memory test prepared by embodiment 1；
Fig. 5 is the output characteristic curve of organic field effect tube memory test prepared by embodiment 1；
Fig. 6 is the memory window characteristic curve of organic field effect tube memory test prepared by embodiment 1；
Fig. 7 is that cycle characteristics curve is wiped in the read-write of organic field effect tube memory test prepared by embodiment 1；
Fig. 8 is the characteristic curve of holding time of organic field effect tube memory test prepared by embodiment 1；
Specific implementation mode
The implementation method of the present invention is illustrated with reference to specific embodiment.But protection scope of the present invention is not real by setting about
Apply the limitation of example.
Embodiment 1
The OFET memory device structures that the present embodiment is related to are as shown in Figure 1, a kind of using composite nanometer film as charge-trapping
Layer organic field effect tube memory, from top to bottom successively include source-drain electrode, semiconductor layer, tunnel layer, floating gate layer,
Electric charge barrier layer, gate insulation layer, wherein tunnel layer, floating gate layer, electric charge barrier layer have been together to form electric charge capture layer.Charge is caught
Obtain the composite nano film that layer is one layer of smooth small molecule loop coil and high dielectric constant polymer.The lower part of the memory is also
Including substrate and the gate electrode for being formed in substrate.
Wherein, using the silicon of N-shaped doping as grid, the SiO of the 300nm grown thereon2As gate insulation layer；Charge-trapping
Layer is by spiral shell [fluorenes -9,7- dibenzo [c, h] acridine -5- ketone] (SFDBAO) and polystyrene PS with molar ratio for 1:10 ratio is logical
It crosses solution mode and is blended to be spun on the gate insulation layer and obtain, thickness 35nm；The pentacene of one layer of 50nm thickness
(Pentacene) it is used as semiconductor layer；Then the gold of one layer of 100nm is deposited as metal electrode in face on the semiconductor layer.
Wherein PS is a kind of common polymer electret material, as electronics trapping layer.PENTACENE is a kind of common
Semi-conducting material, in the present invention, for level-density parameter and carrier transport balance in terms of the considerations of, hole capture material selection
SFDBAO。
SFDBAO is a kind of spirane structure small molecule, and structural formula is as follows：
PS (polystyrene) is bought from Aldrich chemical reagents corporations.
PENTACENE (pentacene) is bought from Aldrich chemical reagents corporations.
The specific preparation process of the OFET memories of the present embodiment is：
When actually preparing, room temperature remains at 30 DEG C hereinafter, humidity is always 35% or less in laboratory.
(1) by SFDBAO and PS with molar ratio be 1:10 ratio is blended, and is dissolved in toluene, is prepared into blend solution, solution
A concentration of 5mg/ml；By the blend solution configured by the ultrasonication 10-15min of 80KHz, 5h is stood later, is made
It is fully dissolved.(2) Si of selection N-shaped doping is as grid, the SiO of the 300nm grown thereon2As insulating layer, will buy
Si/SiO2 pieces cutting at 1.5mm square pieces；The substrate of the 1.5cm*1.5cm cut alcohol swab first is gently dipped in and is washed, is removed
Fingerprint surface spot etc. is cleaned 10 minutes then in turn through EtOH Sonicate, and acetone is cleaned by ultrasonic 10 minutes, cleaning 2 times, later
Ultra-pure water is cleaned by ultrasonic 10 minutes, is blown off later with nitrogen and is put into 100 DEG C of baking oven drying；Substrate after drying is placed in power
It is handled 5 minutes to carry out UV ozone in the UV ozone processing instrument of 100W.
(3) in the blend solution of clean one layer of step (1) PS and SFDBAO of substrate surface spin coating as electric charge capture layer；
Spin coating uses the rotating speed spin coating 30s of 3000rps, obtains the uniform film of one layer of 35nm or so；The good substrate of spin coating is put into drum
Anneal in wind drying box at 80 DEG C 30min, obtains laminated film floating gate layer.(4) substrate that above-mentioned steps (3) have been moved back to fire is tight
It is then transferred in multi-source organic molecule vacuum evaporation system, is evacuated to chamber pressure and is less than 5 × 10-4After Pa, it is maintained at
Under the pressure then withSpeed be deposited one layer of 5 0nm thickness Pentacene be used as semiconductor layer, stopping heat after
Under the vacuum state, source temperature to be evaporated is cooled to 60 DEG C hereinafter, about after twenty minutes taking out substrate；Then above-mentioned substrate is put
Enter in multi-source metal vacuum deposition system, is evacuated to chamber pressure and is less than 5 × 10-4After Pa, withSpeed vapor deposition
The gold of one layer of 100nm is as field-effect transistor memory electrode；It after plated film, keeps under the vacuum state, waits for that electrode is cold
But to room temperature, substrate is then taken out, obtain the preparation of solution processing method has excellent hold time and can be small point of multistage storage
Sub- floating gate type organic field effect tube memory.
After the completion of prepared by device, electric property carries out table by Keithley 4200, Agilent B1500 semiconductor analysis instrument
Sign, the transfer curve that data processing is depicted as is as shown in figure 4, mobility reaches 0.55cm2/ Vs, on-off ratio is up to 104。
Fig. 2 is the AFM shape appearance figures of SFDBAO molecule floating gate layer composite nano films, it is seen that the SFDBAO＆PS of spin coating is blended
Laminated film roughness it is very low, very smoothly, be conducive to promote charge-trapping density and carrier mobility.
Fig. 3 is the AFM shape appearance figures of semiconductor layer pentacene thin film, it can be seen from the figure that pentacene granular grows are preferable,
So that transistor device has higher carrier mobility.
Fig. 6 is the memory window characteristic curve of device detection, it can be seen from the figure that the write-in window of device is very big, and
And two-way write-in and erasing may be implemented, display device has good memory characteristics.
Also the surface memory has good repeatedly erasable ability to write-in-reading-erasing-reading performance data of Fig. 7,
After the erasable cycle of longer cycle, the erasable window of device does not change substantially.
Shown in Fig. 8 is device data holding capacity, as can be seen from the figure after being up to 50,000 seconds, the electricity of storage
Lotus is still sufficiently stable, illustrates that the memory reliability of device is higher.
Embodiment 2
The totality in structure and preparation process is identical with embodiment 1 for embodiment 2, only following difference：
It is 1 that molar ratio, which is blended, in SFDBAO and PS:5, a concentration of 10mg/ml of blend solution；Choose the Si conducts of N-shaped doping
Grid, the SiO of the 200nm grown thereon2As insulating layer；The thickness of electric charge capture layer is 30nm, and the thickness of semiconductor layer is
40nm。
Embodiment 3
The totality in structure and preparation process is identical with embodiment 1 for embodiment 3, only following difference：
It is 1 that molar ratio, which is blended, in SFDBAO and PS:25, a concentration of 15mg/ml of blend solution；The Si for choosing N-shaped doping makees
For grid, the SiO of the 100nm grown thereon2As insulating layer；The thickness of electric charge capture layer is 45nm, the thickness of semiconductor layer
For 45nm.
All test result surfaces, it is according to the present invention it is a kind of using the composite nano film of loop coil and polystyrene as
The organic field effect tube memory device excellent combination property of electric charge capture layer, stability is good, and data keep reliability high, and
And preparation process is easy to operate, of low cost, main processes are completed, are energy saving in the solution, and can be extensive
Production.
The present invention is successfully prepared in such a way that spin-coating film is blended with polymer P S in a kind of small molecule spiro material
Small molecule floating gate type organic transistor memory, realizes the multistage storage of high mobility, and with excellent non-volatile and
Tolerance is wiped in stable read-write, effectively advances the progress that small molecule material is applied to storage, and preparation process letter
It is single, important in inhibiting is promoted for the commercialization of organic transistor memory.
Claims (7)
1. a kind of loop coil small molecule floating gate type organic field effect tube memory, include successively from top to bottom source-drain electrode,
Semiconductor layer, tunnel layer, floating gate layer, electric charge barrier layer, gate insulation layer, wherein tunnel layer, floating gate layer, common group of electric charge barrier layer
Synthesize electric charge capture layer, it is characterised in that：Electric charge capture layer is that one layer of smooth small molecule loop coil and high-k polymerize
The composite nano film of object；The lower part of the memory further includes substrate and is formed in the gate electrode of substrate, is bottom gate top
Contact-type field-effect transistor structure；Small molecule spiro material in the composite nano film is spiral shell [fluorenes -9,7- dibenzo
[c, h] acridine -5- ketone] (SFDBAO), it is prepared by green day photooxidation reaction；The high dielectric constant polymer is polyphenyl
Ethylene (PS).
2. organic field effect tube memory according to claim 1, it is characterised in that：The SFDBAO and PS pass through
Solution mode, which is blended, to be spun on the gate insulation layer.
3. organic field effect tube memory according to claim 2, it is characterised in that：The SFDBAO's and PS answers
Close nano thin-film is as the mixing molar ratio of electric charge capture layer：SFDBAO:PS=1:5-25；The thickness of the film is 30-
45nm。
4. floating gate type organic field effect tube memory according to claim 1, it is characterised in that：
The substrate is selected from highly doped silicon chip, sheet glass or plastics PET；
The material that the gate electrode uses is selected from highly doped silicon, aluminium, copper, silver, gold, titanium or tantalum；
The material that the gate insulation layer uses is selected from silica, aluminium oxide, zirconium oxide, polystyrene PS or polyvinylpyrrolidine
The film thickness of ketone PVP, the gate insulation layer are 100-300nm；
The material that the semiconductor layer uses is selected from pentacene, aphthacene, rubrene, anthracene or 3- hexyl thiophenes, and described half
Conductor is formed a film using thermal vacuum evaporation film-forming method, is covered in tunnelling layer surface and is formed conducting channel, thickness 40-50nm；
The source-drain electrode materials are metal or organic conductor material, thickness 100nm.
5. a kind of preparation method of organic field effect tube memory according to any one of claims 1-4, feature exist
In including the following steps：
(1) the ease of solubility small molecule spiro material with excellent charge-trapping ability and the polymerization of hydrophobicity high-k are chosen
Object is dissolved in hydrophobic solvent toluene, is configured as blend solution, solution concentration 5-15mg/ml；The blend solution that will have been configured
By 80KHz ultrasonication 10-15min, 5h is stood later, it is made fully to dissolve；
(2) suitable gate electrode and gate insulation layer substrate are selected, is dried after cleaning up substrate；
(3) blend solution in clean substrate surface spin-coating step (1), the good sample of spin coating is put into 80 DEG C of baking ovens and is dried
It is dry to obtain laminated film floating gate layer；
(4) vacuum evaporation semiconductor layer and source-drain electrode above laminated film floating gate layer after the drying；Step (1) small molecular
Loop coil is spiral shell [fluorenes -9,7- dibenzo [c, h] acridine -5- ketone] (SFDBAO), and the polymer material is PS.
6. preparation method according to claim 5, it is characterised in that：The material that the gate electrode described in step (2) uses
Selected from highly doped silicon, aluminium, copper, silver, gold, titanium or tantalum；The material that the gate insulation layer uses is selected from silica, aluminium oxide, oxygen
Change zirconium, polystyrene PS or polyvinylpyrrolidone PVP, the film thickness of the gate insulation layer is 100-300nm；In step
(3) spincoating conditions parameter is in：Rotating speed 3000rps, time set 30 seconds, and the thickness that spin coating controls film is 30-45nm；In step
Suddenly the material that semiconductor layer described in (4) uses is selected from pentacene, aphthacene, rubrene, anthracene or 3- hexyl thiophenes, thick
Degree is 40-50nm；The source-drain electrode materials are metal or organic conductor material, thickness 100nm.
7. preparation method according to claim 5, it is characterised in that：The vacuum evaporation semiconductor layer described in step (4)
Evaporation rate beVacuum degree control is 5 × 10-4pa-2×10-5pa；The vapor deposition speed of the vacuum evaporation source-drain electrode
Rate
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| CN113793901B (en) * | 2021-09-16 | 2023-11-07 | 南京大学 | Pentacene organic field effect transistor based on polymer doped N-type organic semiconductor |
| CN114036878B (en) * | 2021-10-28 | 2024-08-16 | 电子科技大学长三角研究院(湖州) | Dual-nerve morphological device based on charge trapping effect and electric double layer effect and preparation method thereof |
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