CN106531802A - Low on-resistance novel high-voltage SJ power device - Google Patents
Low on-resistance novel high-voltage SJ power device Download PDFInfo
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
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Abstract
The invention relates to a low on-resistance novel high-voltage SJ power device and belongs to the technical field of power semiconductor devices. In an N-type drift region of a transverse SJ power device, a P-type buried layer is introduced, a drain end is introduced into an N-type buffer layer, and a double field plate structure is introduced on the upper surface of the device. The P-type buried layer assists depletion of the N-type drift region, which increases the doping concentration of the drift region and reduces the on-resistance of the device. The N-type buffer layer of the drain end replaces an SJ structure under the drain end, which weakens the substrate-assisted depletion effect to some extent and can assist in depleting the P-type buried layer that is not completely depleted in the drift region, so that the super junction is enabled to never participate in vertical overvoltage resistance, thereby ensuring the charge balance of the super junction. The double field plate structure is a structure including double field plates which are a source end field plate and a drain end field plate. The field plates and device electrodes can be formed together without requiring other processing steps. The invention can improve the bulk electric field distribution and improve the overvoltage resistance of the device while reducing the on-resistance of the device. The invention can obtain various excellent transverse low on-resistance high-voltage SJ power devices with excellent performance.
Description
Technical field
Low ratio according to the present invention is led novel high-pressure SJ power devices and belongs to power semiconductor device technology field.
Background technology
Power MOSFET device design in, breakdown voltage BV with than conducting resistance Ron , spFundamental relation be：Ron , sp∝BV2.5.Super-junction structure has broken the theoretical limit of ordinary power MOSFET element, while holding power MOSFET all advantages, significantly reduces its conducting resistance so that R on , spBecome 1.32 powers with BV relations from 2.5 powers.So-called superjunction refers to that drift region is changed to be made up of the N bars and P bars alternating of high concentration by single N or P, and when additional high back voltage, N/P bars mutually exhaust, and realize that drift region equipotential lines is uniformly distributed.Under the ON state of N-shaped LDMOS, high concentration N bar has electric current to flow through, and has low conducting resistance.In the same manner, the P bars of p-type LDMOS have electric current, can also obtain same low on-resistance.The present invention is with N-shaped LDMOS as Research foundation.
Application of the superjunction technology in lateral MOS power device at present encounters difficulty.Up to the present, breakdown voltage and preferable effect can not still be reached than conducting resistance.Wherein topmost reason is that horizontal superjunction is made on the substrate of certain resistivity, can be affected by longitudinal electric field, break the charge balance of superjunction, reduces the horizontal pressure of device so that the breakdown voltage of device is drastically reduced.This is commonly referred to as " substrate-assisted depletion effect " in the world.
In horizontal SJ devices, substrate part superjunction N area electric charge in longitudinal assisted depletion causes N-type electric charge not enough with respect to p-type electric charge, causes superjunction charge unbalance.And bulk electric field problem Producing reason is that N-type electric charge is not enough to support the pressure of longitudinal direction, power line to concentrate the N for having pointed to drain terminal after being drained unnecessarily quickly in superjunction+Area.And the N-type electric charge of drift region is not enough.Most direct solution is exactly to compensate electric charge in drift region, to optimize and reduce longitudinal electric field.The mode of charge compensation may be constructed different device architectures mainly by increasing the dosage in N areas realizing according to the diverse location of compensation electric charge and variable concentrations distribution.
As shown in Figure 1, in order to solve the problems, such as P/N bars area charge imbalance that horizontal SJ devices are brought due to substrate-assisted depletion effect, only the upper area in N-type drift region introduces SJ, and the lower section of such N-type drift region just can be alleviated to a certain extent due to the charge unbalance phenomenon caused by substrate-assisted depletion effect between P/N bars area.But as the concentration of drift region is relatively low, cause still very higher than conducting resistance.
In order to further reduce the ratio conducting resistance of SJ LDMOS devices, slow down substrate-assisted depletion effect simultaneously, improve the pressure of device, the present invention proposes a kind of low novel high-pressure SJ power devices than leading, i.e., introduce p type buried layer, drain terminal in the N-type drift region of horizontal SJ power devices and introduce N-type cushion.P type buried layer assisted depletion N-type drift region, improves drift doping concentration, and conducting resistance is compared in reduction.Simultaneously as the introducing of p type buried layer, constitutes many RESURF structures, can play the effect of optimizing surface electric field.By increasing the N-type cushion area of Uniform Doped in drain terminal, constitute RESURF structures to alleviate substrate-assisted depletion effect together with substrate.N-type cushion can be effectively improved internal Electric Field Distribution with not complete depletion of p type buried layer in assisted depletion drift region simultaneously, improve the pressure of device.
The content of the invention
The purpose of the present patent application is to cause lateral high-voltage device than the very big reduction of conducting resistance by arranging p type buried layer, drain terminal in the drift region and arrange N-type cushion, double field plate structures and SJ technologies, solves " the silicon limit " difficult problem than conducting resistance and breakdown voltage present in conventional high-pressure device.The range of application of the low high voltage power device than leading of extension.
For solving the above problems, following technical scheme is embodiments provided：
The low novel high-pressure SJ power devices than leading, its structure cell include P type substrate 1, N-type drift region 21, it is characterised in that：The N-type drift region 21 includes PXing Ti areas 31, SJ structures, N-type cushion 25 and p type buried layer 34, and PXing Ti areas 31 are arranged on 21 one end of N-type drift region.
Specifically, the PXing Ti areas 31 include p-type heavily doped region 33 and N-type heavily doped region 23, and its upper end is source electrode 52 and gate oxide 41.
Specifically, the source electrode 52 is connected with source terminal field plate 55.
Specifically, the source electrode 52, source terminal field plate 55 and gate oxide 41 are isolated by passivation layer 42.
Specifically, 41 upper surface of the gate oxide is provided with polygate electrodes 51.
Specifically, the SJ structure settings are in N-type drift region 21, are arranged to make up SJ structures and are connected with PXing Ti areas 31 along device upper surface is longitudinally staggered, and SJ structures include PXing Tiao areas 32 and NXing Tiao areas 22.
Specifically, the N-type cushion 25 is arranged in N-type drift region 21 other end away from PXing Ti areas 31, and is connected with SJ structures.
Specifically, the N-type cushion 25 includes N-type heavily doped region 24.
Specifically, 24 upper end of N-type heavily doped region is provided with drain terminal electrode 53, and it is coupled to leak termination field plate 56.
Specifically, the drain terminal electrode 53, leakage termination field plate 56 and gate oxide 41 are isolated by passivation layer 42.
Specifically, the p type buried layer 34 is arranged in N drift regions 21.
Specifically, the underlayer electrode 54 is arranged on the lower surface of P type substrate 1.
Compared with prior art, above-mentioned technical proposal has advantages below：
A kind of low novel high-pressure SJ power devices than leading that the present invention is provided, i.e., introduce p type buried layer in the N-type drift region of horizontal SJ power devices, and drain terminal introduces N-type cushion, introduces double field plate structures in device upper surface.Compared with routine techniques, p type buried layer assisted depletion N-type drift region improves the doping content of drift region to this technology, reduces the ratio conducting resistance of device.The N-type cushion of drain terminal instead of the SJ structures under drain terminal, serve weakening substrate-assisted depletion effect to a certain extent, while can be with not complete depletion of p type buried layer in assisted depletion drift region.Double field plate structures are exactly the structure containing two kinds of field plates, are source terminal and leakage termination field plate respectively.Field plate can be formed together with device electrode, without the need for other processing steps.The introducing of field plate can modulate surface electric field distribution, make electric force lines distribution uniform, not in source and drain end concentrations, so as to improve device electric breakdown strength.
Description of the drawings
Fig. 1 is conventional laterally high pressure SJ power unit structure generalized sections.
Fig. 2 is the low horizontal high pressure SJ device architecture profiles than conducting resistance of the present invention.
Fig. 3 is the principle schematic of the low horizontal high pressure SJ devices than conducting resistance of the present invention, is schemed（a）For OFF state principle schematic, figure（b）For ON state principle schematic.
Fig. 4 be conventional SJ structures with the low novel high-pressure SJ devices drain region than conducting resistance of the present invention below longitudinal electric field simulation result figure（With drain region lower surface as longitudinal zero point）.
Potential profile during low horizontal high pressure SJ device breakdowns than conducting resistance that Fig. 5 is conventional laterally high pressure SJ power devices and the present invention is provided.
During low horizontal high pressure SJ device breakdowns than conducting resistance that Fig. 6 is conventional laterally high pressure SJ power devices and the present invention is provided, the surface field simulation result figure of device（With device left end as horizontal zero point）.
Fig. 7 is the structure chart of the low horizontal high pressure SJ devices than conducting resistance of the shallow slot grid structure of the present invention.
Fig. 8 is the structure chart of the low horizontal high pressure SJ devices than conducting resistance of the medium slot grid structure of the present invention.
Fig. 9 is the structure chart of the low horizontal high pressure SJ devices than conducting resistance of the deep slot grid structure of the present invention.
Figure 10 is the low horizontal high pressure SJ device architecture profiles than conducting resistance of the present invention, wherein has multiple p type buried layers 34 in drift region.
Figure 11 is the low horizontal high pressure SJ device architecture profiles than conducting resistance of the present invention, is provided with two grids on the basis of Figure 10.
Figure 12 be the low horizontal high pressure SJ power device applications than conducting resistance of the present invention to structure chart during LIGBT, wherein 35 is p-type heavy doping.
Figure 13 is the horizontal high pressure SJ power unit structure figures of the low on-resistance of the present invention, and it is SOI materials that its backing material is SOI substrate, i.e., 43.
Figure 14 is the horizontal high pressure SJ power unit structure figures of the low on-resistance of the present invention, and its backing material is that SOI substrate, i.e., 43 are SOI materials, and SOI is set to stairstepping.
Figure 15 is the low horizontal high pressure PSOI than conducting resistance of the present invention
SJ power unit structure profiles, wherein 36 adulterate for p-type.
Figure 16 is the low horizontal high pressure SOI than conducting resistance of the present invention
SJ device architecture profiles, wherein 26 is N-type heavy doping.
Figure 17 is the low horizontal high pressure SOI than conducting resistance of the present invention
SJ device architecture profiles, wherein soi layer upper surface are trench structure.
Figure 18 is the low horizontal high pressure SOI than conducting resistance of the present invention
To structure chart during LIGBT, 35 is p-type heavy doping to SJ power device applications.
Figure 19 is the low horizontal high pressure SOI than conducting resistance of the present invention
When SJ power device applications are to LIGBT, there is the structure chart of short-circuit anode, wherein 27 is N-type heavy doping, and 44 is SiO2Medium.
Figure 20 is the N/P bars of the horizontal high pressure SJ power semiconductor superjunction that the present invention is provided using structure chart during medium isolation, wherein SiO2Medium 45 is located between the N bars and P bars of superjunction.
Specific embodiment
Below in conjunction with the accompanying drawings, describe technical scheme in detail：
Conventional laterally high pressure SJ devices in the present invention, only in the upper area introducing SJ of N-type drift region, the lower section of such N-type drift region just can alleviate the charge unbalance phenomenon between the P/N bars area caused due to substrate-assisted depletion effect to a certain extent.But as the concentration of drift region is relatively low, cause still very higher than conducting resistance.
For this purpose, a kind of low novel high-pressure SJ power devices than leading are embodiments provided, on conventional high pressure SJ power semiconductors, also including p type buried layer 34, N-type cushion 25 and double field plate structures.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the invention, rather than the embodiment of whole.Based on the embodiment in the present invention, the every other embodiment obtained under the premise of creative work is not made by those of ordinary skill in the art belongs to the scope of protection of the invention.
Embodiment one：Present embodiments provide a kind of low novel high-pressure SJ power devices than leading, as shown in Fig. 2 its structure cell includes P type substrate 1, N-type drift region 21, p type buried layer 34, PXing Tiao areas 32, NXing Tiao areas 22, PXing Ti areas 31, N-type heavily doped region 23, p-type heavily doped region 33, N-type heavily doped region 24, gate oxide 41, N-type cushion 25, polygate electrodes 51, source electrode 52, drain terminal electrode 53, underlayer electrode 54, passivation layer 42 and source terminal field plate 55 and leakage termination field plate 56.42 for passivation layer rather than field oxide is to need high temperature due to field oxide, P/N bars may be caused to be moved back scattered, so having selected passivation layer 42 here.The N-type drift region 21 is provided with p type buried layer, and drain terminal arranges N-type cushion 25.During device forward conduction, N-type drift region 21 constitutes the parallel connection that the ratio conducting resistance of conducting channel, i.e. device is N-type 21 resistance of drift and heavily doped superjunction resistance together with the NXing Tiao areas 22 of superjunction.During reverse-conducting, device is laterally pressure mainly to be undertaken by the P/N bars of superjunction.It is that p type buried layer 34 can improve drift region concentration so that further reduce than conducting resistance with assisted depletion N-type drift region 21 in the present embodiment that the invention has three differences with existing conventional SJ structures.And due to the introducing of p type buried layer 34, whole device constitutes many RESURF structures, reduces surface field to a certain extent；The N-type cushion 25 of drain terminal instead of drain terminal and obtain SJ structures, with assisted depletion p type buried layer 34, and can alleviate substrate-assisted depletion effect to a certain extent.In the present embodiment, the doping content of N-type drift region 21 is still 2.0e15, the doping content in SJ structures ZhongNXing Tiao area 22 and PXing Tiao areas 32 remains 4.0e16, the doping content of p type buried layer 34 is 3.5e15, the doping content of N-type cushion 25 is 7.0e16, and the thickness of the thickness and position and N-type cushion 25 by constantly adjustment p type buried layer 34, to coordinate the fully- depleted of drift region, reduction is finally reached than conducting resistance, while improve the pressure effect of device；Double field plate structures being also provided with the present embodiment, being source terminal field plate 55 and leakage termination field plate 56 respectively, new surface field spike can be introduced with edges of boards edge on the scene, optimizing surface electric field is improved pressure.Meanwhile, field plate can be formed together with device electrode, without the need for other processing steps.Fig. 3 is the principle schematic of the low horizontal high pressure SJ devices than conducting resistance of the present invention, is schemed（a）For OFF state principle schematic, figure（b）For ON state principle schematic；Fig. 4 be conventional SJ structures with the low novel high-pressure SJ devices drain region than conducting resistance of the present invention below longitudinal electric field simulation result figure（With drain region lower surface as longitudinal zero point）；Potential profile during low horizontal high pressure SJ device breakdowns than conducting resistance that Fig. 5 is conventional laterally high pressure SJ power devices and the present invention is provided；During low horizontal high pressure SJ device breakdowns than conducting resistance that Fig. 6 is conventional laterally high pressure SJ power devices and the present invention is provided, the surface field simulation result figure of device（With device left end as horizontal zero point）；By the comparison of longitudinal electric field distribution under breakdown Model figure, Potential Distributing situation, surface field and drain region, can learn that the present invention is pressure than conventional structure and be significantly increased.
Embodiment two：In order to solve the low key technical problem than leading, the present embodiment in addition to providing structure as shown in Figure 2 additionally provides three kinds of slot grid structures and is contrasted.Fig. 7 is the SJ devices of shallow slot grid structure, and when shallow slot gate device is pressure, the electric field in drift region easily crosses concentration in the sharp corner of groove oxide layer 41, and A points such as in figure cause device to puncture in advance.If the medium slot grid structures of Fig. 8 are to extend to the polygate electrodes of a part in N-type drift region 21, medium groove-gate MOSFETs and shallow slot gate device in addition to the depth of groove grid is different, do not have other differences in structure.Compared with shallow slot grid structure, medium slot grid structure has the advantage of two aspects：On the one hand, groove grid and N-type drift region 21 constitute MIS（Metal Insulator
Semiconductor）Electric capacity, during OFF state, MIS electric capacity makes N-type drift region 21 and 41 interface of groove oxide layer accumulate a large amount of holes, assisted depletion N-type drift region 21, optimised devices longitudinal electric field；On the other hand, during ON state, the effect of MIS electric capacity makes N-type drift region 21 and 41 interface of groove oxide layer accumulate a large amount of electronics, increases the concentration of N-type drift region 21, provide low impedance path for ON state current, so as to reduce device on-resistance.But as shallow slot grid structure, when pressure, electric field concentrations at groove oxide layer 41 will cause device to puncture in advance to medium slot grid structure.As shown in figure 9, the pressure principle of depth slot grid structure is similar to medium slot grid structure, MIS electric capacity assisted depletion principles are all make use of.Compare shallow slot grid and medium slot grid structure, deep trouth gate device also have two other in terms of effect：First, polysilicon gate is deep in P type substrate 1, the electric field concentrations of 41 bottom sharp corner of groove oxide layer can be avoided（C points such as in figure）, so as to prevent device from puncturing in advance, greatly improve the breakdown voltage of device；Second, deep trouth grid may also operate as the buffer action between device.As shown in Figure 10, multiple p type buried layers 34 will be set in N-type drift region 21, width from source to drain terminal p type buried layer 34 is sequentially reduced into arithmetic series, assisted depletion N-type drift region 21, raising 21 concentration of N-type drift region, subtract small conduction resistance, p type buried layer 34 and 21 transverse and longitudinal direction of N-type drift region all constitute P/N junction structures simultaneously, improve the pressure voltage in transverse and longitudinal direction.As shown in figure 11, being improved in the structure of Figure 10, it is proposed that double-gate structure, planar gate, groove grid, so binary channels being improved for carrier, conducting resistance is compared in reduction.
Embodiment three：In order to thoroughly solve the problems, such as substrate-assisted depletion effect, and while raising device is pressure.This enforcement can also be improved to drain terminal direction doping content from source by N-type drift region 21 in the form of linear varying doping in addition to proposing structure as shown in Figure 2 successively.A kind of structure of low novel high-pressure SJ power devices than leading provided by the present invention, can specifically be applied to P-LDMOS, IGBT
(Insulated Gate Bipolar Transistor, insulated gate bipolar transistor), SOI and the isostructural lateral high-voltage devices of PSOI (partial SOI).As shown in figure 12, a kind of horizontal SJ LIGBT device architecture profiles that the present invention is provided, the N-type heavy doping 24 of wherein drain terminal are replaced with p-type heavy doping 35；Figure 13 is the horizontal high pressure SJ power unit structure figures of the low on-resistance of the present invention, its backing material is SOI substrate, i.e. 43 is SOI materials, conventional SOI SJ LDMOS, because the N areas positive charge of superjunction participates in exhausting for longitudinal direction, so the charge balance of superjunction can be broken, substrate-assisted depletion effect is likewise suffered from.So the N-type cushion 25 of the P buried regions and drain terminal in the present invention can equally alleviate the substrate-assisted depletion effect of SOI SJ devices；Figure 14 is the horizontal high pressure SJ power unit structure figures of the low on-resistance of the present invention, its backing material is SOI substrate, i.e. 43 is SOI materials, SOI is set to stairstepping, the characteristics of structure is two faces of buried regions while forming ladder, ladder can stop extraction of the transverse electric field to electric charge, and accumulating a large amount of inversion charges in each stepped locations strengthens buried regions electric field, improves device pressure.One of SOI device difference longitudinally pressure with body silicon device be exactly the substrate of SOI device be not involved in substantially it is pressure, with reference to the characteristics of SOI and body silicon, depletion layer can be made to extend to substrate using the mode of buried regions windowing, and window can be used as passage of heat, Figure 15 is the low horizontal high pressure PSOI SJ power unit structure profiles than conducting resistance of the present invention, wherein 36 adulterate for p-type, it is therefore an objective to while weakening the impact of substrate-assisted depletion effect, alleviate the self-heating effect of SOI device；Figure 16 is the low horizontal high pressure SOI SJ device architecture profiles than conducting resistance of the present invention, wherein 26 is N-type heavy doping, arrange multiple N-type islands to provide substantial amounts of electric charge in SOI upper surfaces, while substrate-assisted depletion effect is alleviated, the electric field at buried regions is also enhanced, the pressure of device is improve；Figure 17 is the low horizontal high pressure SOI SJ device architecture profiles than conducting resistance of the present invention, and wherein SOI upper surfaces are trench structures, and due to the presence of media slot, on buried regions, interfacial area tires out a large amount of electric charges, strengthens buried regions electric field, improves device pressure；Figure 18 be the low horizontal high pressure SOI SJ power device applications than conducting resistance of the present invention to structure chart during LIGBT, 35 is p-type heavy doping；Other have the present embodiment provide soi structure and transversal I GBT devices device principle it is similar with the present invention, its similarity can cross-reference, will not be described here.
Figure 19 is the low horizontal high pressure SOI than conducting resistance of the present invention
When SJ power device applications are to LIGBT, there is the structure chart of short-circuit anode, wherein 27 is N-type heavy doping, and 44 is SiO2Medium；Purpose is to reduce the turn-off speed than improving LIGBT while conducting resistance.When device is turned off from conducting state, the non-equilibrium few son stored in drift region can be directly extracted by N-type heavily doped region 27, it is not necessary to the purpose for being combined to reach shut-off through electron hole pair.SiO2The presence of medium can eliminate Snapback phenomenons.Figure 20 is the N/P bars of the horizontal high pressure SJ power semiconductor superjunction that the present invention is provided using structure chart during medium isolation, wherein SiO2Medium 45 is located between the N bars and P bars of superjunction.N bars, SiO2Medium defines MOS structure with P bars.
The low novel high-pressure SJ power devices than leading that the present invention is provided, introduce p type buried layer in the N-type drift region of horizontal SJ power devices, and drain terminal introduces N-type cushion, introduce double field plate structures in device upper surface.Substrate-assisted depletion effect is eliminated to a certain extent, while effectively improving surface and internal Electric Field Distribution, improves the pressure of device.
In description of the invention, each embodiment is described by the way of progressive, and what each embodiment was stressed is the difference with other embodiment, between each embodiment identical similar portion mutually referring to.The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or using the present invention.Various modifications to these embodiments will be apparent for those skilled in the art, and generic principles defined herein can be realized without departing from the spirit or scope of the present invention in other embodiments.Therefore, the present invention is not intended to be limited to the embodiments shown herein, and is to fit to the most wide scope consistent with principles disclosed herein and features of novelty.
Claims (12)
1. the novel high-pressure SJ power devices that low ratio is led, its structure cell include P type substrate 1, N-type drift region 21, it is characterised in that：The N-type drift region 21 includes PXing Ti areas 31, SJ structures, N-type cushion 25 and p type buried layer 34, and PXing Ti areas 31 are arranged on 21 one end of N-type drift region.
2. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The PXing Ti areas 31 include p-type heavily doped region 33 and N-type heavily doped region 23, and its upper end is source electrode 52 and gate oxide 41.
3. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The source electrode 52 is connected with source terminal field plate 55.
4. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The source electrode 52, source terminal field plate 55 and gate oxide 41 are isolated by passivation layer 42.
5. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：41 upper surface of the gate oxide is provided with polygate electrodes 51.
6. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The SJ structure settings in N-type drift region 21, along device upper surface is longitudinally staggered are arranged to make up SJ structures and are connected with PXing Ti areas 31, and SJ structures include PXing Tiao areas 32 and NXing Tiao areas 22.
7. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The N-type cushion 25 is arranged in N-type drift region 21 other end away from PXing Ti areas 31, and is connected with SJ structures.
8. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The N-type cushion 25 includes N-type heavily doped region 24.
9. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：24 upper end of N-type heavily doped region is provided with drain terminal electrode 53, and it is coupled to leak termination field plate 56.
10. the novel high-pressure SJ power devices that low ratio according to claim 1 is led, it is characterised in that：The drain terminal electrode 53, leakage termination field plate 56 and gate oxide 41 are isolated by field passivation layer 42.
The 11. low novel high-pressure SJ power devices than leading according to claim 1, it is characterised in that：The p type buried layer 34 is arranged in N drift regions 21.
The 12. low novel high-pressure SJ power devices than leading according to claim 1, it is characterised in that：The underlayer electrode 54 is arranged on the lower surface of P type substrate 1.
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| CN107910359A (en) * | 2017-11-08 | 2018-04-13 | 南京邮电大学 | It is a kind of that there is the LDMOS device and its manufacture method for expanding E SOA regions |
| CN109817718A (en) * | 2019-01-08 | 2019-05-28 | 上海华虹宏力半导体制造有限公司 | The high-voltage isolating ring device of gate drive circuit |
| CN110993691A (en) * | 2019-11-25 | 2020-04-10 | 西安电子科技大学 | Double-channel transverse super-junction double-diffusion metal oxide wide band gap semiconductor field effect transistor and manufacturing method thereof |
| CN111081777A (en) * | 2019-11-25 | 2020-04-28 | 西安电子科技大学 | Double-channel transverse super-junction double-diffusion metal oxide semiconductor field effect transistor and manufacturing method thereof |
| CN113270500A (en) * | 2021-05-17 | 2021-08-17 | 电子科技大学 | Power semiconductor device |
| CN113782609A (en) * | 2021-09-09 | 2021-12-10 | 东南大学 | 1200V bulk silicon LDMOS with substrate charge coupled and preparation method thereof |
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| CN107785414A (en) * | 2017-10-27 | 2018-03-09 | 电子科技大学 | Lateral power with hybrid conductive pattern and preparation method thereof |
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| CN110993691A (en) * | 2019-11-25 | 2020-04-10 | 西安电子科技大学 | Double-channel transverse super-junction double-diffusion metal oxide wide band gap semiconductor field effect transistor and manufacturing method thereof |
| CN111081777A (en) * | 2019-11-25 | 2020-04-28 | 西安电子科技大学 | Double-channel transverse super-junction double-diffusion metal oxide semiconductor field effect transistor and manufacturing method thereof |
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| CN113782609A (en) * | 2021-09-09 | 2021-12-10 | 东南大学 | 1200V bulk silicon LDMOS with substrate charge coupled and preparation method thereof |
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Application publication date: 20170322 |