CN106464240A - 通过组合电流编码和尺寸编码来改善相位内插器的线性度 - Google Patents
通过组合电流编码和尺寸编码来改善相位内插器的线性度 Download PDFInfo
- Publication number
- CN106464240A CN106464240A CN201580030405.2A CN201580030405A CN106464240A CN 106464240 A CN106464240 A CN 106464240A CN 201580030405 A CN201580030405 A CN 201580030405A CN 106464240 A CN106464240 A CN 106464240A
- Authority
- CN
- China
- Prior art keywords
- branch
- described part
- transistors
- differential
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00019—Variable delay
- H03K2005/00058—Variable delay controlled by a digital setting
- H03K2005/00065—Variable delay controlled by a digital setting by current control, e.g. by parallel current control transistors
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
- Networks Using Active Elements (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/300,127 US9485084B2 (en) | 2014-06-09 | 2014-06-09 | Linearity of phase interpolators by combining current coding and size coding |
| US14/300,127 | 2014-06-09 | ||
| PCT/US2015/030644 WO2015191214A1 (en) | 2014-06-09 | 2015-05-13 | Improving linearity of phase interpolators by combining current coding and size coding |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106464240A true CN106464240A (zh) | 2017-02-22 |
Family
ID=53276285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201580030405.2A Pending CN106464240A (zh) | 2014-06-09 | 2015-05-13 | 通过组合电流编码和尺寸编码来改善相位内插器的线性度 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9485084B2 (enExample) |
| EP (1) | EP3152834A1 (enExample) |
| JP (1) | JP2017526208A (enExample) |
| CN (1) | CN106464240A (enExample) |
| WO (1) | WO2015191214A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107689792A (zh) * | 2017-09-15 | 2018-02-13 | 北京华大九天软件有限公司 | 一种高线性低电压相位内插电路 |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI638522B (zh) * | 2016-11-02 | 2018-10-11 | 瑞昱半導體股份有限公司 | 相位調整電路與控制方法 |
| CN113014252B (zh) * | 2016-11-11 | 2024-09-03 | 瑞昱半导体股份有限公司 | 相位调整电路、控制方法与测量方法 |
| US11558045B1 (en) * | 2021-06-29 | 2023-01-17 | International Business Machines Corporation | Phase rotator |
| KR20230047824A (ko) | 2021-10-01 | 2023-04-10 | 삼성전자주식회사 | 클록 데이터 복원 회로 및 이를 포함하는 장치 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1761184A (zh) * | 2004-10-12 | 2006-04-19 | 美国博通公司 | 高速时钟和数据恢复系统 |
| US7994837B1 (en) * | 2009-08-07 | 2011-08-09 | Altera Corporation | Techniques for phase interpolation |
| CN103795404A (zh) * | 2012-10-31 | 2014-05-14 | 中兴通讯股份有限公司 | 一种相位插值器电路及相位插值信号处理方法 |
| US8786346B2 (en) * | 2012-02-15 | 2014-07-22 | Megachips Corporation | Phase interpolator and method of phase interpolation with reduced phase error |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6133773A (en) * | 1997-10-10 | 2000-10-17 | Rambus Inc | Variable delay element |
| US7180352B2 (en) | 2001-06-28 | 2007-02-20 | Intel Corporation | Clock recovery using clock phase interpolator |
| US6922109B2 (en) | 2002-04-01 | 2005-07-26 | Broadcom Corporation | Multiple synthesized clocks with fractional PPM control from a single clock source |
| US7266169B2 (en) | 2002-09-13 | 2007-09-04 | Broadcom Corporation | Phase interpolater and applications thereof |
| GB0413071D0 (en) * | 2004-06-12 | 2004-07-14 | Texas Instruments Ltd | Triangulating phase interpolator |
| US7298195B2 (en) | 2005-03-31 | 2007-11-20 | Agere Systems Inc. | Methods and apparatus for improved phase switching and linearity in an analog phase interpolator |
| DE102006023695B4 (de) * | 2006-05-19 | 2010-04-08 | Xignal Technologies Ag | Verfahren und Schaltungsanordnung zur Erzeugung eines periodischen elektrischen Signals mit steuerbarer Phase |
| US7961025B2 (en) | 2008-01-31 | 2011-06-14 | International Business Machines Corporation | Current-mode phase rotator with partial phase switching |
| US7750707B2 (en) | 2008-03-17 | 2010-07-06 | Broadcom Corporation | High-resolution low-interconnect phase rotator |
| US7928788B2 (en) | 2008-07-31 | 2011-04-19 | Freescale Semiconductor, Inc. | Double-balanced sinusoidal mixing phase interpolator circuit and method |
| TW201315155A (zh) | 2011-09-20 | 2013-04-01 | Sunplus Technology Co Ltd | 相位內插電路 |
| JP2013201693A (ja) * | 2012-03-26 | 2013-10-03 | Toshiba Corp | 位相補間器および位相補間方法 |
-
2014
- 2014-06-09 US US14/300,127 patent/US9485084B2/en active Active
-
2015
- 2015-05-13 WO PCT/US2015/030644 patent/WO2015191214A1/en not_active Ceased
- 2015-05-13 JP JP2016571694A patent/JP2017526208A/ja not_active Ceased
- 2015-05-13 EP EP15726448.2A patent/EP3152834A1/en not_active Withdrawn
- 2015-05-13 CN CN201580030405.2A patent/CN106464240A/zh active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1761184A (zh) * | 2004-10-12 | 2006-04-19 | 美国博通公司 | 高速时钟和数据恢复系统 |
| US7994837B1 (en) * | 2009-08-07 | 2011-08-09 | Altera Corporation | Techniques for phase interpolation |
| US8786346B2 (en) * | 2012-02-15 | 2014-07-22 | Megachips Corporation | Phase interpolator and method of phase interpolation with reduced phase error |
| CN103795404A (zh) * | 2012-10-31 | 2014-05-14 | 中兴通讯股份有限公司 | 一种相位插值器电路及相位插值信号处理方法 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107689792A (zh) * | 2017-09-15 | 2018-02-13 | 北京华大九天软件有限公司 | 一种高线性低电压相位内插电路 |
| CN107689792B (zh) * | 2017-09-15 | 2020-04-07 | 北京华大九天软件有限公司 | 一种高线性低电压相位内插电路 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3152834A1 (en) | 2017-04-12 |
| WO2015191214A1 (en) | 2015-12-17 |
| JP2017526208A (ja) | 2017-09-07 |
| US9485084B2 (en) | 2016-11-01 |
| US20150358148A1 (en) | 2015-12-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20170222 |