CN106372589A - Synchronous-adjusting signal processing system for cruise device based on self-sensing technology - Google Patents
Synchronous-adjusting signal processing system for cruise device based on self-sensing technology Download PDFInfo
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- CN106372589A CN106372589A CN201610763971.0A CN201610763971A CN106372589A CN 106372589 A CN106372589 A CN 106372589A CN 201610763971 A CN201610763971 A CN 201610763971A CN 106372589 A CN106372589 A CN 106372589A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V20/00—Scenes; Scene-specific elements
- G06V20/50—Context or environment of the image
- G06V20/56—Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V10/00—Arrangements for image or video recognition or understanding
- G06V10/20—Image preprocessing
- G06V10/30—Noise filtering
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Abstract
The invention discloses a synchronous-adjusting signal processing system for a cruise device based on self-sensing technology. The system is mainly formed by a processing chip U, an infrared camera WS, a field-effect tube MOS1, a triode VT3, a polar capacitor C8, an image signal pretreatment circuit, a synchronous signal adjusting circuit connected in series between the image signal pretreatment circuit and PIN pin of the processing chip U, and an output signal amplification circuit connected with the PIUT pin and SCLK pin of the processing chip U and the emitting electrode of the triode VT3. The system can eliminate or suppress low-frequency interference signals in picture signals, and can also amplify the phase and frequency of each image data signal in the image data signals, thereby improving image signal processing effect, and ensuring accuracy of the image data signals received by a satellite positioning system.
Description
Technical field
The present invention relates to a kind of processing system, specifically refer to a kind of based on the cruising device synchronization control from cognition technology
Type signal processing system.
Background technology
Vehicle is the indispensable vehicles of today's society, and the vehicle growing with each passing day also brings the road becoming increasingly conspicuous
The problems such as congestion, Frequent Accidents, energy waste, air pollution.With the development of the technology such as the Internet, Internet of Things, polynary self-induction
Know arising at the historic moment of technology, its integrated application wisdom sensing, communication network, the technology such as embedded.This polynary from cognition technology mesh
Before must be widely used in automobile complete perception and process are carried out to vehicle condition and Traffic Information, realize people and car, Che Yuyun,
Car is interacted with multidimensional such as cars, makes vehicle and traffic administration more intelligent.Wherein, polynary from the Cruising device for car of cognition technology it is
High-end automobile uses most intelligent apparatus at present, and this intelligent apparatus can pass through the road to vehicle heading for the infrared pick-up head
Face situation is acquired, and passes technical transmission using Internet of Things after picture signal being processed by image-signal processing system
To global position system, global position system then passes through communication network provides automatic cruising for driver.
However, existing exist at signal based on from the cruising device synchronization control type signal processing system of cognition technology
Reason effect is poor, leads to the viewdata signal that global position system obtains inaccurate, causes cruising device can not be vapour well
Car is cruised, thus serious have impact on road traffic safety.
Therefore it provides a kind of can improve picture signal treatment effect based on from the same step of the cruising device of cognition technology
Integer signal processing system then seem excellent for important.
Content of the invention
It is an object of the invention to overcome existing based on the cruising device from cognition technology with synchronization control type signal at
Reason system exist signal processing effect difference defect, the present invention provide a kind of based on from the same step of the cruising device of cognition technology
Integer signal processing system.
The present invention is achieved through the following technical solutions: based on the cruising device synchronization control type signal from cognition technology
Processing system, mainly by process chip u, infrared pick-up head ws, field effect transistor mos1, audion vt3, positive pole is after resistance r6
Be connected with the drain electrode of field effect transistor mos1, polar capacitor c6 that negative pole is connected with the sclk pin of process chip u, p pole with
The diode d3 that the grid of field effect transistor mos1 is connected, n pole is connected with the sclk pin of process chip u after resistance r7,
The polar capacitor c7 that positive pole is connected with the source electrode of field effect transistor mos1, negative pole is connected with the pin pin of process chip u, p pole
Be connected with the sdi pin of process chip u, diode d4 that n pole is connected with the shd pin of process chip u after resistance r8,
The polar capacitor c8 that negative pole is connected with the shp pin of process chip u, positive pole is connected with the base stage of audion vt3, respectively with
The picture signal pretreatment circuit that the vc pin of process chip u and infrared pick-up head ws are connected, is serially connected in picture signal
Synchronizing signal adjustment circuit between the pin pin of pretreatment circuit and process chip u, and respectively with process chip u
The output signal amplification circuit composition that piut pin is connected with the emitter stage of sclk pin and audion vt3；Described process
It is grounded after the sdi pin of chip u is also connected with pin pin, its shd pin is also connected with shp pin；Described field effect transistor
The grounded drain of mos1；The colelctor electrode of described audion vt3 is connected with the rst pin of process chip u；Described process chip u
Vc pin be connected with outside 12v DC source.
Further, described synchronizing signal adjustment circuit is by audion vt6, audion vt8, audion vt9, audion
Vt10, positive pole is connected with the base stage of audion vt7 after resistance r17, the polar capacitor c13 of minus earth, and positive pole is through resistance
Be connected with the negative pole of polar capacitor c13 after r16, the polar capacitor c14 of minus earth, the colelctor electrode phase of n pole and audion vt7
The base stage of the diode d8 that connection, p pole are connected with the negative pole of polar capacitor c13 after resistance r18, positive pole and audion vt7
Be connected, polar capacitor c15 that negative pole is connected with the emitter stage of audion vt7 after resistance r19, positive pole is with diode d8's
The polar capacitor c16 that p pole is connected, negative pole is connected with the base stage of audion vt8, p pole after resistance r20 with audion vt8
Emitter stage be connected, diode d9 that n pole is connected with the negative pole of polar capacitor c15, one end is extremely connected with the n of diode d9
Connect, the other end be connected with the emitter stage of audion vt9 after ground connection resistance r21, positive pole after resistance r22 with audion vt10
Colelctor electrode be connected, polar capacitor c17 that negative pole is connected with the colelctor electrode of audion vt9, the collection of p pole and audion vt9
The diode d10 that electrode is connected, n pole is connected with the base stage of audion vt10, and the transmitting of one end and audion vt10
Pole is connected, the resistance r23 composition of other end ground connection；The positive pole of described polar capacitor c14 is also connected with the base stage of audion vt7
Connect；The base stage of described audion vt7 is connected with picture signal pretreatment circuit；The colelctor electrode of described audion vt8 respectively with
The negative pole of polar capacitor c13 is connected with the positive pole of polar capacitor c17；The base stage of described audion vt9 and the p pole of diode d9
It is connected；The positive pole of described polar capacitor c17 is also connected with the pin pin of process chip u.
, by amplifier p1, audion vt1, audion vt2, positive pole is with amplifier p1's for described image signal pre-processing circuit
The polar capacitor c2 that positive pole is connected, negative pole is connected with the signal output level of infrared pick-up head ws, one end and amplifier p1
Negative pole be connected, resistance r3 that the other end is connected with the base stage of audion vt1, positive pole is connected with the negative pole of amplifier p1
Connect, polar capacitor c4 that negative pole is connected with the base stage of audion vt1, negative pole is connected with the negative pole of amplifier p1, positive pole with
The polar capacitor c5 that the base stage of audion vt2 is connected, n pole is connected with the negative pole of amplifier p1 after resistance r4, p pole is through electricity
The diode d2 being connected with the base stage of audion vt2 after resistance r5, positive pole is connected with the outfan of amplifier p1, negative pole and three
The polar capacitor c3 that the emitter stage of pole pipe vt2 is connected, p pole is connected with the positive pole of amplifier p1 after resistance r2, n pole and pole
The diode d1 that the negative pole of property electric capacity c3 is connected, negative pole is connected with the positive pole of amplifier p1, positive pole is after adjustable resistance r1
The polar capacitor c1 being connected with the n pole of diode d1, and one end be connected with the anelectrode of amplifier p1, the other end and place
The inductance l1 composition that the vc pin of reason chip u is connected；The negative electrode ground connection of described amplifier p1；The collection of described audion vt1
Electrode ground connection, its emitter stage are connected with the n pole of diode d2；The grounded collector of described audion vt2, its emitter stage also with
The positive pole of polar capacitor c17 is connected.
Described signal output amplifying circuit, by field effect transistor mos2, audion vt4, audion vt5, audion vt6, amplifies
Device p2, positive pole is connected with the emitter stage of audion vt6 after resistance r13, negative pole positive pole with amplifier p2 after inductance l2
The polar capacitor c11 being connected, p pole is connected with the base stage of audion vt6, n pole negative pole with amplifier p2 after resistance r14
The diode d7 being connected, positive pole is connected with the colelctor electrode of audion vt6 after resistance r15, negative pole and amplifier p2 negative
Pole be connected after ground connection polar capacitor c12, positive pole is connected with the emitter stage of audion vt4 after resistance r10, negative pole with put
The polar capacitor c10 that the outfan of big device p2 is connected, one end is connected with the outfan of amplifier p2, the other end and polarity are electric
Hold the adjustable resistance r12 that is connected of negative pole of c11, p pole is connected with the colelctor electrode of audion vt5 after resistance r11, n pole with
The diode d6 that the negative pole of polar capacitor c11 is connected, negative pole is connected with the source electrode of field effect transistor mos2, positive pole and audion
The polar capacitor c9 that the base stage of vt4 is connected, p pole is connected with the sclk pin of process chip u, n pole and field effect transistor mos2
Source electrode be connected after ground connection diode d5, and one end be connected with the colelctor electrode of audion vt4, the other end be grounded electricity
Resistance r9 composition；The drain electrode of described field effect transistor mos2 is connected with the sclk pin of process chip u, its grid and audion vt5
Emitter stage be connected；The colelctor electrode of described audion vt5 is also connected with the emitter stage of audion vt6, its base stage and process
The pout pin of chip u is connected；The emitter stage of described audion vt6 is also connected with the emitter stage of audion vt3；Described three
The emitter stage of pole pipe vt4 is also connected with the n pole of diode d6；The outfan of described amplifier p2 amplifies electricity as signal output
The outfan on road.
For the practical effect of the present invention, described process chip u then preferentially employs xrd4460 integrated chip and comes in fact
Existing.
The present invention compared with prior art has advantages below and a beneficial effect:
(1) present invention can be eliminated to the low-frequency interference signal in picture signal or be suppressed, and can be to anti-interference process
Image frequency afterwards is amplified, and makes the frequency of image more steady；And the present invention can also be to the image in viewdata signal
The phase and frequency of data signal is amplified, thus improve the effect that the present invention is processed to picture signal, effectively guarantees
The accuracy of the viewdata signal that global position system receives, enables the cruising device be cruised for automobile well, from
And ensure that road traffic safety.
(2) present invention can be adjusted to the row vibration in picture signal and field oscillation and field fractional frequency signal, makes them
Frequency consistent with input signal with phase place, ensure that the accuracy that the present invention is processed to picture signal.
(3) process chip u of the present invention then preferentially to be realized using xrd4460 integrated chip of knowing clearly, this chip with periphery
Circuit combines, and can effectively improve stability and the reliability of the present invention.
Brief description
Fig. 1 is the overall structure diagram of the present invention.
Fig. 2 is the electrical block diagram of the synchronizing signal adjustment circuit of the present invention.
Specific embodiment
With reference to embodiment, the present invention is described in further detail, but embodiments of the present invention not limited to this.
As shown in figure 1, the present invention is mainly by process chip u, infrared pick-up head ws, field effect transistor mos1, audion
Vt3, resistance r6, resistance r7, resistance r8, polar capacitor c6, polar capacitor c7, polar capacitor c8, diode d3, diode d4,
Synchronizing signal adjustment circuit, picture signal pretreatment circuit, and output signal amplification circuit composition.
During connection, the positive pole of polar capacitor c6 is connected with the drain electrode of field effect transistor mos1 after resistance r6, negative pole and place
The sclk pin of reason chip u is connected.The p pole of diode d3 is connected with the grid of field effect transistor mos1, and n pole is after resistance r7
It is connected with the sclk pin of process chip u.The positive pole of polar capacitor c7 is connected with the source electrode of field effect transistor mos1, negative pole with
The pin pin of process chip u is connected.
Meanwhile, the p pole of diode d4 is connected with the sdi pin of process chip u, n pole after resistance r8 with process chip u
Shd pin be connected.The negative pole of polar capacitor c8 is connected with the shp pin of process chip u, and positive pole is with audion vt3's
Base stage is connected.Picture signal pretreatment circuit is connected with the vc pin of process chip u and infrared pick-up head ws respectively.
Synchronizing signal adjustment circuit is serially connected between picture signal pretreatment circuit and the pin pin of process chip u.Output signal is amplified
Circuit is connected with the piut pin of process chip u and the emitter stage of sclk pin and audion vt3 respectively.
After the sdi pin of described process chip u is also connected with pin pin, its shd pin is also connected with shp pin
Ground connection；The grounded drain of described field effect transistor mos1；The colelctor electrode of described audion vt3 is connected with the rst pin of process chip u
Connect；The vc pin of described process chip u is connected with outside 12v DC source.
During enforcement, for the practical effect of the present invention, it is integrated that described process chip u then preferentially employs xrd4460
Realizing, this xrd4460 integrated chip is image signal processing chip to chip.Described infrared pick-up head ws then preferentially adopts
The beautiful stm-798 infrared pick-up head of Saite is realizing.Meanwhile, described field effect transistor mos1, audion vt3, resistance r6,
Resistance r7, resistance r8, polar capacitor c6, polar capacitor c7, polar capacitor c8, diode d3 and diode d4 then define demagnetization
Circuit, this circuit can be eliminated to the electromagnetic interference signal of process chip u periphery or be suppressed, and make process chip u to image
Extraneous electromagnetic interference will not be subject to when signal is processed, effectively raise the accuracy to signal processing for process chip u.
The outfan of described output signal amplification circuit then passes through the wireless signal transmitter of data wire and cruising device when implementing
Signal input part be connected.
Further, described image signal pre-processing circuit is by amplifier p1, audion vt1, audion vt2, adjustable electric
Resistance r1, resistance r2, resistance r3, resistance r4, resistance r5, polar capacitor c1, polar capacitor c2, polar capacitor c3, polar capacitor c4,
Polar capacitor c5, diode d1, and diode d2 form.
During connection, the positive pole of polar capacitor c2 is connected with the positive pole of amplifier p1, and negative pole is with infrared pick-up head ws's
Signal output level is connected.One end of resistance r3 is connected with the negative pole of amplifier p1, the base stage phase of the other end and audion vt1
Connect.The positive pole of polar capacitor c4 is connected with the negative pole of amplifier p1, and negative pole is connected with the base stage of audion vt1.Polarity
The negative pole of electric capacity c5 is connected with the negative pole of amplifier p1, and positive pole is connected with the base stage of audion vt2.The n pole of diode d2
It is connected with the negative pole of amplifier p1 after resistance r4, p pole is connected with the base stage of audion vt2 after resistance r5.
Meanwhile, the positive pole of polar capacitor c3 is connected with the outfan of amplifier p1, the emitter stage of negative pole and audion vt2
It is connected.The p pole of diode d1 is connected with the positive pole of amplifier p1 after resistance r2, the negative pole phase of n pole and polar capacitor c3
Connect.The negative pole of polar capacitor c1 is connected with the positive pole of amplifier p1, positive pole n pole with diode d1 after adjustable resistance r1
It is connected.One end of inductance l1 is connected with the anelectrode of amplifier p1, and the other end is connected with the vc pin of process chip u.
The negative electrode ground connection of described amplifier p1；The grounded collector of described audion vt1, its emitter stage and diode d2
N pole be connected；The grounded collector of described audion vt2, its emitter stage is also connected with the positive pole of polar capacitor c17.
Further, described signal output amplifying circuit is by field effect transistor mos2, audion vt4, audion vt5, and three
Pole pipe vt6, amplifier p2, resistance r9, resistance r10, resistance r11, adjustable resistance r12, resistance r13, resistance r14, resistance r15,
Polar capacitor c9, polar capacitor c10, polar capacitor c11, polar capacitor c12, diode d5, diode d6, diode d7, with
And inductance l2 composition.
During connection, the positive pole of polar capacitor c11 is connected with the emitter stage of audion vt6 after resistance r13, and negative pole is through electricity
It is connected with the positive pole of amplifier p2 after sense l2.The p pole of diode d7 is connected with the base stage of audion vt6, and n pole is through resistance
It is connected with the negative pole of amplifier p2 after r14.The positive pole of polar capacitor c12 colelctor electrode phase with audion vt6 after resistance r15
Connect, negative pole is grounded after being connected with the negative pole of amplifier p2.The positive pole of polar capacitor c10 after resistance r10 with audion vt4
Emitter stage be connected, negative pole is connected with the outfan of amplifier p2.
Meanwhile, one end of adjustable resistance r12 is connected with the outfan of amplifier p2, and the other end is with polar capacitor c11's
Negative pole is connected.The p pole of diode d6 is connected with the colelctor electrode of audion vt5 after resistance r11, n pole and polar capacitor c11
Negative pole be connected.The negative pole of polar capacitor c9 is connected with the source electrode of field effect transistor mos2, the base stage of positive pole and audion vt4
It is connected.The p pole of diode d5 is connected with the sclk pin of process chip u, and n pole is connected with the source electrode of field effect transistor mos2
After be grounded.One end of resistance r9 is connected with the colelctor electrode of audion vt4, and the other end is grounded.
The drain electrode of described field effect transistor mos2 is connected with the sclk pin of process chip u, and its grid is with audion vt5's
Emitter stage is connected；The colelctor electrode of described audion vt5 is also connected with the emitter stage of audion vt6, its base stage with process core
The pout pin of piece u is connected；The emitter stage of described audion vt6 is also connected with the emitter stage of audion vt3；Described three poles
The emitter stage of pipe vt4 is also connected with the n pole of diode d6；The outfan of described amplifier p2 is as signal output amplifying circuit
Outfan and be then connected with the signal input part of the wireless signal transmitter of cruising device by data wire.
As shown in Fig. 2 described synchronizing signal adjustment circuit is by audion vt7, audion vt8, audion vt9, audion
Vt10, resistance r16, resistance r17, resistance r18, resistance r19, resistance r20, resistance r21, resistance r22, resistance r23, polar capacitor
C13, polar capacitor c14, polar capacitor c15, polar capacitor c16, polar capacitor c17, diode d8, diode d9, and two
Pole pipe d10 forms.
During connection, the positive pole of polar capacitor c13 is connected with the base stage of audion vt7 after resistance r17, minus earth.
The positive pole of polar capacitor c14 is connected with the negative pole of polar capacitor c13 after resistance r16, minus earth.The n pole of diode d8
It is connected with the colelctor electrode of audion vt7, p pole is connected with the negative pole of polar capacitor c13 after resistance r18.Polar capacitor c15
Positive pole be connected with the base stage of audion vt7, negative pole is connected with the emitter stage of audion vt7 after resistance r19.
Wherein, the positive pole of polar capacitor c16 is connected with the p pole of diode d8, and negative pole is connected with the base stage of audion vt8
Connect.The p pole of diode d9 is connected with the emitter stage of audion vt8 after resistance r20, the negative pole phase of n pole and polar capacitor c15
Connect.One end of resistance r21 is connected with the n pole of diode d9, and the other end is connected with the emitter stage of audion vt9 and is followed by
Ground.
Meanwhile, the positive pole of polar capacitor c17 is connected with the colelctor electrode of audion vt10 after resistance r22, negative pole and three
The colelctor electrode of pole pipe vt9 is connected.The p pole of diode d10 is connected with the colelctor electrode of audion vt9, n pole and audion vt10
Base stage be connected.One end of resistance r23 is connected with the emitter stage of audion vt10, and the other end is grounded.
The positive pole of described polar capacitor c14 is also connected with the base stage of audion vt7；The base stage of described audion vt7 with
Picture signal pretreatment circuit is connected；The colelctor electrode of described audion vt8 negative pole and the polarity electricity with polar capacitor c13 respectively
The positive pole holding c17 is connected；The base stage of described audion vt9 is connected with the p pole of diode d9；Described polar capacitor c17's
Positive pole is also connected with the pin pin of process chip u.
During operation, the polar capacitor c1 in the picture signal pretreatment circuit of this image-signal processing system, polar capacitor
The filter circuit that c2, adjustable resistance r1, resistance r2 and diode d1 are formed can be carried out to the low-frequency interference signal in picture signal
Eliminate or suppress；Three fortune amplifying circuits of amplifier p1, audion vt1 and audion vt2 formation are then believed to filtered image
Number image frequency be amplified, make the frequency of image more steady.Meanwhile, the signal output of this image-signal processing system is amplified
The low frequency that audion vt4 in circuit, polar capacitor c9, polar capacitor c10, diode d6 and audion vt5 are formed amplifies electricity
Road, the low-frequency amplifier circuit that amplifier p2, polar capacitor c11, audion vt6 and polar capacitor c12 are formed, low frequency amplifies electricity
Road and low-frequency amplifier circuit together form signal output amplifying circuit, and this signal output amplifying circuit can be to viewdata signal
In the phase and frequency of viewdata signal be amplified, thus improve the effect that the present invention is processed to picture signal, have
The accuracy of the viewdata signal that ensure that global position system reception of effect, enables cruising device to carry out for automobile well
Cruise, ensures that road traffic safety.
Wherein, in order to be able to be adjusted to the row vibration in picture signal and field oscillation and field fractional frequency signal, them are made
Frequency consistent with input signal with phase place, the present invention is between picture signal pretreatment circuit and the pin pin of process chip u
It is provided with synchronizing signal adjustment circuit.The picture signal that this synchronizing signal adjustment circuit receives passes through isolation resistance r16, polarity electricity
Hold c13, diode d8 is added in the base stage of audion vt7.In non-plus signal, audion vt7 ends, when lock-out pulse arrives
When, diode d8, audion vt7 are both turned on, and polar capacitor c13 is electrically charged, because charge constant is little, polar capacitor c13
On be filled with voltage close to lock-out pulse amplitude.After the synchronous head past, polar capacitor c13 discharges through resistance r17, time constant
Larger and discharge very slow, so the reverse bias for audion vt7 are existed on polar capacitor c13.It makes audion
Vt7 keeps ending during scan(ing) stroke, thus audion vt7 colelctor electrode isolates the row of negative polarity, the synchronization of field composite signal
Pulse, and automatically the row vibration in signal and field oscillation and field fractional frequency signal are adjusted, make their frequency and phase place
Consistent with input signal.
Meanwhile, process chip u of the present invention then preferentially to be realized using xrd4460 integrated chip of knowing clearly, and this chip is with outward
Enclose circuit to combine, can effectively improve stability and the reliability of the present invention.
As described above, just can be very good to realize the present invention.
Claims (5)
1. based on the cruising device synchronization control type signal processing system from cognition technology, mainly by process chip u, infrared ray
Photographic head ws, field effect transistor mos1, audion vt3, positive pole is connected with the drain electrode of field effect transistor mos1 after resistance r6, negative pole
The polar capacitor c6 being connected with the sclk pin of process chip u, p pole is connected with the grid of field effect transistor mos1, n pole is through electricity
The diode d3 being connected with the sclk pin of process chip u after resistance r7, positive pole is connected with the source electrode of field effect transistor mos1, bears
The polar capacitor c7 that pole is connected with the pin pin of process chip u, p pole is connected with the sdi pin of process chip u, n pole warp
The diode d4 being connected with the shd pin of process chip u after resistance r8, negative pole is connected with the shp pin of process chip u,
The polar capacitor c8 that positive pole is connected with the base stage of audion vt3, vc pin and the infrared pick-up with process chip u respectively
The head picture signal pretreatment circuit that is connected of ws, be serially connected in picture signal pretreatment circuit and process chip u pin pin it
Between synchronizing signal adjustment circuit, and respectively with the sending out of the piut pin of process chip u and sclk pin and audion vt3
The output signal amplification circuit composition that emitter-base bandgap grading is connected；The sdi pin of described process chip u is also connected with pin pin, it
Shd pin is grounded after being also connected with shp pin；The grounded drain of described field effect transistor mos1；The current collection of described audion vt3
Pole is connected with the rst pin of process chip u；The vc pin of described process chip u is connected with outside 12v DC source.
2. according to claim 1 based on the cruising device synchronization control type signal processing system from cognition technology, its
It is characterised by, described synchronizing signal adjustment circuit is by audion vt6, audion vt8, audion vt9, audion vt10, positive pole
Be connected with the base stage of audion vt7 after resistance r17, the polar capacitor c13 of minus earth, positive pole after resistance r16 with pole
The negative pole of property electric capacity c13 is connected, the polar capacitor c14 of minus earth, and n pole is connected with the colelctor electrode of audion vt7, p pole
The diode d8 being connected with the negative pole of polar capacitor c13 after resistance r18, positive pole is connected with the base stage of audion vt7, bears
The polar capacitor c15 that pole is connected with the emitter stage of audion vt7 after resistance r19, positive pole is extremely connected with the p of diode d8
Connect, polar capacitor c16 that negative pole is connected with the base stage of audion vt8, p pole emitter stage with audion vt8 after resistance r20
Be connected, diode d9 that n pole is connected with the negative pole of polar capacitor c15, one end is connected with the n pole of diode d9, another
The resistance r21 that end is grounded after being connected with the emitter stage of audion vt9, positive pole current collection with audion vt10 after resistance r22
The polar capacitor c17 that pole is connected, negative pole is connected with the colelctor electrode of audion vt9, the colelctor electrode phase of p pole and audion vt9
Connect, the diode d10 that is connected with the base stage of audion vt10 of n pole, and one end is connected with the emitter stage of audion vt10
Connect, the resistance r23 of other end ground connection forms；The positive pole of described polar capacitor c14 is also connected with the base stage of audion vt7；Institute
The base stage stating audion vt7 is connected with picture signal pretreatment circuit；The colelctor electrode of described audion vt8 is electric with polarity respectively
The negative pole holding c13 is connected with the positive pole of polar capacitor c17；The base stage of described audion vt9 is extremely connected with the p of diode d9
Connect；The positive pole of described polar capacitor c17 is also connected with the pin pin of process chip u.
3. according to claim 2 based on the cruising device synchronization control type signal processing system from cognition technology, its
It is characterised by, described image signal pre-processing circuit is by amplifier p1, audion vt1, audion vt2, positive pole and amplifier p1
Positive pole be connected, polar capacitor c2, one end and amplifier that negative pole is connected with the signal output level of infrared pick-up head ws
The resistance r3 that the negative pole of p1 is connected, the other end is connected with the base stage of audion vt1, positive pole is connected with the negative pole of amplifier p1
Connect, polar capacitor c4 that negative pole is connected with the base stage of audion vt1, negative pole is connected with the negative pole of amplifier p1, positive pole with
The polar capacitor c5 that the base stage of audion vt2 is connected, n pole is connected with the negative pole of amplifier p1 after resistance r4, p pole is through electricity
The diode d2 being connected with the base stage of audion vt2 after resistance r5, positive pole is connected with the outfan of amplifier p1, negative pole and three
The polar capacitor c3 that the emitter stage of pole pipe vt2 is connected, p pole is connected with the positive pole of amplifier p1 after resistance r2, n pole and pole
The diode d1 that the negative pole of property electric capacity c3 is connected, negative pole is connected with the positive pole of amplifier p1, positive pole is after adjustable resistance r1
The polar capacitor c1 being connected with the n pole of diode d1, and one end be connected with the anelectrode of amplifier p1, the other end and place
The inductance l1 composition that the vc pin of reason chip u is connected；The negative electrode ground connection of described amplifier p1；The collection of described audion vt1
Electrode ground connection, its emitter stage are connected with the n pole of diode d2；The grounded collector of described audion vt2, its emitter stage also with
The positive pole of polar capacitor c17 is connected.
4. according to claim 3 based on the cruising device synchronization control type signal processing system from cognition technology, its
It is characterised by, described signal output amplifying circuit, by field effect transistor mos2, audion vt4, audion vt5, audion vt6, is put
Big device p2, positive pole is connected with the emitter stage of audion vt6 after resistance r13, negative pole after inductance l2 with amplifier p2 just
The polar capacitor c11 that pole is connected, p pole is connected with the base stage of audion vt6, n pole is negative with amplifier p2 after resistance r14
The diode d7 that pole is connected, positive pole is connected with the colelctor electrode of audion vt6 after resistance r15, negative pole and amplifier p2
Negative pole be connected after ground connection polar capacitor c12, positive pole is connected with the emitter stage of audion vt4 after resistance r10, negative pole with
The polar capacitor c10 that the outfan of amplifier p2 is connected, one end is connected with the outfan of amplifier p2, the other end and polarity
The adjustable resistance r12 that the negative pole of electric capacity c11 is connected, p pole is connected with the colelctor electrode of audion vt5 after resistance r11, n pole
The diode d6 being connected with the negative pole of polar capacitor c11, negative pole is connected with the source electrode of field effect transistor mos2, positive pole and three poles
The polar capacitor c9 that the base stage of pipe vt4 is connected, p pole is connected with the sclk pin of process chip u, n pole and field effect transistor
The diode d5 that the source electrode of mos2 is grounded after being connected, and one end is connected with the colelctor electrode of audion vt4, the other end is grounded
Resistance r9 composition；The drain electrode of described field effect transistor mos2 is connected with the sclk pin of process chip u, its grid and audion
The emitter stage of vt5 is connected；The colelctor electrode of described audion vt5 is also connected with the emitter stage of audion vt6, its base stage and place
The pout pin of reason chip u is connected；The emitter stage of described audion vt6 is also connected with the emitter stage of audion vt3；Described
The emitter stage of audion vt4 is also connected with the n pole of diode d6；The outfan of described amplifier p2 amplifies as signal output
The outfan of circuit.
5. according to claim 4 based on the cruising device synchronization control type signal processing system from cognition technology, its
It is characterised by, described process chip u is xrd4460 integrated chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610763971.0A CN106372589A (en) | 2016-08-30 | 2016-08-30 | Synchronous-adjusting signal processing system for cruise device based on self-sensing technology |
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| CN201610763971.0A CN106372589A (en) | 2016-08-30 | 2016-08-30 | Synchronous-adjusting signal processing system for cruise device based on self-sensing technology |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110557609A (en) * | 2019-08-27 | 2019-12-10 | 北京戴纳实验科技有限公司 | tracking type experimental process multi-angle automatic recording equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110557609A (en) * | 2019-08-27 | 2019-12-10 | 北京戴纳实验科技有限公司 | tracking type experimental process multi-angle automatic recording equipment |
| CN110557609B (en) * | 2019-08-27 | 2021-02-02 | 北京戴纳实验科技有限公司 | Tracking type experimental process multi-angle automatic recording equipment |
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