CN104700351A - High-precision image processing system based on image coding processing - Google Patents
High-precision image processing system based on image coding processing Download PDFInfo
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Abstract
The invention discloses a high-precision image processing system based on image coding processing. The high-precision image processing system based on the image coding processing comprises an image gatherer (1), a signal noise reduction processing module (3), a signal correction module (4) connected with the signal noise reduction processing module (3), a signal conversion module (5) connected with the signal correction module (4), a signal amplification module (6) connected with the signal conversion module (5), a signal identification module (7) connected with the signal amplification module (6), and a storage module (8) and a display module (9) connected with the signal identification module (7), wherein an image coding processing module (2) is arranged between the image gatherer (1) and signal noise reduction processing module (3). According to the high-precision image processing system based on the image coding processing, image data can be compressed through the image coding processing module, the conveying speed of the compressed signal data is faster, and the processing speed of the image processing system is improved by 30%.
Description
Technical field
The present invention relates to a kind of image processing system, specifically refer to a kind of high-precision image processing system based on Image Coding process.
Background technology
At present, along with the technical development of face identification system, face face texture is as the open-authentication information of gate control system, and it is because there is the feature of non-reproduction and uniqueness to be widely used by people.Face identification system needs to process collected facial image in face recognition process, so that can identify to introduction personnel more accurately.But when needing view data to be processed very huge, the processing speed of traditional image processing system is very slow, and efficiency is very low, cannot catch up with current people efficiently, rhythm of life fast.
Summary of the invention
The object of the invention is to overcome slow, the inefficient defect of current image processing system processing speed, a kind of high-precision image processing system based on Image Coding process is provided.
The following technical scheme of object of the present invention realizes: a kind of high-precision image processing system based on Image Coding process, comprise image acquisition device, signal de-noising processing module, the signal-corecting module be connected with signal de-noising processing module, the signal conversion module be connected with signal-corecting module, the signal amplification module be connected with signal conversion module, the Signal analysis module be connected with signal amplification module, and the memory module be connected with Signal analysis module and display module; Image Coding processing module is also provided with between image acquisition device and signal de-noising processing module.
Further, described Image Coding processing module is by process chip U2, triode VT8, triode VT9, triode VT10, amplifier P1, N pole is ground connection after electric capacity C16, the diode D11 that P pole is connected with the THRE pin of process chip U2 after resistance R25, one end is connected with the COMP pin of process chip U2, the resistance R26 of other end ground connection, N pole is connected with the C-R pin of process chip U2, the diode D10 that P pole is connected with the base stage of triode VT9 after electric capacity C17, and negative pole is connected with the base stage of triode VT10, the electric capacity C18 that positive pole is connected with the emitter of triode VT9 after resistance R27 forms, the positive pole of described amplifier P1 is connected with the tie point of electric capacity C18 with resistance R27, minus earth, output terminal is connected with the base stage of triode VT10, the grounded collector of described triode VT10, base stage and emitter are all connected with the collector of triode VT9, the base stage of triode VT8 is connected with the R/C pin of process chip U2, grounded collector, emitter is connected with the N pole of diode D11, the VS pin of described process chip U2 is all connected with the P pole of diode D11 with COMP pin, ground connection while F-O pin and GND pin are all connected with the P pole of diode D10, C-O pin is connected with the base stage of triode VT9.
Described signal amplification module by triode VT6, triode VT7, unidirectional thyristor D8, negative pole is connected with the base stage of triode VT6, positive pole is as the electric capacity C12 of circuit one input end, one end is connected with the collector of triode VT7, the resistance R20 that the other end is connected with the emitter of triode VT6 after resistance R22 through resistance R21, one end is connected with the collector of triode VT7, the resistance R23 that the other end is connected with the collector of triode VT6, N pole is connected with the base stage of triode VT7, the diode D7 that P pole is connected with the collector of triode VT6, N pole is connected with the control pole of unidirectional thyristor D8 after electric capacity C14, the diode D9 that P pole is connected with the tie point of resistance R22 with resistance R21, positive pole is connected with the emitter of triode VT6, the electric capacity C13 that negative pole and the P of diode D9 are extremely connected, positive pole is connected with the collector of triode VT7, the electric capacity C15 that negative pole is connected with the N pole of diode D9 after resistance R24 forms, the base stage of described triode VT6 is connected with the tie point of resistance R21 with resistance R20, emitter is connected with the emitter of triode VT7, the emitter of triode VT7 is connected with the P pole of unidirectional thyristor D8, and the N pole of unidirectional thyristor D8 is connected with the tie point of resistance R24 with electric capacity C15.
Described signal conversion module by front end input circuit, the signaling conversion circuit be connected with front end input circuit, the driving circuit be connected with signaling conversion circuit, and the output circuit be connected with driving circuit forms.
Described front end input circuit is by triode VT1, Sheffer stroke gate Q1, Sheffer stroke gate Q2, one end is connected with the collector of triode VT1, the resistance R1 that the other end is connected with the negative pole of Sheffer stroke gate Q1, N pole is connected with the collector of triode VT1, the voltage stabilizing diode D1 that P pole is connected with signaling conversion circuit, one end is connected with the N pole of voltage stabilizing diode D1, the resistance R2 that the other end is connected with the P pole of voltage stabilizing diode D1 after resistance R3, one end is connected with the output terminal of Sheffer stroke gate Q2, the resistance R4 that the other end is connected with the P pole of voltage stabilizing diode D1, and positive pole is connected with the output terminal of Sheffer stroke gate Q2, the electric capacity C1 that negative pole is connected with signaling conversion circuit forms, the positive pole of described Sheffer stroke gate Q1 is connected with the tie point of resistance R3 with resistance R2, output terminal is connected with the base stage of triode VT1, and the emitter of triode VT1 is connected with signaling conversion circuit, base stage is connected with negative pole with the positive pole of Sheffer stroke gate Q2 simultaneously.
Described signaling conversion circuit is by triode VT2, amplifier P, the resistance R5 that one end is connected with the base stage of triode VT2, the other end is connected with the positive pole of amplifier P after electric capacity C3 through resistance R7, N pole is connected with the collector of triode VT2 after resistance R6, the voltage stabilizing diode D2 of P pole ground connection, the resistance R8 that one end is connected with the negative pole of amplifier P, the other end is connected with the emitter of triode VT2 after electric capacity C2, be serially connected in the resistance R9 between the negative pole of amplifier P and output terminal, and form with the electric capacity C4 that resistance R9 is in parallel; The base stage of described triode VT2 is connected with electric capacity C1, emitter is connected with the P pole of voltage stabilizing diode D1, the emitter of described triode VT1 is connected with the tie point of resistance R7 with resistance R5, the N pole of voltage stabilizing diode D2 is also connected with driving circuit, and the negative pole of amplifier P is simultaneously with the emitter of triode VT2 and driving circuit is connected, output terminal is then connected with driving circuit.
Described driving circuit is by driving chip U, triode VT3, N pole is connected with the output terminal of amplifier P, the diode D3 that P pole is connected with the negative pole of amplifier P after electric capacity C5, one end is connected with the P pole of diode D3, the diode D4 of P pole ground connection, one end is connected with the negative pole of amplifier P, the resistance R11 that the other end is connected with the RE pin of driving chip U, be serially connected in the resistance R10 between the COUT pin of driving chip U and TRI pin, P pole is connected with the negative pole of amplifier P, the diode D5 that N pole is connected with output circuit, positive pole is connected with the N pole of diode D5, the electric capacity C7 that negative pole is connected with output circuit, one end is connected with the N pole of diode D5, the other end is in turn through resistance R15 that resistance R14 is connected with the emitter of triode VT3 after resistance R13, one end is connected with the base stage of triode VT3, the resistance R12 that the other end is connected with the OUT pin of driving chip U, positive pole is connected with the COMP pin of driving chip U, the electric capacity C6 that negative pole is connected with the tie point of resistance R14 with N pole and the resistance R15 of diode D5 forms, described resistance R14 is connected with the negative pole of electric capacity C7 with the tie point of resistance R13, the collector of triode VT3 is connected with the P pole of diode D5, emitter is connected with the THR pin of driving chip U, and GND pin ground connection, the VCC pin of described driving chip U are connected with the N pole of voltage stabilizing diode D2.
Described output circuit is by transformer T, triode VT4, triode VT5, one end is connected with the N pole of diode D5, the resistance R16 that the other end is connected with the Same Name of Ends of transformer T former limit telefault L2, positive pole is connected with the Same Name of Ends of transformer T former limit telefault L2, the electric capacity C9 that negative pole is connected with the collector of triode VT4, the inductance L 1 be in parallel with electric capacity C9, positive pole is connected with the positive pole of electric capacity C9 after resistance R17, the electric capacity C8 that negative pole is connected with the negative pole of electric capacity C7, one end is connected with the emitter of triode VT4, the resistance R18 that the other end is connected with the negative pole of electric capacity C8, positive pole is connected with the non-same polarity of transformer T former limit telefault L3, the electric capacity C10 that negative pole is connected with triode VT5 emitter, one end is connected with the positive pole of electric capacity C9, the resistance R19 that the other end is connected with the non-same polarity of transformer T former limit telefault L3, P pole is connected with the non-same polarity of transformer T secondary inductance coil L4, the diode D6 that N pole is connected with the Same Name of Ends of transformer T secondary inductance coil L4 after electric capacity C11 forms, while the base stage of described triode VT5 is connected with the Same Name of Ends of transformer T former limit telefault L3, emitter is connected with the negative pole of electric capacity C8, ground connection, collector are connected with the non-same polarity of transformer T former limit telefault L2, and the base stage of described triode VT4 is connected with the positive pole of electric capacity C8.
Described process chip U2 is LM311 integrated circuit, and driving chip U is NE555 integrated circuit.
Described triode VT6 and triode VT7 is NPN type triode.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) the present invention can be compressed view data by the effect of Image Coding processing module, and the signal data transporting velocity after compression is faster, thus makes the processing speed of image processing system improve 30%;
(2) high fidelity of the present invention's all right holding signal while image signal data is compressed;
(3) the present invention makes image effect more clear by the effect of signal amplification module.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is Image Coding processing module electrical block diagram of the present invention;
Fig. 3 is signal amplification module electrical block diagram of the present invention;
Fig. 4 is signal conversion module electrical block diagram of the present invention.
Embodiment
Below in conjunction with specific embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, the present invention is by image acquisition device 1, the Image Coding processing module 2 be connected with image acquisition device 1, the signal de-noising processing module 3 be connected with Image Coding processing module 2, the signal-corecting module 4 be connected with signal de-noising processing module 3, the signal conversion module 5 be connected with signal-corecting module 4, the signal amplification module 6 be connected with signal conversion module 5, the Signal analysis module 7 be connected with signal amplification module 6, and the memory module 8 be connected with Signal analysis module 7 and display module 9 form.
Wherein, image acquisition device 1 is for gathering facial image signal, and it can be realized by existing video camera.The view data that Image Coding processing module 2 can collect image acquisition device 1 carries out distortionless compression, and the image data transmission speed after compression is faster.Signal de-noising processing module 3 then can suppress the noise that imaging device or external environment condition produce, and avoids the interference being subject to noise in image processing process.Signal-corecting module 4 can carry out nerve process to the image fault that system causes because of aberration, distortion, limited bandwidth etc.Signal conversion module 5 can be converted to electric signal gathering the signal come, and this electric signal carries out flowing to Signal analysis module 7 after amplification process through signal amplification module 6 and carries out Signal analysis.Electric signal after identification is transported to memory module 8 on the one hand and stores, and shows after then being changed by display module 9 on the other hand.
As shown in Figure 2, this Image Coding processing module 2 is by process chip U2, triode VT8, triode VT9, triode VT10, amplifier P1, N pole is ground connection after electric capacity C16, the diode D11 that P pole is connected with the THRE pin of process chip U2 after resistance R25, one end is connected with the COMP pin of process chip U2, the resistance R26 of other end ground connection, N pole is connected with the C-R pin of process chip U2, the diode D10 that P pole is connected with the base stage of triode VT9 after electric capacity C17, and negative pole is connected with the base stage of triode VT10, the electric capacity C18 that positive pole is connected with the emitter of triode VT9 after resistance R27 forms.The positive pole of described amplifier P1 is connected with the tie point of electric capacity C18 with resistance R27, minus earth, output terminal is connected with the base stage of triode VT10, the grounded collector of described triode VT10, base stage and emitter are all connected with the collector of triode VT9, the base stage of triode VT8 is connected with the R/C pin of process chip U2, grounded collector, emitter is connected with the N pole of diode D11, the VS pin of described process chip U2 is all connected with the P pole of diode D11 with COMP pin, ground connection while F-O pin and GND pin are all connected with the P pole of diode D10, C-O pin is connected with the base stage of triode VT9, VS pin also connects outside 15V voltage.Through Image Coding processing module 2 compress after view data can keep very high fidelity, this process chip U2 is preferably LM311 integrated circuit to realize, and its reaction velocity is fast, and response speed is 200ns.
As shown in Figure 3, this signal amplification module 6, by triode VT6, triode VT7, unidirectional thyristor D8, negative pole is connected with the base stage of triode VT6, positive pole is as the electric capacity C12 of circuit one input end, one end is connected with the collector of triode VT7, the resistance R20 that the other end is connected with the emitter of triode VT6 after resistance R22 through resistance R21, one end is connected with the collector of triode VT7, the resistance R23 that the other end is connected with the collector of triode VT6, N pole is connected with the base stage of triode VT7, the diode D7 that P pole is connected with the collector of triode VT6, N pole is connected with the control pole of unidirectional thyristor D8 after electric capacity C14, the diode D9 that P pole is connected with the tie point of resistance R22 with resistance R21, positive pole is connected with the emitter of triode VT6, the electric capacity C13 that negative pole and the P of diode D9 are extremely connected, positive pole is connected with the collector of triode VT7, the electric capacity C15 that negative pole is connected with the N pole of diode D9 after resistance R24 forms, the base stage of described triode VT6 is connected with the tie point of resistance R21 with resistance R20, emitter is connected with the emitter of triode VT7, the emitter of triode VT7 is connected with the P pole of unidirectional thyristor D8, the N pole of unidirectional thyristor D8 is connected with the tie point of resistance R24 with electric capacity C15, and the collector of triode VT7 also connects outside 15V voltage.In order to better implement the present invention, described triode VT6 and triode VT7 all adopts NPN type triode, and therefore signal amplification module 6 forms a triode common emitter amplifying circuit, and it distortionlessly can carry out amplification process to signal.
As shown in Figure 4, signal conversion module 5 by front end input circuit 51, the signaling conversion circuit 52 be connected with front end input circuit 51, the driving circuit 53 be connected with signaling conversion circuit 52, and the output circuit 54 be connected with driving circuit 53 forms.
Described front end input circuit 51 can screen signal, it is by triode VT1, Sheffer stroke gate Q1, Sheffer stroke gate Q2, one end is connected with the collector of triode VT1, the resistance R1 that the other end is connected with the negative pole of Sheffer stroke gate Q1, N pole is connected with the collector of triode VT1, the voltage stabilizing diode D1 that P pole is connected with signaling conversion circuit 52, one end is connected with the N pole of voltage stabilizing diode D1, the resistance R2 that the other end is connected with the P pole of voltage stabilizing diode D1 after resistance R3, one end is connected with the output terminal of Sheffer stroke gate Q2, the resistance R4 that the other end is connected with the P pole of voltage stabilizing diode D1, and positive pole is connected with the output terminal of Sheffer stroke gate Q2, the electric capacity C1 that negative pole is connected with signaling conversion circuit 52 forms.The positive pole of described Sheffer stroke gate Q1 is connected with the tie point of resistance R3 with resistance R2, output terminal is connected with the base stage of triode VT1, and the emitter of triode VT1 is connected with signaling conversion circuit 52, base stage is connected collector then external 15V voltage simultaneously with negative pole with the positive pole of Sheffer stroke gate Q2.The collector of triode VT1 is as the input end of circuit together with the P pole of voltage stabilizing diode D1, and this input end is connected with the output terminal of signal-corecting module 3.
Signaling conversion circuit 52 can be converted to electric signal the signal that image acquisition device 1 collects, it is by triode VT2, amplifier P, one end is connected with the base stage of triode VT2, the resistance R5 that the other end is connected with the positive pole of amplifier P after electric capacity C3 through resistance R7, N pole is connected with the collector of triode VT2 after resistance R6, the voltage stabilizing diode D2 of P pole ground connection, one end is connected with the negative pole of amplifier P, the resistance R8 that the other end is connected with the emitter of triode VT2 after electric capacity C2, be serially connected in the resistance R9 between the negative pole of amplifier P and output terminal, and form with the electric capacity C4 that resistance R9 is in parallel.The base stage of described triode VT2 is connected with electric capacity C1, emitter is connected with the P pole of voltage stabilizing diode D1, the emitter of described triode VT1 is connected with the tie point of resistance R7 with resistance R5, the N pole of voltage stabilizing diode D2 is also connected with driving circuit 53, and the negative pole of amplifier P is simultaneously with the emitter of triode VT2 and driving circuit 53 is connected, output terminal is then connected with driving circuit 53.
Described driving circuit 53 is by driving chip U, triode VT3, N pole is connected with the output terminal of amplifier P, the diode D3 that P pole is connected with the negative pole of amplifier P after electric capacity C5, one end is connected with the P pole of diode D3, the diode D4 of P pole ground connection, one end is connected with the negative pole of amplifier P, the resistance R11 that the other end is connected with the RE pin of driving chip U, be serially connected in the resistance R10 between the COUT pin of driving chip U and TRI pin, P pole is connected with the negative pole of amplifier P, the diode D5 that N pole is connected with output circuit 44, positive pole is connected with the N pole of diode D5, the electric capacity C7 that negative pole is connected with output circuit 54, one end is connected with the N pole of diode D5, the other end is in turn through resistance R15 that resistance R14 is connected with the emitter of triode VT3 after resistance R13, one end is connected with the base stage of triode VT3, the resistance R12 that the other end is connected with the OUT pin of driving chip U, positive pole is connected with the COMP pin of driving chip U, the electric capacity C6 that negative pole is connected with the tie point of resistance R14 with N pole and the resistance R15 of diode D5 forms.Described resistance R14 is connected with the negative pole of electric capacity C7 with the tie point of resistance R13, the collector of triode VT3 is connected with the P pole of diode D5, emitter is connected with the THR pin of driving chip U, and GND pin ground connection, the VCC pin of described driving chip U are connected with the N pole of voltage stabilizing diode D2.In order to better implement the present invention, described driving chip U is preferably NE555 integrated chip.
Described output circuit 54 is by transformer T, triode VT4, triode VT5, one end is connected with the N pole of diode D5, the resistance R16 that the other end is connected with the Same Name of Ends of transformer T former limit telefault L2, positive pole is connected with the Same Name of Ends of transformer T former limit telefault L2, the electric capacity C9 that negative pole is connected with the collector of triode VT4, the inductance L 1 be in parallel with electric capacity C9, positive pole is connected with the positive pole of electric capacity C9 after resistance R17, the electric capacity C8 that negative pole is connected with the negative pole of electric capacity C7, one end is connected with the emitter of triode VT4, the resistance R18 that the other end is connected with the negative pole of electric capacity C8, positive pole is connected with the non-same polarity of transformer T former limit telefault L3, the electric capacity C10 that negative pole is connected with triode VT5 emitter, one end is connected with the positive pole of electric capacity C9, the resistance R19 that the other end is connected with the non-same polarity of transformer T former limit telefault L3, P pole is connected with the non-same polarity of transformer T secondary inductance coil L4, the diode D6 that N pole is connected with the Same Name of Ends of transformer T secondary inductance coil L4 after electric capacity C11 forms.While the base stage of described triode VT5 is connected with the Same Name of Ends of transformer T former limit telefault L3, emitter is connected with the negative pole of electric capacity C8, ground connection, collector are connected with the non-same polarity of transformer T former limit telefault L2, and the base stage of described triode VT4 is connected with the positive pole of electric capacity C8.The N pole of diode D6 is as the output terminal of circuit together with the Same Name of Ends of transformer T secondary inductance coil L4, and signal flows to Signal analysis module 5 from output terminal after transformer T boosts.
As mentioned above, just well the present invention can be realized.
Claims (10)
1. the high-precision image processing system based on Image Coding process, comprise image acquisition device (1), signal de-noising processing module (3), the signal-corecting module (4) be connected with signal de-noising processing module (3), the signal conversion module (5) be connected with signal-corecting module (4), the signal amplification module (6) be connected with signal conversion module (5), the Signal analysis module (7) be connected with signal amplification module (6), and the memory module (8) be connected with Signal analysis module (7) and display module (9); It is characterized in that: between image acquisition device (1) and signal de-noising processing module (3), be also provided with Image Coding processing module (2);
Described Image Coding processing module (2) is by process chip U2, triode VT8, triode VT9, triode VT10, amplifier P1, N pole is ground connection after electric capacity C16, the diode D11 that P pole is connected with the THRE pin of process chip U2 after resistance R25, one end is connected with the COMP pin of process chip U2, the resistance R26 of other end ground connection, N pole is connected with the C-R pin of process chip U2, the diode D10 that P pole is connected with the base stage of triode VT9 after electric capacity C17, and negative pole is connected with the base stage of triode VT10, the electric capacity C18 that positive pole is connected with the emitter of triode VT9 after resistance R27 forms, the positive pole of described amplifier P1 is connected with the tie point of electric capacity C18 with resistance R27, minus earth, output terminal is connected with the base stage of triode VT10, the grounded collector of described triode VT10, base stage and emitter are all connected with the collector of triode VT9, the base stage of triode VT8 is connected with the R/C pin of process chip U2, grounded collector, emitter is connected with the N pole of diode D11, the VS pin of described process chip U2 is all connected with the P pole of diode D11 with COMP pin, ground connection while F-O pin and GND pin are all connected with the P pole of diode D10, C-O pin is connected with the base stage of triode VT9.
2. a kind of high-precision image processing system based on Image Coding process according to claim 1, it is characterized in that: described signal amplification module (6) is by triode VT6, triode VT7, unidirectional thyristor D8, negative pole is connected with the base stage of triode VT6, positive pole is as the electric capacity C12 of circuit one input end, one end is connected with the collector of triode VT7, the resistance R20 that the other end is connected with the emitter of triode VT6 after resistance R22 through resistance R21, one end is connected with the collector of triode VT7, the resistance R23 that the other end is connected with the collector of triode VT6, N pole is connected with the base stage of triode VT7, the diode D7 that P pole is connected with the collector of triode VT6, N pole is connected with the control pole of unidirectional thyristor D8 after electric capacity C14, the diode D9 that P pole is connected with the tie point of resistance R22 with resistance R21, positive pole is connected with the emitter of triode VT6, the electric capacity C13 that negative pole and the P of diode D9 are extremely connected, positive pole is connected with the collector of triode VT7, the electric capacity C15 that negative pole is connected with the N pole of diode D9 after resistance R24 forms, the base stage of described triode VT6 is connected with the tie point of resistance R21 with resistance R20, emitter is connected with the emitter of triode VT7, the emitter of triode VT7 is connected with the P pole of unidirectional thyristor D8, and the N pole of unidirectional thyristor D8 is connected with the tie point of resistance R24 with electric capacity C15.
3. a kind of high-precision image processing system based on Image Coding process according to claim 2, it is characterized in that: described signal conversion module (5) is by front end input circuit (51), the signaling conversion circuit (52) be connected with front end input circuit (51), the driving circuit (53) be connected with signaling conversion circuit (52), and the output circuit (54) be connected with driving circuit (53) forms.
4. a kind of high-precision image processing system based on Image Coding process according to claim 3, it is characterized in that: described front end input circuit (51) is by triode VT1, Sheffer stroke gate Q1, Sheffer stroke gate Q2, one end is connected with the collector of triode VT1, the resistance R1 that the other end is connected with the negative pole of Sheffer stroke gate Q1, N pole is connected with the collector of triode VT1, the voltage stabilizing diode D1 that P pole is connected with signaling conversion circuit (52), one end is connected with the N pole of voltage stabilizing diode D1, the resistance R2 that the other end is connected with the P pole of voltage stabilizing diode D1 after resistance R3, one end is connected with the output terminal of Sheffer stroke gate Q2, the resistance R4 that the other end is connected with the P pole of voltage stabilizing diode D1, and positive pole is connected with the output terminal of Sheffer stroke gate Q2, the electric capacity C1 that negative pole is connected with signaling conversion circuit (52) forms, the positive pole of described Sheffer stroke gate Q1 is connected with the tie point of resistance R3 with resistance R2, output terminal is connected with the base stage of triode VT1, and the emitter of triode VT1 is connected with signaling conversion circuit (52), base stage is connected with negative pole with the positive pole of Sheffer stroke gate Q2 simultaneously.
5. a kind of high-precision image processing system based on Image Coding process according to claim 4, it is characterized in that: described signaling conversion circuit (52) is by triode VT2, amplifier P, one end is connected with the base stage of triode VT2, the resistance R5 that the other end is connected with the positive pole of amplifier P after electric capacity C3 through resistance R7, N pole is connected with the collector of triode VT2 after resistance R6, the voltage stabilizing diode D2 of P pole ground connection, one end is connected with the negative pole of amplifier P, the resistance R8 that the other end is connected with the emitter of triode VT2 after electric capacity C2, be serially connected in the resistance R9 between the negative pole of amplifier P and output terminal, and form with the electric capacity C4 that resistance R9 is in parallel, the base stage of described triode VT2 is connected with electric capacity C1, emitter is connected with the P pole of voltage stabilizing diode D1, the emitter of described triode VT1 is connected with the tie point of resistance R7 with resistance R5, the N pole of voltage stabilizing diode D2 is also connected with driving circuit (53), and the negative pole of amplifier P is simultaneously with the emitter of triode VT2 and driving circuit (53) is connected, output terminal is then connected with driving circuit (53).
6. a kind of high-precision image processing system based on Image Coding process according to claim 5, it is characterized in that: described driving circuit (53) is by driving chip U, triode VT3, N pole is connected with the output terminal of amplifier P, the diode D3 that P pole is connected with the negative pole of amplifier P after electric capacity C5, one end is connected with the P pole of diode D3, the diode D4 of P pole ground connection, one end is connected with the negative pole of amplifier P, the resistance R11 that the other end is connected with the RE pin of driving chip U, be serially connected in the resistance R10 between the COUT pin of driving chip U and TRI pin, P pole is connected with the negative pole of amplifier P, the diode D5 that N pole is connected with output circuit (54), positive pole is connected with the N pole of diode D5, the electric capacity C7 that negative pole is connected with output circuit (54), one end is connected with the N pole of diode D5, the other end is in turn through resistance R15 that resistance R14 is connected with the emitter of triode VT3 after resistance R13, one end is connected with the base stage of triode VT3, the resistance R12 that the other end is connected with the OUT pin of driving chip U, positive pole is connected with the COMP pin of driving chip U, the electric capacity C6 that negative pole is connected with the tie point of resistance R14 with N pole and the resistance R15 of diode D5 forms, described resistance R14 is connected with the negative pole of electric capacity C7 with the tie point of resistance R13, the collector of triode VT3 is connected with the P pole of diode D5, emitter is connected with the THR pin of driving chip U, and GND pin ground connection, the VCC pin of described driving chip U are connected with the N pole of voltage stabilizing diode D2.
7. a kind of high-precision image processing system based on Image Coding process according to claim 6, it is characterized in that: described output circuit (54) is by transformer T, triode VT4, triode VT5, one end is connected with the N pole of diode D5, the resistance R16 that the other end is connected with the Same Name of Ends of transformer T former limit telefault L2, positive pole is connected with the Same Name of Ends of transformer T former limit telefault L2, the electric capacity C9 that negative pole is connected with the collector of triode VT4, the inductance L 1 be in parallel with electric capacity C9, positive pole is connected with the positive pole of electric capacity C9 after resistance R17, the electric capacity C8 that negative pole is connected with the negative pole of electric capacity C7, one end is connected with the emitter of triode VT4, the resistance R18 that the other end is connected with the negative pole of electric capacity C8, positive pole is connected with the non-same polarity of transformer T former limit telefault L3, the electric capacity C10 that negative pole is connected with triode VT5 emitter, one end is connected with the positive pole of electric capacity C9, the resistance R19 that the other end is connected with the non-same polarity of transformer T former limit telefault L3, P pole is connected with the non-same polarity of transformer T secondary inductance coil L4, the diode D6 that N pole is connected with the Same Name of Ends of transformer T secondary inductance coil L4 after electric capacity C11 forms, while the base stage of described triode VT5 is connected with the Same Name of Ends of transformer T former limit telefault L3, emitter is connected with the negative pole of electric capacity C8, ground connection, collector are connected with the non-same polarity of transformer T former limit telefault L2, and the base stage of described triode VT4 is connected with the positive pole of electric capacity C8.
8. a kind of high-precision image processing system based on Image Coding process according to any one of claim 1 ~ 7, is characterized in that: described process chip U2 is LM311 integrated circuit.
9. a kind of high-precision image processing system based on Image Coding process according to claim 7, is characterized in that: described driving chip U is NE555 integrated circuit.
10. a kind of high-precision image processing system based on Image Coding process according to claim 7, is characterized in that: described triode VT6 and triode VT7 is NPN type triode.
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