CN105872313A - High-definition image signal processing system - Google Patents
High-definition image signal processing system Download PDFInfo
- Publication number
- CN105872313A CN105872313A CN201610393456.8A CN201610393456A CN105872313A CN 105872313 A CN105872313 A CN 105872313A CN 201610393456 A CN201610393456 A CN 201610393456A CN 105872313 A CN105872313 A CN 105872313A
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- China
- Prior art keywords
- pole
- pin
- resistance
- audion
- amplifier
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
Abstract
The invention discloses a high-definition image signal processing system, which is characterized by mainly consisting of an image collector, a processing chip U, a polar capacitor C5, a diode D3, a resistor R11, a resistor R12, a signal anti-noising filtering circuit and a signal amplification circuit, wherein one end of the resistor R11 is connected with a pole N of the diode D3; the other end of the resistor R11 is connected with a pin CE of the processing chip U; one end of the resistor R12 is connected with a pin AGND of the processing chip U, and the other end of the resistor R12 is connected with a pin DGND of the processing chip U and is then grounded; the signal anti-noising filtering circuit is connected with a pin REF and a pin PIN2 of the processing chip U; the signal amplification circuit is respectively connected with a pin AO, a pin DB1 and a pin DB2 of the processing chip U. Meanwhile, the high-definition image signal processing system can output the processed image signal after the processing, so that the image signal frequency bandwidth is increased; therefore the input end image signal maintains the consistency with the sampling signal; the image display distortion condition is effectively prevented.
Description
Technical field
The present invention relates to electronic applications, specifically, be a kind of high-definition image signal processing system.
Background technology
Along with the constantly development of society's science and technology, image processing system has been widely used in recognition of face, has taken the photograph
The fields such as shadow shooting；But, there is noise control poor performance in current image processing system, and to picture signal
Process inaccurate defect, thus cause image to show and distortion, unclear problem occur, it is impossible to meet people
Requirement.
Therefore it provides one can improve noise control performance, can ensure that again and picture signal is processed image accurately
Processing system is the task of top priority.
Summary of the invention
It is an object of the invention to overcome image processing system of the prior art to there is noise control poor performance, to figure
Image signal process inaccurate defect, it is provided that a kind of high-definition image signal processing system.
The present invention is achieved through the following technical solutions: a kind of high-definition image signal processing system, mainly by scheming
As harvester, processing chip U, positive pole is connected with the CS pin processing chip U after resistance R9, bears
Polar capacitor C5, the P pole of pole ground connection is connected with the RC pin processing chip U, N pole is through resistance R10
The diode D3 that negative pole with polar capacitor C5 is connected afterwards, one end is connected with the N pole of diode D3,
The resistance R11 that the other end is connected with the CE pin processing chip U, one end and the AGND processing chip U
The resistance R12 of ground connection after pin is connected, the other end is connected with the DGND pin of process chip U, point
The signal noise control filter circuit not being connected with the REF pin processing chip U and PIN2 pin, Yi Jifen
The signal amplification circuit not being connected with the AO pin of process chip U and DB1 pin and DB2 pin
Composition；Described signal noise control filter circuit is connected with signal amplification circuit；Described image acquisition device and signal
Noise control filter circuit is connected.
Described signal noise control filtered electrical routing amplifier P1, audion VT1, audion VT2, positive pole with
The base stage of audion VT1 is connected, negative pole electrode input end with amplifier P1 after resistance R5 is connected
Polar capacitor C1, one end is connected with the base stage of audion VT1, the collection of the other end and audion VT1
The resistance R1 that electrode is connected, one end is connected with the colelctor electrode of audion VT1, the other end and audion
The resistance R4 that the colelctor electrode of VT2 is connected, negative pole emitter stage with audion VT1 after resistance R3 is connected
Connect, polar capacitor C2, N pole that positive pole is connected with the PIN2 pin of process chip U with process chip U
The diode that PIN2 pin is connected, P pole emitter stage with audion VT1 after resistance R2 is connected
D2, one end is connected with the emitter stage of audion VT2, the PIN2 pin phase of the other end and process chip U
Connect inductance L, P pole be connected with the negative input of amplifier P1, N pole after resistance R6 with amplification
The diode D1 that the outfan of device P1 is connected, negative pole is connected with the negative input of amplifier P1 and is followed by
Ground, the polar capacitor C3 that is connected with diode D1N pole after resistance R7 of positive pole, and negative pole and process
The pole that the REF pin of chip U is connected, positive pole is connected with the N pole of diode D1 after resistance R8
Property electric capacity C4 composition；The base stage of described audion VT2 is connected with the negative pole of polar capacitor C2；Described pole
The negative pole of property electric capacity C1 is as the input of signal noise control filter circuit；The colelctor electrode of described audion VT2
It is connected with signal amplification circuit.
Described signal amplification circuit is connected with the colelctor electrode of audion VT2 by amplifier P2, P pole and is followed by
The diode D4 that ground, N pole are connected with the AO pin processing chip U, one end and the N of diode D4
The resistance R14 that pole is connected, the other end is connected with the electrode input end of amplifier P2, negative pole and amplifier
The polar capacitor C6 that the electrode input end of P2 is connected, positive pole is connected with the DB2 pin of process chip U,
One end is connected with the electrode input end of amplifier P2, the other end is connected with the outfan with amplifier P2
Adjustable resistance R15, one end is connected with the negative pole of polar capacitor C6, the other end and process chip U
The resistance R13 that DB1 pin is connected, and one end is connected with the negative input of amplifier P2, another
The resistance R16 composition of end ground connection；The outfan of described amplifier P2 is as the outfan of signal amplification circuit.
For the practical effect of the present invention, described process chip U the most preferentially uses the integrated core of AD574A
Sheet realizes.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) the interference current wave during the present invention can effectively eliminate the picture signal of input, effectively eliminates
Garbage signal frequency in picture signal, makes picture signal to transmit smoothly, thus ensure that the present invention
Picture signal can be processed accurately.
(2) present invention can export after the picture signal after processing being amplified, and makes the frequency band of picture signal
Wide change is big, so that input picture signal keeps consistent with sampled signal, is effectively prevented image and shows
The situation of distortion occurs.
(3) within image fault rate effectively can be dropped to 2% by the present invention, thus the present invention can meet people and exist
The field such as recognition of face, photography and vedio recording can obtain the demand of high-definition image.
(4) the integrated chip of AD574A that present invention employs stable performance is used as processing chip, effectively
Improve the stability that picture signal is processed by the present invention.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of the present invention.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing thereof, the present invention is described in further detail, but the enforcement of the present invention
Mode is not limited to this.
Embodiment
As it is shown in figure 1, the present invention is mainly by image acquisition device, process chip U, resistance R9, resistance R10,
Resistance R11, resistance R12, polar capacitor C5, diode D3, signal noise control filter circuit, and signal
Amplifying circuit forms.
During enforcement, the positive pole of polar capacitor C5 after resistance R9 with process chip U CS pin be connected,
Its minus earth.The P pole of diode D3 is connected with the RC pin processing chip U, its N pole is through electricity
It is connected with the negative pole of polar capacitor C5 after resistance R10.The N pole phase of one end of resistance R11 and diode D3
Connect, its other end is connected with the CE pin processing chip U.One end of resistance R12 and process chip
Ground connection after the AGND pin of U is connected, its other end is connected with the DGND pin processing chip U.
Signal noise control filter circuit is connected with the REF pin processing chip U and PIN2 pin respectively.Signal is put
Being connected with the AO pin processing chip U and DB1 pin and DB2 pin respectively of big circuit.Institute
State signal noise control filter circuit to be connected with signal amplification circuit；Described image acquisition device filters with signal noise control
Circuit is connected.
Wherein, described signal noise control filtered electrical routing amplifier P1, audion VT1, audion VT2,
Resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8,
Polar capacitor C1, polar capacitor C2, polar capacitor C3, polar capacitor C4, diode D1, diode
D2, and inductance L composition.
During connection, the positive pole of polar capacitor C1 is connected with the base stage of audion VT1, its negative pole is through resistance
After R5, the electrode input end with amplifier P1 is connected.One end of resistance R1 and the base stage of audion VT1
Be connected, its other end is connected with the colelctor electrode of audion VT1.One end of resistance R4 and audion VT1
Colelctor electrode be connected, its other end is connected with the colelctor electrode of audion VT2.Polar capacitor C2's is negative
Pole emitter stage with audion VT1 after resistance R3 is connected, its positive pole and the PIN2 processing chip U
Pin is connected.The N pole of diode D2 is connected with the PIN2 pin processing chip U, its P pole is through electricity
It is connected with the emitter stage of audion VT1 after resistance R2.
Meanwhile, one end of inductance L be connected with the emitter stage of audion VT2, its other end with process core
The PIN2 pin of sheet U is connected.The P pole of diode D1 is connected with the negative input of amplifier P1,
Its N pole outfan with amplifier P1 after resistance R6 is connected.The negative pole of polar capacitor C3 and amplification
After the negative input of device P1 is connected, ground connection, its positive pole are connected with diode D1N pole after resistance R7.
The negative pole of polar capacitor C4 with process chip U REF pin be connected, its positive pole after resistance R8 with two
The N pole of pole pipe D1 is connected.
The base stage of described audion VT2 is connected with the negative pole of polar capacitor C2；Described polar capacitor C1
Negative pole as the input of signal noise control filter circuit and be connected with image acquisition device；Described audion
The colelctor electrode of VT2 is connected with signal amplification circuit.
Meanwhile, described signal amplification circuit is by amplifier P2, resistance R13, resistance R14, adjustable resistance
R15, resistance R16, polar capacitor C6, and diode D4 form.
During connection, the P pole of diode D4 be connected with the colelctor electrode of audion VT2 after ground connection, its N pole
It is connected with the AO pin processing chip U.One end of resistance R14 is connected with the N pole of diode D4,
Its other end is connected with the electrode input end of amplifier P2.The negative pole of polar capacitor C6 is with amplifier P2's
Electrode input end is connected, its positive pole is connected with the DB2 pin processing chip U.
Wherein, one end of adjustable resistance R15 be connected with the electrode input end of amplifier P2, its other end
It is connected with the outfan with amplifier P2.One end of resistance R13 is connected with the negative pole of polar capacitor C6,
Its other end is connected with the DB1 pin processing chip U.One end of resistance R16 is negative with amplifier P2's
Pole input is connected, its other end ground connection.The outfan of described amplifier P2 is as signal amplification circuit
Outfan is also connected with image display device.
During operation, the present invention can export after the picture signal after processing being amplified simultaneously, makes picture signal
Frequency bandwidth becomes big, so that input picture signal keeps consistent with sampled signal, is effectively prevented figure
As the situation of distortion occurs in display.Within image fault rate effectively can be dropped to 2% by the present invention, thus this
Bright can effectively meet people and can obtain the demand of high-definition image in the field such as recognition of face, photography and vedio recording.
The integrated chip of AD574A that present invention employs stable performance is used as processing chip, effectively raises
The stability that picture signal is processed by the present invention.
According to above-described embodiment, can well realize the present invention.
Claims (4)
1. a high-definition image signal processing system, it is characterised in that mainly by image acquisition device, processes
Chip U, positive pole is connected with the CS pin processing chip U after resistance R9, the polarity of minus earth electricity
Hold C5, P pole with process chip U RC pin be connected, N pole after resistance R10 with polar capacitor C5
The diode D3 that is connected of negative pole, one end is connected with the N pole of diode D3, the other end and process core
The resistance R11 that the CE pin of sheet U is connected, one end with process chip U AGND pin be connected,
The other end be connected with the DGND pin processing chip U after the resistance R12 of ground connection, respectively with process chip
The signal noise control filter circuit that the REF pin of U is connected with PIN2 pin, and respectively with process chip U
AO pin be connected with DB1 pin and DB2 pin signal amplification circuit composition；Described signal is prevented
Filter circuit of making an uproar is connected with signal amplification circuit；Described image acquisition device is connected with signal noise control filter circuit
Connect.
A kind of high-definition image signal processing system the most according to claim 1, it is characterised in that institute
State signal noise control filtered electrical routing amplifier P1, audion VT1, audion VT2, positive pole and audion
The polarity that the base stage of VT1 is connected, negative pole electrode input end with amplifier P1 after resistance R5 is connected
Electric capacity C1, one end is connected with the base stage of audion VT1, the colelctor electrode phase of the other end and audion VT1
The resistance R1 that connects, one end is connected with the colelctor electrode of audion VT1, the other end and audion VT2
The resistance R4 that colelctor electrode is connected, negative pole emitter stage with audion VT1 after resistance R3 is connected, just
Polar capacitor C2, the N pole that pole is connected with the PIN2 pin processing chip U and the PIN2 processing chip U
The diode D2 that pin is connected, P pole emitter stage with audion VT1 after resistance R2 is connected, one
End is connected with the emitter stage of audion VT2, the other end is connected with the PIN2 pin of process chip U
Inductance L, P pole is connected with the negative input of amplifier P1, N pole after resistance R6 with amplifier P1
The diode D1 that is connected of outfan, negative pole be connected with the negative input of amplifier P1 after ground connection,
The polar capacitor C3 that positive pole is connected with diode D1N pole after resistance R7, and negative pole and process chip
The polar capacitor that the REF pin of U is connected, positive pole is connected with the N pole of diode D1 after resistance R8
C4 forms；The base stage of described audion VT2 is connected with the negative pole of polar capacitor C2；Described polar capacitor
The negative pole of C1 is as the input of signal noise control filter circuit；The colelctor electrode of described audion VT2 is put with signal
Big circuit is connected.
A kind of high-definition image signal processing system the most according to claim 2, it is characterised in that institute
State ground connection, N pole after signal amplification circuit is connected with the colelctor electrode of audion VT2 by amplifier P2, P pole
With the diode D4 that is connected of AO pin processing chip U, one end is connected with the N pole of diode D4,
The positive pole of the resistance R14 that the other end is connected with the electrode input end of amplifier P2, negative pole and amplifier P2
The polar capacitor C6 that input is connected, positive pole is connected with the DB2 pin of process chip U, one end with
The electrode input end of amplifier P2 is connected, the other end is with adjustable with what the outfan of amplifier P2 was connected
Resistance R15, one end is connected with the negative pole of polar capacitor C6, the DB1 of the other end and process chip U pipe
The resistance R13 that foot is connected, and one end is connected with the negative input of amplifier P2, other end ground connection
Resistance R16 composition；The outfan of described amplifier P2 is as the outfan of signal amplification circuit.
A kind of high-definition image signal processing system the most according to claim 3, it is characterised in that institute
Stating process chip U is the integrated chip of AD574A.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610393456.8A CN105872313A (en) | 2016-06-02 | 2016-06-02 | High-definition image signal processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610393456.8A CN105872313A (en) | 2016-06-02 | 2016-06-02 | High-definition image signal processing system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105872313A true CN105872313A (en) | 2016-08-17 |
Family
ID=56676762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610393456.8A Pending CN105872313A (en) | 2016-06-02 | 2016-06-02 | High-definition image signal processing system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106228154A (en) * | 2016-08-31 | 2016-12-14 | 四川金投金融电子服务股份有限公司 | Supercargo's identity authorization system based on escort delivery identification electronic Verification System |
| CN106326954A (en) * | 2016-08-31 | 2017-01-11 | 四川金投金融电子服务股份有限公司 | Precious metal in-out stock high-precision object confirmation system |
| CN106372600A (en) * | 2016-08-31 | 2017-02-01 | 四川金投金融电子服务股份有限公司 | Three-in-one high precision escorting handover identity electronic authentication system |
| CN106372691A (en) * | 2016-08-31 | 2017-02-01 | 四川金投金融电子服务股份有限公司 | High-speed information check system based on bank money box transfer |
| CN106384407A (en) * | 2016-08-31 | 2017-02-08 | 四川金投金融电子服务股份有限公司 | Precious metal storehouse access personnel identity high-precision confirmation system |
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- 2016-06-02 CN CN201610393456.8A patent/CN105872313A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106228154A (en) * | 2016-08-31 | 2016-12-14 | 四川金投金融电子服务股份有限公司 | Supercargo's identity authorization system based on escort delivery identification electronic Verification System |
| CN106326954A (en) * | 2016-08-31 | 2017-01-11 | 四川金投金融电子服务股份有限公司 | Precious metal in-out stock high-precision object confirmation system |
| CN106372600A (en) * | 2016-08-31 | 2017-02-01 | 四川金投金融电子服务股份有限公司 | Three-in-one high precision escorting handover identity electronic authentication system |
| CN106372691A (en) * | 2016-08-31 | 2017-02-01 | 四川金投金融电子服务股份有限公司 | High-speed information check system based on bank money box transfer |
| CN106384407A (en) * | 2016-08-31 | 2017-02-08 | 四川金投金融电子服务股份有限公司 | Precious metal storehouse access personnel identity high-precision confirmation system |
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Legal Events
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Application publication date: 20160817 |