CN105893991A - Signal gain circuit-based signal processing system for face recognition system - Google Patents
Signal gain circuit-based signal processing system for face recognition system Download PDFInfo
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- CN105893991A CN105893991A CN201610361613.7A CN201610361613A CN105893991A CN 105893991 A CN105893991 A CN 105893991A CN 201610361613 A CN201610361613 A CN 201610361613A CN 105893991 A CN105893991 A CN 105893991A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/16—Human faces, e.g. facial parts, sketches or expressions
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/30—Individual registration on entry or exit not involving the use of a pass
- G07C9/32—Individual registration on entry or exit not involving the use of a pass in combination with an identity check
- G07C9/37—Individual registration on entry or exit not involving the use of a pass in combination with an identity check using biometric data, e.g. fingerprints, iris scans or voice recognition
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- General Health & Medical Sciences (AREA)
- Oral & Maxillofacial Surgery (AREA)
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Abstract
The invention discloses a signal gain circuit-based signal processing system for a face recognition system. The signal processing system is characterized in that the signal processing system is mainly composed of a processing chip U, a signal pre-processing circuit, a polarity capacitor C8, a diode D6, a mixing and tuning circuit, a signal gain circuit and a signal frequency correcting circuit, wherein the N pole of the diode D6 is connected with the FREP pin of the processing chip U, the P pole of the diode D6 passes a resistor R16 and then is connected with the RC pin of the processing chip U, the mixing and tuning circuit is connected with the processing chip U, the signal gain circuit passes an inductor L, and then is connected with the COMP pin of the processing chip U, and the signal frequency correcting circuit is connected with the signal gain circuit and the mixing and tuning circuit. The signal processing system of the invention carries out stable processing on high and low signal frequencies in image signals, and at the same time, eliminates or attenuates useless signal frequencies in the image signals, so as to make the inputted image signals keep stable transmission, and thus the signal processing system of the invention can ensure the recognition accuracy of the face recognition system.
Description
Technical field
The present invention relates to electronic applications, specifically, be a kind of recognition of face system based on signal gain circuit
System signal processing system.
Background technology
Along with high-tech flourish, face identification system as human body password because of its convenience by
The wide model of people uses.In addition intelligent management has come into the social life of people, many intelligence now
Change mansion to rise sheer from level ground, adapt to the epoch needs of information, as noble building and working environment, it is necessary to
Functionally meet the demand of current and future development, become the base of culture and economic development.So face is known
Other system is applied in the gate identification system of Balkh, but because of the signal of current face identification system
Interference signal in picture signal cannot be eliminated by processing system, exists simultaneously and processes picture signal not
Accurately, thus cause the accuracy of identification of face identification system the highest, make face identification system occur when identifying
Refuse to recognize situation, i.e. None-identified goes out client, or system has carried out wrong identification, and the place of causing carrys out personnel and enters
Enter to indoor, bring potential safety hazard.
Therefore it provides a kind of face identification system signal processing system that can improve capacity of resisting disturbance is to work as
It is engaged in anxious.
Summary of the invention
The signal processing system that it is an object of the invention to overcome face identification system of the prior art is anti-interference
Ability, to receive the inaccurate defect of signal processing, it is provided that a kind of based on signal gain circuit people
Face identification system signal processing system.
The present invention is achieved through the following technical solutions: a kind of face identification system based on signal gain circuit
By signal processing system, mainly by processing chip U, N pole is connected with the FREP pin of process chip U,
The diode D6 that P pole is connected with the RC pin processing chip U after resistance R16, positive pole and diode
The polar capacitor C8 that the P pole of D6 is connected, negative pole is connected with the OUT pin of process chip U, with place
The mixing tuning circuit that reason chip U is connected, is connected with the COMP pin processing chip U after inductance L
The signal gain circuit connect, the signal frequency school being connected with signal gain circuit and mixing tuning circuit respectively
Positive circuit, and the signal pre-processing circuit composition being connected with signal frequency correcting circuit；Described signal frequency
Rate correcting circuit is connected with mixing tuning circuit.
Described signal gain electricity routing amplifier P2, audion VT2, audion VT3, positive pole is through resistance
After R17 the electrode input end with amplifier P2 be connected, negative pole as signal gain circuit input and with
Polar capacitor C9, the P pole that signal frequency correcting circuit is connected sequentially after resistance R19 and resistance R18 with
The positive pole of polar capacitor C9 is connected, N pole base stage with audion VT2 after resistance R21 is connected
Diode D7, positive pole negative input with amplifier P2 after resistance R20 is connected, minus earth
Polar capacitor C10, negative pole is connected with the colelctor electrode of audion VT3, positive pole after resistance R22 with amplification
The polar capacitor C13 that the outfan of device P2 is connected, one end is connected with the base stage of audion VT3, separately
The adjustable resistance R23 that one end is connected with the colelctor electrode of audion VT2, and P pole after resistance R26 with
The emitter stage of audion VT3 is connected, N pole sequentially after resistance R25 and resistance R24 with audion VT2
Emitter stage be connected diode D8 composition；The colelctor electrode of described audion VT2 and polar capacitor C11
Positive pole be connected；The emitter stage of described audion VT3 after inductance L with process chip U COMP
Pin is connected.
Described signal pre-processing circuit by amplifier P1, positive pole is connected with the electrode input end of amplifier P1,
Negative pole polar capacitor C1, the N pole as the input of signal pre-processing circuit and the outfan of amplifier P1
Be connected, diode D1 that P pole electrode input end with amplifier P1 after resistance R1 is connected, positive pole
Be connected with the electrode input end of amplifier P1, negative pole N with diode D1 after resistance R2 is extremely connected
Polar capacitor C2, the P pole connect outfan with amplifier P1 after resistance R5 is connected, N pole is through resistance
The diode D2 that after R3, electrode input end with amplifier P1 is connected, and negative pole is with amplifier P1's
The polar capacitor C3 that negative input is connected, positive pole is connected with the P pole of diode D2 after resistance R4
Composition；The negative input ground connection of described amplifier P1, its outfan shape extremely common with the P of diode D2
Become the outfan of signal pre-processing circuit and be connected with signal frequency correcting circuit.
Described signal frequency correcting circuit is connected with the outfan of amplifier P1 by audion VT1, P pole,
Diode D4, the P pole that N pole is connected with the negative pole of polar capacitor C9 after resistance R7 with amplifier P1
Outfan be connected, N pole is sequentially connected through resistance R8 N pole with diode D4 after resistance R9
Diode D3, positive pole P pole with diode D4 after resistance R6 is connected, negative pole and audion VT1
Colelctor electrode be connected after the polar capacitor C4 of ground connection, positive pole is connected with the N pole of diode D4, negative pole
The polar capacitor C5 being connected with the base stage of audion VT1, and one end is extremely connected with the N of diode D4
Connect, resistance R10 that the other end is connected with the emitter stage of audion VT1 composition；Described audion VT1
Emitter stage with mixing tuning circuit be connected；The positive pole of described polar capacitor C4 and the P pole of diode D2
It is connected.
Described mixing tuning circuit by one end with process chip U THR pin be connected, the other end and
The resistance R12 that the CMIN pin of reason chip U is connected, negative pole and the CMIN pin phase processing chip U
Connect, polar capacitor C6, P pole warp that positive pole emitter stage with audion VT1 after resistance R11 is connected
After resistance R13 the emitter stage with audion VT1 be connected, N pole after adjustable resistance R15 with process chip
The diode D5 that the OUT pin of U is connected, one end with process chip U CMIN pin be connected,
The resistance R14 that the other end is connected with the N pole of diode D5, and the REF of positive pole and process chip U
The polar capacitor C7 composition that pin is connected, negative pole is connected with the N pole of diode D5.
For the practical effect of the present invention, described process chip U preferentially have employed as the integrated core of LM331
Sheet realizes.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) present invention has stronger capacity of resisting disturbance, can garbage signal frequency in picture signal be eliminated,
Signal is made to transmit, so that it is guaranteed that the accuracy that picture signal is processed by the present invention.
(2) present invention can carry out frequency correction to picture signal, makes the transmission speed of each frequency of picture signal
Degree can keep consistent；Meanwhile, the present invention also greatly improves the intensity of signal frequency, thus effectively carries
The accuracy that picture signal is processed by the high present invention.
(3) mixing in picture signal can effectively be tuned by the present invention, makes each frequency of picture signal
Point held stationary, clear, effectively ensure that picture signal can accurately be processed by the present invention, thus
Ensure that the accuracy of identification of face identification system.
(4) present invention can make the accuracy of identification of face identification system improve more than 70%, can effectively prevent people
Face identification system carries out wrong identification, thus effectively raises the practicality of face identification system.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of the present invention.
Fig. 2 is the electrical block diagram of the signal gain circuit of the present invention.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing thereof, the present invention is described in further detail, but the enforcement of the present invention
Mode is not limited to this.
Embodiment
As it is shown in figure 1, the present invention is mainly by processing chip U, resistance R16, polar capacitor C8, diode
D6, signal gain circuit, it is mixed tuning circuit, signal frequency correcting circuit, and signal pre-processing circuit
Composition.
During enforcement, the N pole of diode D6 is connected with the FREP pin processing chip U, its P pole warp
It is connected with the RC pin processing chip U after resistance R16.The positive pole of polar capacitor C8 and diode D6
P pole be connected, its negative pole with process chip U OUT pin be connected.Mixing tuning circuit and process
Chip U is connected.Signal gain circuit is connected with the COMP pin processing chip U after inductance L.
Signal frequency correcting circuit is connected with signal gain circuit and mixing tuning circuit respectively.Its Signal Pretreatment
Circuit is connected with signal frequency correcting circuit.Described signal frequency correcting circuit is connected with mixing tuning circuit
Connect.The OUT pin of described process chip U is connected with the controller of face identification system.
Wherein, described signal pre-processing circuit by amplifier P1, resistance R1, resistance R2, resistance R3,
Resistance R4, resistance R5, polar capacitor C1, polar capacitor C2, polar capacitor C3, diode D1, with
And diode D2 composition.
During connection, the positive pole of polar capacitor C1 is connected with the electrode input end of amplifier P1, its negative pole is made
Input for signal pre-processing circuit.The N pole of diode D1 is connected with the outfan of amplifier P1,
Its P pole electrode input end with amplifier P1 after resistance R1 is connected.The positive pole of polar capacitor C2 with
The electrode input end of amplifier P1 is connected, its negative pole N with diode D1 after resistance R2 is extremely connected
Connect.
Meanwhile, the P pole of diode D2 outfan with amplifier P1 after resistance R5 be connected, its N
Pole electrode input end with amplifier P1 after resistance R3 is connected.The negative pole of polar capacitor C3 and amplifier
The negative input of P1 is connected, its positive pole P pole with diode D2 after resistance R4 is connected.Described
The negative input ground connection of amplifier P1, the P pole of its outfan and diode D2 is collectively forming signal and locates in advance
Manage the outfan of circuit and be connected with signal frequency correcting circuit.
Further, described signal frequency correcting circuit is by audion VT1, resistance R6, resistance R7, electricity
Resistance R8, resistance R9, resistance R10, polar capacitor C4, polar capacitor C5, diode D3, and two
Pole pipe D4 forms.
During connection, the P pole of diode D4 is connected with the outfan of amplifier P1, its N pole and polarity
The negative pole of electric capacity C9 is connected.The P pole of diode D3 after resistance R7 with the outfan phase of amplifier P1
Connect, its N pole is sequentially connected through resistance R8 N pole with diode D4 after resistance R9.Polarity electricity
The positive pole P pole with diode D4 after resistance R6 holding C4 is connected, its negative pole is with audion VT1's
Colelctor electrode be connected after ground connection.
Wherein, the positive pole of polar capacitor C5 be connected with the N pole of diode D4, its negative pole and audion
The base stage of VT1 is connected.One end of resistance R10 is connected with the N pole of diode D4, its other end with
The emitter stage of audion VT1 is connected.The emitter stage of described audion VT1 is connected with mixing tuning circuit；
The positive pole of described polar capacitor C4 is connected with the P pole of diode D2.
Further, described mixing tuning circuit is by resistance R11, resistance R12, resistance R13, resistance
R14, adjustable resistance R15, polar capacitor C6, polar capacitor C7, diode D5, and inductance L group
Become.
During connection, one end of resistance R12 with process chip U THR pin be connected, its other end with
The CMIN pin processing chip U is connected.The negative pole of polar capacitor C6 and the CMIN processing chip U
Pin is connected, its positive pole emitter stage with audion VT1 after resistance R11 is connected.Diode D5
P pole emitter stage with audion VT1 after resistance R13 be connected, its N pole is through adjustable resistance R15
It is connected with the OUT pin processing chip U afterwards.One end of resistance R14 and the CMIN processing chip U
Pin is connected, its other end is connected with the N pole of diode D5.The positive pole of polar capacitor C7 and process
The REF pin of chip U is connected, its negative pole is connected with the N pole of diode D5.
As in figure 2 it is shown, described signal gain electricity routing amplifier P2, audion VT2, audion VT3,
Resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, resistance R22, adjustable resistance
R23, resistance R24, resistance R25, resistance R26, polar capacitor C9, polar capacitor C10, polar capacitor
C11, diode D7, and diode D8 form.
During connection, the positive pole of polar capacitor C9 electrode input end with amplifier P2 after resistance R17 is connected
Connect, its negative pole as the input of signal gain circuit and is connected with signal frequency correcting circuit.Diode
The P pole of D7 is sequentially connected through resistance R19 positive pole with polar capacitor C9 after resistance R18, its N pole
After resistance R21, the base stage with audion VT2 is connected.
Meanwhile, the positive pole of polar capacitor C10 negative input with amplifier P2 after resistance R20 is connected
Connect, its minus earth.The negative pole of polar capacitor C13 is connected with the colelctor electrode of audion VT3, its positive pole
After resistance R22, the outfan with amplifier P2 is connected.One end of adjustable resistance R23 and audion VT3
Base stage be connected, its other end is connected with the colelctor electrode of audion VT2.The P pole warp of diode D8
After resistance R26, the emitter stage with audion VT3 is connected, its N pole is sequentially through resistance R25 and resistance R24
Emitter stage with audion VT2 is connected afterwards.The colelctor electrode of described audion VT2 and polar capacitor C11
Positive pole be connected；The emitter stage of described audion VT3 after inductance L with process chip U COMP
Pin is connected.
During operation, during operation, the present invention carries out steady flat process to the high-low signal frequency in picture signal, and
Garbage signal frequency in picture signal eliminated or decays simultaneously, making the biography of picture signal energy held stationary
Defeated.Video frequency in transmission is also corrected by the present invention, makes the biography of each frequency of picture signal
Defeated speed can keep unanimously, the raising that the intensity of the video frequency after correction has also been carried out by the present invention,
Effectively ensure that what picture signal transmitted stablizes.Meanwhile, the mixing in picture signal is had by the present invention
The tuning of effect, makes each frequency held stationary of picture signal, clear, is tuned rear picture signal by place
Reason chip U obtains image information accurately after being analyzed processing.The present invention will process after chip U processes and obtain
To image information be transferred to the controller of face identification system accurately, ensure that face identification system
Accuracy of identification.
The present invention can make the accuracy of identification of face identification system improve more than 70%, can effectively prevent face from knowing
Other system carries out wrong identification, thus effectively raises the practicality of face identification system.For the present invention
Practical effect, described process chip U preferentially have employed and realizes for the integrated chip of LM331.
According to above-described embodiment, can well realize the present invention.
Claims (6)
1. a face identification system signal processing system based on signal gain circuit, it is characterised in that
Mainly by processing chip U, N pole is connected with the FREP pin of process chip U, P pole is through resistance R16
The diode D6 being connected with the RC pin processing chip U afterwards, positive pole is extremely connected with the P of diode D6
Connect, polar capacitor C8 that negative pole is connected with the OUT pin of process chip U, be connected with processing chip U
The mixing tuning circuit connect, the signal gain being connected with the COMP pin processing chip U after inductance L
Circuit, the signal frequency correcting circuit being connected with signal gain circuit and mixing tuning circuit respectively, and
The signal pre-processing circuit composition being connected with signal frequency correcting circuit；Described signal frequency correcting circuit with
Mixing tuning circuit is connected.
A kind of face identification system signal based on signal gain circuit the most according to claim 1
Processing system, it is characterised in that described signal gain electricity routing amplifier P2, audion VT2, audion
VT3, positive pole electrode input end with amplifier P2 after resistance R17 is connected, negative pole is as signal gain
The input of circuit polar capacitor C9, the P pole that is connected with signal frequency correcting circuit are sequentially through resistance R19
Be connected with positive pole with polar capacitor C9 after resistance R18, N pole after resistance R21 with audion VT2
The diode D7 that is connected of base stage, positive pole negative input with amplifier P2 after resistance R20 is connected
Connect, the polar capacitor C10 of minus earth, negative pole is connected with the colelctor electrode of audion VT3, positive pole is through electricity
The polar capacitor C13 being connected with the outfan of amplifier P2 after resistance R22, one end is with audion VT3's
The adjustable resistance R23 that base stage is connected, the other end is connected with the colelctor electrode of audion VT2, and P pole
After resistance R26, the emitter stage with audion VT3 is connected, N pole is sequentially through resistance R25 and resistance R24
The diode D8 composition that emitter stage with audion VT2 is connected afterwards；The colelctor electrode of described audion VT2
It is connected with the positive pole of polar capacitor C11；The emitter stage of described audion VT3 after inductance L with process core
The COMP pin of sheet U is connected.
A kind of face identification system signal based on signal gain circuit the most according to claim 2
Processing system, it is characterised in that described signal pre-processing circuit is by amplifier P1, positive pole and amplifier P1
Electrode input end be connected, negative pole is as polar capacitor C1, the N pole of the input of signal pre-processing circuit
Be connected with the outfan of amplifier P1, P pole electrode input end with amplifier P1 after resistance R1 is connected
The diode D1 connect, positive pole is connected with the electrode input end of amplifier P1, negative pole after resistance R2 with two
Polar capacitor C2, the P pole that the N pole of pole pipe D1 is connected after resistance R5 with the outfan of amplifier P1
Be connected, diode D2 that N pole electrode input end with amplifier P1 after resistance R3 is connected, and
Negative pole is connected with the negative input of amplifier P1, positive pole after resistance R4 with the P pole of diode D2
The polar capacitor C3 composition being connected；The negative input ground connection of described amplifier P1, its outfan and two
The P pole of pole pipe D2 is collectively forming the outfan of signal pre-processing circuit and is connected with signal frequency correcting circuit
Connect.
A kind of face identification system signal based on signal gain circuit the most according to claim 3
Processing system, it is characterised in that described signal frequency correcting circuit is by audion VT1, P pole and amplifier
Diode D4, the P pole that the outfan of P1 is connected, N pole is connected with the negative pole of polar capacitor C9 is through electricity
Resistance R7 after be connected with the outfan of amplifier P1, N pole sequentially after resistance R8 and resistance R9 with two poles
The diode D3 that the N pole of pipe D4 is connected, positive pole P pole with diode D4 after resistance R6 is connected,
Negative pole be connected with the colelctor electrode of audion VT1 after the polar capacitor C4 of ground connection, positive pole is with diode D4's
The polar capacitor C5 that N pole is connected, negative pole is connected with the base stage of audion VT1, and one end and two poles
The resistance R10 composition that the N pole of pipe D4 is connected, the other end is connected with the emitter stage of audion VT1；
The emitter stage of described audion VT1 is connected with mixing tuning circuit；The positive pole of described polar capacitor C4 with
The P pole of diode D2 is connected.
A kind of face identification system signal based on signal gain circuit the most according to claim 4
Processing system, it is characterised in that described mixing tuning circuit is by one end and the THR pin phase processing chip U
The resistance R12 that connection, the other end are connected with the CMIN pin of process chip U, negative pole and process chip
The pole that the CMIN pin of U is connected, positive pole emitter stage with audion VT1 after resistance R11 is connected
Property electric capacity C6, P pole emitter stage with audion VT1 after resistance R13 is connected, N pole is through adjustable resistance
The diode D5 being connected with the OUT pin processing chip U after R15, one end is with process chip U's
The resistance R14 that CMIN pin is connected, the other end is connected with the N pole of diode D5, and positive pole with
Process the polar capacitor C7 that REF pin is connected, negative pole is connected of chip U with the N pole of diode D5
Composition.
A kind of face identification system signal based on signal gain circuit the most according to claim 5
Processing system, it is characterised in that described process chip U is the integrated chip of LM331.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610361613.7A CN105893991A (en) | 2016-05-26 | 2016-05-26 | Signal gain circuit-based signal processing system for face recognition system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610361613.7A CN105893991A (en) | 2016-05-26 | 2016-05-26 | Signal gain circuit-based signal processing system for face recognition system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105893991A true CN105893991A (en) | 2016-08-24 |
Family
ID=56717916
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610361613.7A Pending CN105893991A (en) | 2016-05-26 | 2016-05-26 | Signal gain circuit-based signal processing system for face recognition system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105893991A (en) |
-
2016
- 2016-05-26 CN CN201610361613.7A patent/CN105893991A/en active Pending
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Application publication date: 20160824 |