CN106026958A - Frequency-gain type signal processing system based on differential amplifying circuit - Google Patents
Frequency-gain type signal processing system based on differential amplifying circuit Download PDFInfo
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- CN106026958A CN106026958A CN201610364276.7A CN201610364276A CN106026958A CN 106026958 A CN106026958 A CN 106026958A CN 201610364276 A CN201610364276 A CN 201610364276A CN 106026958 A CN106026958 A CN 106026958A
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- 239000003990 capacitor Substances 0.000 claims abstract description 81
- 238000000034 method Methods 0.000 claims abstract description 26
- 238000007781 pre-processing Methods 0.000 claims abstract description 13
- 108091028140 FREP Proteins 0.000 claims abstract description 4
- 230000005611 electricity Effects 0.000 claims description 8
- 230000003321 amplification Effects 0.000 claims description 6
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45636—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by using feedback means
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
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Abstract
This invention discloses a frequency-gain type signal processing system based on a differential amplifying circuit. The signal processing system is characterized by mainly consisting of a processing chip U, a signal frequency correcting circuit, a differential amplifying circuit, a diode D6, a polar capacitor C8, a frequency-mixing tuned circuit connected with the processing chip U, a signal gain circuit and a signal pre-processing circuit; the N pole of the diode D6 is connected with the FREP pin of the processing chip U, and the P pole of the diode D6 is connected with the RC pin of the processing chip U after passing through a resistor R16; the positive pole of the polar capacitor C8 is connected with the P pole of the diode D6, and the negative pole of the polar capacitor C8 is connected with the differential amplifying circuit; the signal gain circuit is connected with the COMP pin of the processing chip U after passing through an inductor L1; and the signal pre-processing circuit is connected with the signal frequency correcting circuit. The signal processing system provided by this invention steadily processes high and low signal frequencies in the image signals, and eliminates or attenuates the useless signal frequencies in the signals at the same time, so that the inputted signals can be transmitted steadily; and thus, the recognition accuracy of the face recognition system can be ensured.
Description
Technical field
The present invention relates to electronic applications, specifically, be a kind of frequency gain formula based on differential amplifier circuit
Signal processing system.
Background technology
Along with high-tech flourish, face identification system as human body password because of its convenience by
The wide model of people uses.In addition intelligent management has come into the social life of people, many intelligence now
Change mansion to rise sheer from level ground, adapt to the epoch needs of information, as noble building and working environment, it is necessary to
Functionally meet the demand of current and future development, become the base of culture and economic development.So face is known
Other system is applied in the gate identification system of Balkh, but because of the signal of current face identification system
Interference signal in picture signal cannot be eliminated by processing system, exists simultaneously and processes picture signal not
Accurately, thus cause the accuracy of identification of face identification system the highest, make face identification system occur when identifying
Refuse to recognize situation, i.e. None-identified goes out client, or system has carried out wrong identification, and the place of causing carrys out personnel and enters
Enter to indoor, bring potential safety hazard.
Therefore it provides a kind of face identification system signal processing system that can improve capacity of resisting disturbance is to work as
It is engaged in anxious.
Summary of the invention
The signal processing system that it is an object of the invention to overcome face identification system of the prior art is anti-interference
Ability, to receive the inaccurate defect of signal processing, it is provided that a kind of based on differential amplifier circuit frequency
Rate gain formula signal processing system.
The present invention is achieved through the following technical solutions: a kind of frequency gain formula based on differential amplifier circuit is believed
Number processing system, mainly by processing chip U, N pole is connected with the FREP pin of process chip U, P
The diode D6 that pole is connected with the RC pin processing chip U after resistance R16, with process chip U
The differential amplifier circuit that is connected of OUT pin, positive pole is connected with the P pole of diode D6, negative pole with
The polar capacitor C8 that differential amplifier circuit is connected, the mixing tuning circuit being connected with process chip U, warp
The signal gain circuit being connected with the COMP pin processing chip U after inductance L1, increases with signal respectively
Benefit circuit and be mixed the signal frequency correcting circuit that is connected of tuning circuit, and with signal frequency correcting circuit
The signal pre-processing circuit composition being connected；Described mixing tuning circuit divide with signal frequency correcting circuit and
Differential amplifier circuit is connected.
Described signal gain electricity routing amplifier P2, audion VT4, audion VT3, positive pole is through resistance
After R25 the electrode input end with amplifier P2 be connected, negative pole as signal gain circuit input and with
Polar capacitor C14, the P pole that signal frequency correcting circuit is connected is sequentially after resistance R27 and resistance R26
Be connected with the positive pole of polar capacitor C14, N pole base stage with audion VT4 after resistance R29 is connected
Diode D9, positive pole negative input with amplifier P2 after resistance R28 is connected, minus earth
Polar capacitor C15, negative pole is connected with the colelctor electrode of audion VT3, positive pole after resistance R30 with put
The polar capacitor C13 that the outfan of big device P2 is connected, one end is connected with the base stage of audion VT3,
The adjustable resistance R31 that the other end is connected with the colelctor electrode of audion VT4, and P pole is after resistance R34
Be connected with the emitter stage of audion VT3, N pole sequentially after resistance R33 and resistance R32 with audion
The diode D10 composition that the emitter stage of VT4 is connected；The colelctor electrode of described audion VT4 and polar capacitor
The positive pole of C16 is connected；The emitter stage of described audion VT3 after inductance L1 with process chip U
COMP pin is connected.
Described differential amplifier circuit is by amplifier P2, amplifier P3, amplifier P4, audion VT2, negative
The polarity that pole is connected with the negative pole of polar capacitor C8, positive pole is connected with the electrode input end of amplifier P2
Electric capacity C9, P pole is connected with the outfan of amplifier P2, N pole after inductance L2 with amplifier P2's
The diode D7 that negative input is connected, negative pole is connected with the N pole of diode D7, positive pole is through resistance
Polar capacitor C10, the P pole that after R17, negative input with amplifier P2 is connected after resistance R20 with
The outfan of amplifier P2 is connected, N pole sequentially after resistance R22 and resistance R23 with amplifier P4's
The diode D8 that outfan is connected, positive pole is connected with the P pole of diode D8, negative pole and amplifier P4
The polar capacitor C12 that is connected of electrode input end, one end is connected with the electrode input end of amplifier P3,
The other end be connected with the negative pole of polar capacitor C10 after the resistance R18 of ground connection, negative pole is with audion VT2's
The polar capacitor C11 that base stage is connected, positive pole outfan with amplifier P3 after resistance R19 is connected,
And negative pole outfan with amplifier P4 after resistance R24 is connected, positive pole after resistance R21 with amplification
The polar capacitor C13 composition that the negative input of device P4 is connected；The negative input of described amplifier P3
It is connected with the OUT pin processing chip U；The grounded collector of described audion VT2, its emitter stage
It is connected with the positive pole of polar capacitor C13；Defeated as differential amplifier circuit of the outfan of described amplifier P4
Go out end.
Described signal pre-processing circuit by amplifier P1, positive pole is connected with the electrode input end of amplifier P1,
Negative pole polar capacitor C1, the N pole as the input of signal pre-processing circuit and the outfan of amplifier P1
Be connected, diode D1 that P pole electrode input end with amplifier P1 after resistance R1 is connected, positive pole
Be connected with the electrode input end of amplifier P1, negative pole N with diode D1 after resistance R2 is extremely connected
Polar capacitor C2, the P pole connect outfan with amplifier P1 after resistance R5 is connected, N pole is through resistance
The diode D2 that after R3, electrode input end with amplifier P1 is connected, and negative pole is with amplifier P1's
The polar capacitor C3 that negative input is connected, positive pole is connected with the P pole of diode D2 after resistance R4
Composition；The negative input ground connection of described amplifier P1, its outfan shape extremely common with the P of diode D2
Become the outfan of signal pre-processing circuit and be connected with signal frequency correcting circuit.
Described signal frequency correcting circuit is connected with the outfan of amplifier P1 by audion VT1, P pole,
Diode D4, the P pole that N pole is connected with the negative pole of polar capacitor C14 after resistance R7 with amplifier P1
Outfan be connected, N pole is sequentially connected through resistance R8 N pole with diode D4 after resistance R9
Diode D3, positive pole P pole with diode D4 after resistance R6 is connected, negative pole and audion VT1
Colelctor electrode be connected after the polar capacitor C4 of ground connection, positive pole is connected with the N pole of diode D4, negative pole
The polar capacitor C5 being connected with the base stage of audion VT1, and one end is extremely connected with the N of diode D4
Connect, resistance R10 that the other end is connected with the emitter stage of audion VT1 composition；Described audion VT1
Emitter stage with mixing tuning circuit be connected；The positive pole of described polar capacitor C4 and the P pole of diode D2
It is connected.
Described mixing tuning circuit by one end with process chip U THR pin be connected, the other end and
The resistance R12 that the CMIN pin of reason chip U is connected, negative pole and the CMIN pin phase processing chip U
Connect, polar capacitor C6, P pole warp that positive pole emitter stage with audion VT1 after resistance R11 is connected
After resistance R13 the emitter stage with audion VT1 be connected, N pole after adjustable resistance R15 with process chip
The diode D5 that the OUT pin of U is connected, one end with process chip U CMIN pin be connected,
The resistance R14 that the other end is connected with the N pole of diode D5, and the REF of positive pole and process chip U
The polar capacitor C7 composition that pin is connected, negative pole is connected with the N pole of diode D5.
For the practical effect of the present invention, described process chip U preferentially have employed as the integrated core of LM331
Sheet realizes.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) present invention has stronger capacity of resisting disturbance, can garbage signal frequency in picture signal be eliminated,
Signal is made to transmit, so that it is guaranteed that the accuracy that picture signal is processed by the present invention.
(2) present invention can carry out frequency correction to picture signal, makes the transmission speed energy of each frequency of signal
Keep consistent；Meanwhile, the present invention also greatly improves the intensity of signal frequency, thus effectively raises
The present invention accuracy to signal processing.
(3) mixing in picture signal can effectively be tuned by the present invention, makes each frequency of signal protect
Maintain an equal level steady, clear, effectively ensure that signal can accurately be processed by the present invention.
(4) present invention can export after the picture signal after processing effectively being amplified, and ensures that people
The accuracy of identification of face identification system.
(5) present invention can make the accuracy of identification of face identification system improve more than 70%, can effectively prevent people
Face identification system carries out wrong identification, thus effectively raises the practicality of face identification system.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of the present invention.
Fig. 2 is the electrical block diagram of the differential amplifier circuit of the present invention.
Fig. 3 is the electrical block diagram of the signal gain circuit of the present invention.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing thereof, the present invention is described in further detail, but the enforcement of the present invention
Mode is not limited to this.
Embodiment
As it is shown in figure 1, the present invention is mainly by processing chip U, resistance R16, polar capacitor C8, diode
D6, signal gain circuit, differential amplifier circuit, mixing tuning circuit, signal frequency correcting circuit, and
Signal pre-processing circuit forms.
During enforcement, the N pole of diode D6 is connected with the FREP pin processing chip U, its P pole warp
It is connected with the RC pin processing chip U after resistance R16.Differential amplifier circuit and the OUT processing chip U
Pin is connected.The positive pole of polar capacitor C8 is connected with the P pole of diode D6, negative pole and differential amplification
Circuit is connected.Mixing tuning circuit is connected with processing chip U.Signal gain circuit after inductance L1 with
The COMP pin processing chip U is connected.Signal frequency correcting circuit respectively with signal gain circuit and mixed
Frequently tuning circuit is connected.Its signal pre-processing circuit is connected with signal frequency correcting circuit.Described signal
Deaccentuator is connected with mixing tuning circuit.The OUT pin of described process chip U and recognition of face
The controller of system is connected.
Wherein, described signal pre-processing circuit by amplifier P1, resistance R1, resistance R2, resistance R3,
Resistance R4, resistance R5, polar capacitor C1, polar capacitor C2, polar capacitor C3, diode D1, with
And diode D2 composition.
During connection, the positive pole of polar capacitor C1 is connected with the electrode input end of amplifier P1, its negative pole is made
Input for signal pre-processing circuit.The N pole of diode D1 is connected with the outfan of amplifier P1,
Its P pole electrode input end with amplifier P1 after resistance R1 is connected.The positive pole of polar capacitor C2 with
The electrode input end of amplifier P1 is connected, its negative pole N with diode D1 after resistance R2 is extremely connected
Connect.
Meanwhile, the P pole of diode D2 outfan with amplifier P1 after resistance R5 be connected, its N
Pole electrode input end with amplifier P1 after resistance R3 is connected.The negative pole of polar capacitor C3 and amplifier
The negative input of P1 is connected, its positive pole P pole with diode D2 after resistance R4 is connected.Described
The negative input ground connection of amplifier P1, the P pole of its outfan and diode D2 is collectively forming signal and locates in advance
Manage the outfan of circuit and be connected with signal frequency correcting circuit.
Further, described signal frequency correcting circuit is by audion VT1, resistance R6, resistance R7, electricity
Resistance R8, resistance R9, resistance R10, polar capacitor C4, polar capacitor C5, diode D3, and two
Pole pipe D4 forms.
During connection, the P pole of diode D4 is connected with the outfan of amplifier P1, its N pole and polarity
The negative pole of electric capacity C14 is connected.The P pole of diode D3 after resistance R7 with the outfan of amplifier P1
Be connected, its N pole is sequentially connected through resistance R8 N pole with diode D4 after resistance R9.Polarity
The positive pole of electric capacity C4 P pole with diode D4 after resistance R6 is connected, its negative pole and audion VT1
Colelctor electrode be connected after ground connection.
Wherein, the positive pole of polar capacitor C5 be connected with the N pole of diode D4, its negative pole and audion
The base stage of VT1 is connected.One end of resistance R10 is connected with the N pole of diode D4, its other end with
The emitter stage of audion VT1 is connected.The emitter stage of described audion VT1 is connected with mixing tuning circuit；
The positive pole of described polar capacitor C4 is connected with the P pole of diode D2.
Further, described mixing tuning circuit is by resistance R11, resistance R12, resistance R13, resistance
R14, adjustable resistance R15, polar capacitor C6, polar capacitor C7, diode D5, and inductance L1 group
Become.
During connection, one end of resistance R12 with process chip U THR pin be connected, its other end with
The CMIN pin processing chip U is connected.The negative pole of polar capacitor C6 and the CMIN processing chip U
Pin is connected, its positive pole emitter stage with audion VT1 after resistance R11 is connected.Diode D5
P pole emitter stage with audion VT1 after resistance R13 be connected, its N pole is through adjustable resistance R15
It is connected with the OUT pin processing chip U afterwards.One end of resistance R14 and the CMIN processing chip U
Pin is connected, its other end is connected with the N pole of diode D5.The positive pole of polar capacitor C7 and process
The REF pin of chip U is connected, its negative pole is connected with the N pole of diode D5.
As in figure 2 it is shown, described differential amplifier circuit is by amplifier P2, amplifier P3, amplifier P4, three
Pole pipe VT2, resistance R17, resistance R18, resistance R19, resistance R20, resistance R21, resistance R22,
Resistance R23, resistance R24, polar capacitor C9, polar capacitor C10, polar capacitor C11, polar capacitor
C12, polar capacitor C13, diode D7, diode D8, and inductance L2 form.
During connection, the negative pole of polar capacitor C9 is connected with the negative pole of polar capacitor C8, its positive pole and amplification
The electrode input end of device P2 is connected.The P pole of diode D7 is connected with the outfan of amplifier P2, it
N pole negative input with amplifier P2 after inductance L2 is connected.The negative pole of polar capacitor C10 and two
The N pole of pole pipe D7 is connected, its positive pole negative input with amplifier P2 after resistance R17 is connected.
The P pole of diode D8 outfan with amplifier P2 after resistance R20 is connected, N pole is sequentially through resistance
After R22 and resistance R23, the outfan with amplifier P4 is connected.
Meanwhile, the positive pole of polar capacitor C12 be connected with the P pole of diode D8, its negative pole and amplifier
The electrode input end of P4 is connected.One end of resistance R18 is connected with the electrode input end of amplifier P3,
Its other end be connected with the negative pole of polar capacitor C10 after ground connection.The negative pole of polar capacitor C11 and audion
The base stage of VT2 is connected, its positive pole outfan with amplifier P3 after resistance R19 is connected.Polarity electricity
The negative pole outfan with amplifier P4 after resistance R24 holding C13 is connected, positive pole is after resistance R21
It is connected with the negative input of amplifier P4.
The negative input of described amplifier P3 is connected with the OUT pin processing chip U；Described three poles
The grounded collector of pipe VT2, its emitter stage is connected with the positive pole of polar capacitor C13；Described amplifier P4
Outfan as the outfan of differential amplifier circuit.
As it is shown on figure 3, described signal gain electricity routing amplifier P2, audion VT3, audion VT4,
Resistance R25, resistance R26, resistance R27, resistance R28, resistance R29, resistance R30, adjustable resistance
R31, resistance R32, resistance R33, resistance R34, polar capacitor C14, polar capacitor C15, polarity electricity
Hold C16, diode D9, and diode D10 composition.
During connection, the positive pole of polar capacitor C14 after resistance R25 with the electrode input end phase of amplifier P2
Connect, its negative pole as the input of signal gain circuit and is connected with signal frequency correcting circuit.Two poles
The P pole of pipe D9 is sequentially connected through resistance R27 positive pole with polar capacitor C14 after resistance R26, it
N pole base stage with audion VT4 after resistance R29 is connected.
Meanwhile, the positive pole of polar capacitor C15 negative input with amplifier P2 after resistance R28 is connected
Connect, its minus earth.The negative pole of polar capacitor C13 is connected with the colelctor electrode of audion VT3, its positive pole
After resistance R30, the outfan with amplifier P2 is connected.One end of adjustable resistance R31 and audion VT3
Base stage be connected, its other end is connected with the colelctor electrode of audion VT4.The P pole warp of diode D10
After resistance R34, the emitter stage with audion VT3 is connected, its N pole is sequentially through resistance R33 and resistance R32
Emitter stage with audion VT4 is connected afterwards.The colelctor electrode of described audion VT4 and polar capacitor C16
Positive pole be connected；The emitter stage of described audion VT3 after inductance L1 with process chip U COMP
Pin is connected.
During operation, the present invention carries out steady flat process to the high-low signal frequency in picture signal, and simultaneously will figure
In image signal, garbage signal frequency eliminates or decays, and makes the transmission of the picture signal energy held stationary of input.
Signal frequency in transmission is also corrected by the present invention, makes the transmission speed energy of each frequency of picture signal
Keep consistent, the raising that the intensity of the signal frequency after correction has also been carried out by the present invention, effectively ensure that
Stablizing of signal transmission.Meanwhile, the mixing in picture signal is effectively tuned by the present invention, makes image
Each frequency held stationary of signal, clear, it is tuned rear signal and is analyzed processing by processing chip U
After obtain image information accurately.The present invention is carried out processing the image information obtained after chip U processes effectively
Amplification after be transferred to the controller of face identification system, ensure that the accuracy of identification of face identification system.
The present invention can make the accuracy of identification of face identification system improve more than 70%, can effectively prevent face from knowing
Other system carries out wrong identification, thus effectively raises the practicality of face identification system.For the present invention
Practical effect, described process chip U preferentially have employed and realizes for the integrated chip of LM331.
According to above-described embodiment, can well realize the present invention.
Claims (7)
1. a frequency gain formula signal processing system based on differential amplifier circuit, it is characterised in that main
Will be by processing chip U, N pole is connected with the FREP pin of process chip U, P pole is after resistance R16
The diode D6 being connected with the RC pin processing chip U, is connected with the OUT pin processing chip U
The differential amplifier circuit connect, positive pole is connected with the P pole of diode D6, negative pole is connected with differential amplifier circuit
The polar capacitor C8 connect, the mixing tuning circuit being connected with process chip U, with process after inductance L1
The signal gain circuit that the COMP pin of chip U is connected, respectively with signal gain circuit and mixing tuning
The signal frequency correcting circuit that circuit is connected, and the signal being connected with signal frequency correcting circuit locates in advance
Reason circuit composition；Described mixing tuning circuit divides and is connected with signal frequency correcting circuit and differential amplifier circuit
Connect.
A kind of frequency gain formula signal processing based on differential amplifier circuit the most according to claim 1
System, it is characterised in that described signal gain electricity routing amplifier P2, audion VT4, audion VT3,
Positive pole electrode input end with amplifier P2 after resistance R25 is connected, negative pole is as signal gain circuit
Input polar capacitor C14, the P pole that is connected with signal frequency correcting circuit are sequentially through resistance R27 and electricity
Be connected with the positive pole of polar capacitor C14 after resistance R26, N pole after resistance R29 with the base of audion VT4
The diode D9 that pole is connected, positive pole negative input with amplifier P2 after resistance R28 is connected,
The polar capacitor C15 of minus earth, negative pole is connected with the colelctor electrode of audion VT3, positive pole is through resistance R30
The polar capacitor C13 that outfan with amplifier P2 is connected afterwards, the base stage phase of one end and audion VT3
The adjustable resistance R31 that connection, the other end are connected with the colelctor electrode of audion VT4, and P pole is through resistance
After R34 the emitter stage with audion VT3 be connected, N pole sequentially after resistance R33 and resistance R32 with three
The diode D10 composition that the emitter stage of pole pipe VT4 is connected；The colelctor electrode of described audion VT4 and polarity
The positive pole of electric capacity C16 is connected；The emitter stage of described audion VT3 after inductance L1 with process chip U
COMP pin be connected.
A kind of frequency gain formula signal processing based on differential amplifier circuit the most according to claim 2
System, it is characterised in that described differential amplifier circuit by amplifier P2, amplifier P3, amplifier P4,
Audion VT2, negative pole is connected with the negative pole of polar capacitor C8, positive pole inputs with the positive pole of amplifier P2
Polar capacitor C9, the P pole that is connected of end is connected with the outfan of amplifier P2, N pole is after inductance L2
The diode D7 being connected with the negative input of amplifier P2, negative pole is extremely connected with the N of diode D7
Connect, polar capacitor C10, P pole that positive pole negative input with amplifier P2 after resistance R17 is connected
After resistance R20, the outfan with amplifier P2 is connected, N pole is sequentially through resistance R22 and resistance R23
The diode D8 that outfan with amplifier P4 is connected afterwards, positive pole is connected with the P pole of diode D8,
The polar capacitor C12 that negative pole is connected with the electrode input end of amplifier P4, one end is with amplifier P3 just
The resistance R18 of ground connection after pole input is connected, the other end is connected with the negative pole of polar capacitor C10, negative
Pole is connected with the base stage of audion VT2, positive pole outfan with amplifier P3 after resistance R19 is connected
The polar capacitor C11 connect, and negative pole outfan with amplifier P4 after resistance R24 is connected, positive pole
The polar capacitor C13 composition that negative input with amplifier P4 is connected after resistance R21；Described amplification
The negative input of device P3 is connected with the OUT pin processing chip U；The current collection of described audion VT2
Pole ground connection, its emitter stage is connected with the positive pole of polar capacitor C13；The outfan conduct of described amplifier P4
The outfan of differential amplifier circuit.
A kind of frequency gain formula signal processing based on differential amplifier circuit the most according to claim 3
System, it is characterised in that described signal pre-processing circuit is by the positive pole of amplifier P1, positive pole and amplifier P1
Input is connected, negative pole is as polar capacitor C1, the N pole of the input of signal pre-processing circuit and amplification
The outfan of device P1 is connected, P pole electrode input end with amplifier P1 after resistance R1 is connected two
Pole pipe D1, positive pole is connected with the electrode input end of amplifier P1, negative pole after resistance R2 with diode
Polar capacitor C2, the P pole that the N pole of D1 is connected outfan with amplifier P1 after resistance R5 is connected
Connect, diode D2 that N pole electrode input end with amplifier P1 after resistance R3 is connected, and negative pole
Be connected with the negative input of amplifier P1, positive pole P with diode D2 after resistance R4 is extremely connected
The polar capacitor C3 composition connect；The negative input ground connection of described amplifier P1, its outfan and diode
The P pole of D2 is collectively forming the outfan of signal pre-processing circuit and is connected with signal frequency correcting circuit.
A kind of frequency gain formula signal processing based on differential amplifier circuit the most according to claim 4
System, it is characterised in that described signal frequency correcting circuit is by audion VT1, P pole and amplifier P1
Diode D4, the P pole that outfan is connected, N pole is connected with the negative pole of polar capacitor C14 is through resistance R7
Afterwards the outfan with amplifier P1 be connected, N pole sequentially after resistance R8 and resistance R9 with diode D4
The diode D3 that is connected of N pole, positive pole P pole with diode D4 after resistance R6 is connected, negative
Pole be connected with the colelctor electrode of audion VT1 after the polar capacitor C4 of ground connection, the N of positive pole and diode D4
The polar capacitor C5 that pole is connected, negative pole is connected with the base stage of audion VT1, and one end and diode
The resistance R10 composition that the N pole of D4 is connected, the other end is connected with the emitter stage of audion VT1；Institute
The emitter stage stating audion VT1 is connected with mixing tuning circuit；The positive pole and two of described polar capacitor C4
The P pole of pole pipe D2 is connected.
A kind of frequency gain formula signal processing based on differential amplifier circuit the most according to claim 5
System, it is characterised in that described mixing tuning circuit by one end with process chip U THR pin be connected,
The resistance R12 that the other end is connected with the CMIN pin processing chip U, negative pole is with process chip U's
The polarity electricity that CMIN pin is connected, positive pole emitter stage with audion VT1 after resistance R11 is connected
Hold that C6, P pole emitter stage with audion VT1 after resistance R13 is connected, N pole is through adjustable resistance R15
The diode D5 being connected with the OUT pin processing chip U afterwards, one end and the CMIN processing chip U
The resistance R14 that pin is connected, the other end is connected with the N pole of diode D5, and positive pole and process core
The polar capacitor C7 composition that the REF pin of sheet U is connected, negative pole is connected with the N pole of diode D5.
A kind of frequency gain formula signal processing based on differential amplifier circuit the most according to claim 6
System, it is characterised in that described process chip U is the integrated chip of LM331.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610364276.7A CN106026958A (en) | 2016-05-26 | 2016-05-26 | Frequency-gain type signal processing system based on differential amplifying circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610364276.7A CN106026958A (en) | 2016-05-26 | 2016-05-26 | Frequency-gain type signal processing system based on differential amplifying circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106026958A true CN106026958A (en) | 2016-10-12 |
Family
ID=57091332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610364276.7A Pending CN106026958A (en) | 2016-05-26 | 2016-05-26 | Frequency-gain type signal processing system based on differential amplifying circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106026958A (en) |
-
2016
- 2016-05-26 CN CN201610364276.7A patent/CN106026958A/en active Pending
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