CN104899570A - Logic protecting emitter coupled fingerprint identification system based on constant current protection - Google Patents
Logic protecting emitter coupled fingerprint identification system based on constant current protection Download PDFInfo
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- CN104899570A CN104899570A CN201510317214.6A CN201510317214A CN104899570A CN 104899570 A CN104899570 A CN 104899570A CN 201510317214 A CN201510317214 A CN 201510317214A CN 104899570 A CN104899570 A CN 104899570A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
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Abstract
The invention discloses a logic protecting emitter coupled fingerprint identification system based on constant current protection. The logic protecting emitter coupled fingerprint identification system is composed of the components of a fingerprint acquisition unit, a control chip HV which is arranged in the fingerprint acquisition unit, a fingerprint scanning circuit which is connected with the control chip HV, an image acquisition unit which is connected with the fingerprint scanning circuit, an imaging lens which is connected with the image acquisition unit, an emitter coupled asymmetric trigger circuit which is arranged between the connecting points of the fingerprint scanning circuit and the image acquisition unit, a light beam excitation type logic amplifying circuit which is connected with the control chip HV, and a logic protecting emitter coupled amplifying circuit which is serially connected between the light beam excitation type logic amplifying circuit and the emitter coupled asymmetric circuit. The logic protecting emitter coupled fingerprint identification system is provided with a constant-current protecting circuit which can lock the working current of the logic protecting emitter coupled fingerprint identification system, thereby keeping the working current of the logic protecting emitter coupled fingerprint identification system within a certain range and preventing precision reduction of the logic protecting emitter coupled fingerprint identification system caused by current fluctuation.
Description
Technical field
The present invention relates to a kind of fingerprint recognition system, specifically refer to a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection.
Background technology
At present, present fingerprint identification device has been widely applied in the middle of the life of people, and it brings great convenience to people's life.But existing fingerprint recognition system its be easily subject to the impact of current fluctuation, thus cause its accuracy of identification not high.
Summary of the invention
In fingerprint recognition system, it is easily subject to the defect of current fluctuation impact to object of the present invention, provides a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection.
The present invention is achieved through the following technical solutions: a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection, it is by fingerprint capturer, be arranged on the control chip HV of fingerprint capturer inside, the finger scan circuit be connected with this control chip HV, the image acquisition units be connected with finger scan circuit, the imaging lens be connected with this image acquisition units, be arranged on the asymmetric trigger circuit of emitter-base bandgap grading manifold type between finger scan circuit and the tie point of image acquisition units, the beam excitation formula logic amplifying circuit be connected with control chip HV, be serially connected in the virtual protection emitter-base bandgap grading manifold type amplifying circuit between beam excitation formula logic amplifying circuit and the asymmetric circuit of emitter-base bandgap grading manifold type, and the constant current protection circuit be serially connected between beam excitation formula logic amplifying circuit and control chip HV forms.The asymmetric trigger circuit of described emitter-base bandgap grading manifold type are then by the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filtering circuit be connected with its output terminal forms.
Further, described constant current protection circuit is by protect IC U1, triode Q7, triode Q8, be serially connected in the diode D8 between the COMP pin of protect IC U1 and VREF pin, P pole is connected with the RT pin of protect IC U1, the diode D9 that N pole is then connected with the FB pin of protect IC U1 after resistance R27, one end is connected with the CS pin of protect IC U1, the resistance R28 of other end ground connection, one end is connected with the DVR pin of protect IC U1, the resistance R29 that the other end is then connected with the base stage of triode Q7, one end is connected with the collector of triode Q7, the resistance R31 that the other end is then connected with the collector of triode Q8 after resistance R32, one end is connected with the emitter of triode Q8, the resistance R30 of other end ground connection, and positive pole is connected with the emitter of triode Q8, the polar capacitor C15 that negative pole is then connected with the CS1 pin of control chip HV forms, the N pole of described diode D9 is connected with beam excitation formula logic amplifying circuit, the base stage of triode Q8 is connected with the tie point of resistance R31 with resistance R32, and the grounded emitter of triode Q7, the VREF pin of described protect IC U1 is connected with its VCC pin, its GND pin ground connection.
Described beam excitation formula logic amplifying circuit is by power amplifier P3, Sheffer stroke gate IC1, Sheffer stroke gate IC2, Sheffer stroke gate IC3, negative pole is connected with the in-phase end of power amplifier P3, the polar capacitor C8 of positive pole ground connection after optical diode D3, one end is connected with the positive pole of polar capacitor C8, the resistance R25 of other end ground connection after diode D4, positive pole is connected with the tie point of diode D4 with resistance R25, the polar capacitor C10 of minus earth, one end is connected with the negative input of Sheffer stroke gate IC1, the resistance R26 that the other end is connected with the in-phase end of power amplifier P3, be serially connected in the resistance R14 between the end of oppisite phase of power amplifier P3 and output terminal, one end is connected with the output terminal of Sheffer stroke gate IC1, the resistance R16 that the other end is connected with the negative input of Sheffer stroke gate IC3, positive pole is connected with the output terminal of Sheffer stroke gate IC2, the electric capacity C9 that negative pole is connected with the negative input of Sheffer stroke gate IC3, and one end is connected with the positive pole of polar capacitor C10, the resistance R15 that the other end is connected with the negative input of Sheffer stroke gate IC2 forms, the electrode input end of described Sheffer stroke gate IC1 is connected with the end of oppisite phase of power amplifier P3, and its output terminal is connected with the electrode input end of Sheffer stroke gate IC2, and the electrode input end of Sheffer stroke gate IC3 is connected with the output terminal of power amplifier P3, the N pole of the output terminal of described Sheffer stroke gate IC3 then diode D9 is connected, described virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q5, triode Q6, power amplifier P4, power amplifier P5, be serially connected in the resistance R18 between the end of oppisite phase of power amplifier P4 and output terminal, be serially connected in the polar capacitor C13 between the in-phase end of power amplifier P5 and output terminal, be serially connected in the resistance R17 between the in-phase end of power amplifier P4 and the collector of triode Q5, be serially connected in the resistance R19 between the collector of triode Q5 and the base stage of triode Q6, the electric capacity C12 be in parallel with resistance R19, negative pole is connected with the in-phase end of power amplifier P4, the polar capacitor C11 that positive pole is connected with the emitter of triode Q5 after resistance R20, be serially connected in the resistance R21 between the base stage of triode Q6 and the positive pole of polar capacitor C11, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C14 that voltage stabilizing diode D5 is connected with the output terminal of power amplifier P4 after resistance R22, P pole is connected with the output terminal of power amplifier P5, the diode D6 that N pole is connected with the tie point of resistance R22 with voltage stabilizing diode D5 after resistance R23 through resistance R24, and P pole is connected with the negative pole of electric capacity C14, the voltage stabilizing diode D7 that N pole is connected with the tie point of resistance R24 with diode D6 forms, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C11, and its emitter is connected with the emitter of triode Q6, and its collector is connected with the end of oppisite phase of power amplifier P4, the collector of triode Q6 is connected with the end of oppisite phase of power amplifier P5, and the in-phase end of power amplifier P5 is connected with the output terminal of power amplifier P4, the described positive pole of polar capacitor C11 is connected with the negative input of Sheffer stroke gate IC3, and resistance R24 is then connected with the asymmetric circuit of emitter-base bandgap grading manifold type with the tie point of resistance R23.
Described emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, be serially connected in the first-level filtering wave circuit between the emitter of triode Q2 and the base stage of triode Q3, be serially connected in the resistance R7 between the collector of triode Q3 and the collector of diode Q2, be serially connected in the resistance R3 between the collector of triode Q1 and the collector of triode Q2, be serially connected in the secondary filter circuit between the emitter of triode Q1 and passive π type filtering circuit, be serially connected in three grades of filtering circuits between the base stage of triode Q1 and passive π type filtering circuit, and the resistance R2 be serially connected between the base stage of triode Q1 and passive π type filtering circuit and the resistance R6 be serially connected between the base stage of triode Q3 and passive π type filtering circuit forms, the base stage of described triode Q2 is connected with the collector of triode Q1, and its collector is connected with passive π type filtering circuit, the emitter of described triode Q2 and the equal ground connection of emitter of triode Q3, described resistance R24 is then connected with three grades of filtering circuits with the tie point of resistance R23.
Described passive π type filtered electrical routing capacitance C1, electric capacity C2, and the resistance R8 be serially connected between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms; The collector of described triode Q2 is then connected with the positive pole of electric capacity C2.
Described finger scan circuit is connected with the GATE pin of main control chip HV by base stage, collector is connected with the CS pin of main control chip HV after the primary coil L1 of transformer T1 emitter is then successively through the triode Q4 that resistance R9 is connected with the CS pin of main control chip HV after resistance R10, and two backup each other and the secondary link I be connected with LED respectively and secondary link II composition.
Described secondary link I to be connected with the Same Name of Ends of the secondary coil L2 of transformer T1 the diode D1 that P pole is then connected with the non-same polarity of secondary coil L2 after resistance R12 by N pole, and form with the electric capacity C6 that resistance R12 is in parallel, and the two ends of this electric capacity C6 are then connected with the both positive and negative polarity of LED respectively; Meanwhile, the positive pole of electric capacity C6 is connected with the positive pole of electric capacity C1, and its negative pole is connected with the negative pole of electric capacity C1.
Described secondary link II to be connected with the Same Name of Ends of the secondary coil L3 of transformer T1 the diode D2 that P pole is then connected with the non-same polarity of secondary coil L3 after resistance R13 by N pole, and form with the electric capacity C7 that resistance R13 is in parallel, and the two ends of this electric capacity C7 are connected with the both positive and negative polarity of LED respectively; Meanwhile, the positive pole of electric capacity C7 is connected with the positive pole of electric capacity C1, and its negative pole is then connected with the negative pole of electric capacity C1.
Described electric capacity C1, electric capacity C2 are patch capacitor.
Described first-level filtering wave circuit, secondary filter circuit and three grades of filtering circuits are RC filtering circuit.
Described control chip HV adopts 9910B type integrated chip.
Described protect IC U1 is AP3843CP type integrated chip.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) not only one-piece construction is very simple in the present invention, and it makes and very easy to use, and it interiorly at one time can also carry out fingerprint recognition to multiple user, and therefore its function is very powerful, can improve knowledge treatment effeciency significantly.
(2) the present invention adopts high precision identification processing system to be used as processing core, can increase exponentially fingerprint recognition efficiency, reliability and security, and be easier to the beneficial effect expanding fingerprint identification device function.
(3) the present invention adds the brand-new asymmetric trigger circuit of emitter-base bandgap grading manifold type in traditional fingerprint recognition system, therefore thoroughly can overcome the unstable properties existing for conventional fingerprint recognizer, on fingerprint, have dust or the water stain defect that can not identify.
(4) the present invention is provided with constant current protection circuit, and it can lock working current of the present invention, thus working current of the present invention is maintained in certain scope, avoids affecting precision of the present invention because of current fluctuation.
Accompanying drawing explanation
Fig. 1 is integrated circuit structural representation of the present invention.
Fig. 2 is virtual protection emitter-base bandgap grading manifold type amplification circuit structure schematic diagram of the present invention.
Fig. 3 is constant current protection circuit structural representation of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, the present invention includes the fingerprint capturer of band Camera communication interface and USB communication interface, be arranged on the control chip HV of fingerprint capturer inside, the finger scan circuit be connected with this control chip HV, the image acquisition units be connected with finger scan circuit, the imaging lens be connected with this image acquisition units, be arranged on the asymmetric trigger circuit of emitter-base bandgap grading manifold type between finger scan circuit and the tie point of image acquisition units, the beam excitation formula logic amplifying circuit be connected with control chip HV, be serially connected in the virtual protection emitter-base bandgap grading manifold type amplifying circuit between beam excitation formula logic amplifying circuit and the asymmetric circuit of emitter-base bandgap grading manifold type, and the constant current protection circuit be serially connected between beam excitation formula logic amplifying circuit and control chip HV.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P3, Sheffer stroke gate IC1, Sheffer stroke gate IC2, Sheffer stroke gate IC3, negative pole is connected with the in-phase end of power amplifier P3, the polar capacitor C8 of positive pole ground connection after optical diode D3, one end is connected with the positive pole of polar capacitor C8, the resistance R25 of other end ground connection after diode D4, positive pole is connected with the tie point of diode D4 with resistance R25, the polar capacitor C10 of minus earth, one end is connected with the negative input of Sheffer stroke gate IC1, the resistance R26 that the other end is connected with the in-phase end of power amplifier P3, be serially connected in the resistance R14 between the end of oppisite phase of power amplifier P3 and output terminal, one end is connected with the output terminal of Sheffer stroke gate IC1, the resistance R16 that the other end is connected with the negative input of Sheffer stroke gate IC3, positive pole is connected with the output terminal of Sheffer stroke gate IC2, the electric capacity C9 that negative pole is connected with the negative input of Sheffer stroke gate IC3, and one end is connected with the positive pole of polar capacitor C10, the resistance R15 that the other end is connected with the negative input of Sheffer stroke gate IC2 forms.
The electrode input end of described Sheffer stroke gate IC1 is connected with the end of oppisite phase of power amplifier P3, and its output terminal is connected with the electrode input end of Sheffer stroke gate IC2, and the electrode input end of Sheffer stroke gate IC3 is connected with the output terminal of power amplifier P3; The output terminal of described Sheffer stroke gate IC3 is then connected with constant current protection circuit.
The asymmetric trigger circuit of described emitter-base bandgap grading manifold type are then by the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filtering circuit be connected with its output terminal forms.Wherein, emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, resistance R1, resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8 and electric capacity C3, electric capacity C4 and electric capacity C5 form.
Passive π type filtering circuit is by electric capacity C1, electric capacity C2, and is serially connected in the low-pass filter circuit that the resistance R8 between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms.According to the actual requirements, this passive π type filtering circuit also can be high-pass filtering circuit.During connection, the negative pole of electric capacity C1 is connected with the negative pole of electric capacity C2, forms a loop to guarantee resistance R8, between electric capacity C1 and electric capacity C2.The positive pole of electric capacity C1 and negative pole then form output terminal of the present invention.For guaranteeing result of use, electric capacity C1 and electric capacity C2 is patch capacitor.
As shown in Figure 1, resistance R5 and electric capacity C3 is in parallel, and forms first-level filtering wave circuit; Resistance R4 and electric capacity C4 is in parallel, and forms secondary filter circuit; Resistance R1 and electric capacity C5 is in parallel, and forms three grades of filtering circuits.During connection, first-level filtering wave circuit is serially connected between the emitter of triode Q2 and the base stage of triode Q3, resistance R7 is serially connected between the collector of triode Q3 and the collector of diode Q2, resistance R3 is serially connected between the collector of triode Q1 and the collector of triode Q2, secondary filter circuit is then serially connected between the emitter of triode Q1 and the negative pole of electric capacity C2, and three grades of filtering circuits are then serially connected between the base stage of triode Q1 and the negative pole of electric capacity C2.
Described resistance R2 is serially connected between the base stage of triode Q1 and the negative pole of electric capacity C2, and resistance R6 is then serially connected between the base stage of triode Q3 and the negative pole of electric capacity C2.For guaranteeing result of use, the base stage of this triode Q2 is connected with the collector of triode Q1, and its collector is connected with the positive pole of electric capacity C2, the emitter of triode Q2 and the equal ground connection of emitter of triode Q3.
Described finger scan circuit is then connected with the GATE pin of main control chip HV by base stage, collector is connected with the CS pin of main control chip HV after the primary coil L1 of transformer T1 emitter is then successively through the triode Q4 that resistance R9 is connected with the CS pin of main control chip HV after resistance R10, and two backup each other and the secondary link I be connected with LED respectively and secondary link II composition.For guaranteeing result of use, this main control chip HV preferentially adopts 9910B type integrated chip to realize.The CS1 pin of this control chip HV is then connected with constant current protection circuit.
Wherein, secondary link I to be connected with the Same Name of Ends of the secondary coil L2 of transformer T1 the diode D1 that P pole is then connected with the non-same polarity of secondary coil L2 after resistance R12 by N pole, and form with the electric capacity C6 that resistance R12 is in parallel, and the two ends of this electric capacity C6 are then connected with the both positive and negative polarity of LED respectively.
Secondary link II to be connected with the Same Name of Ends of the secondary coil L3 of transformer T1 the diode D2 that P pole is then connected with the non-same polarity of secondary coil L3 after resistance R13 by N pole, and form with the electric capacity C7 that resistance R13 is in parallel, and the two ends of this electric capacity C7 are connected with the both positive and negative polarity of LED respectively.
Meanwhile, electric capacity C1, electric capacity C6 and electric capacity C7 will be in parallel, and namely electric capacity C6 is connected with the positive pole of electric capacity C1 with the positive pole of electric capacity C7, and electric capacity C6 is connected with the negative pole of electric capacity C1 with the negative pole of electric capacity C7.
The structure of described virtual protection emitter-base bandgap grading manifold type amplifying circuit as shown in Figure 2, it is primarily of triode Q5, triode Q6, power amplifier P4, power amplifier P5, be serially connected in the resistance R18 between the end of oppisite phase of power amplifier P4 and output terminal, be serially connected in the polar capacitor C13 between the in-phase end of power amplifier P5 and output terminal, be serially connected in the resistance R17 between the in-phase end of power amplifier P4 and the collector of triode Q5, be serially connected in the resistance R19 between the collector of triode Q5 and the base stage of triode Q6, the electric capacity C12 be in parallel with resistance R19, negative pole is connected with the in-phase end of power amplifier P4, the polar capacitor C11 that positive pole is connected with the emitter of triode Q5 after resistance R20, be serially connected in the resistance R21 between the base stage of triode Q6 and the positive pole of polar capacitor C11, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C14 that voltage stabilizing diode D5 is connected with the output terminal of power amplifier P4 after resistance R22, P pole is connected with the output terminal of power amplifier P5, the diode D6 that N pole is connected with the tie point of resistance R22 with voltage stabilizing diode D5 after resistance R23 through resistance R24, and P pole is connected with the negative pole of electric capacity C14, the voltage stabilizing diode D7 that N pole is connected with the tie point of resistance R24 with diode D6 forms.
Meanwhile, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C11, and its emitter is connected with the emitter of triode Q6, and its collector is connected with the end of oppisite phase of power amplifier P4; The collector of triode Q6 is connected with the end of oppisite phase of power amplifier P5, and the in-phase end of power amplifier P5 is connected with the output terminal of power amplifier P4.
During connection, the positive pole of described polar capacitor C11 will be connected with the negative input of Sheffer stroke gate IC3, and resistance R24 is then connected with the tie point of electric capacity C5 with resistance R1 with the tie point of resistance R23.That is, resistance R24 and the tie point of resistance R23 are connected with the base stage of triode Q1 after resistance R1.
Constant current protection circuit structure as shown in Figure 3; it comprises protect IC U1; triode Q7; triode Q8; be serially connected in the diode D8 between the COMP pin of protect IC U1 and VREF pin, P pole be connected with the RT pin of protect IC U1, diode D9 that N pole is then connected with the FB pin of protect IC U1 after resistance R27.This resistance R27 is that constant current detects resistance; pressure drop on it feeds back to the FB pin of protect IC U1; protect IC U1 then compares according to the height of this feedback voltage and the reference voltage of its inside; thus adjust the pulse duty factor that its DVR pin exports, then can reach the object of constant current thus.
Simultaneously, this constant current protection circuit also includes one end and is connected with the CS pin of protect IC U1, the resistance R28 of other end ground connection, one end is connected with the DVR pin of protect IC U1, the resistance R29 that the other end is then connected with the base stage of triode Q7, one end is connected with the collector of triode Q7, the resistance R31 that the other end is then connected with the collector of triode Q8 after resistance R32, one end is connected with the emitter of triode Q8, the resistance R30 of other end ground connection, and positive pole is connected with the emitter of triode Q8, the polar capacitor C15 that negative pole is then connected with the CS1 pin of control chip HV.
During connection, the N pole of described diode D9 is connected with beam excitation formula logic amplifying circuit; The base stage of triode Q8 is connected with the tie point of resistance R31 with resistance R32, and the grounded emitter of triode Q7; The VREF pin of described protect IC U1 is connected with its VCC pin, its GND pin ground connection.In order to reach better implementation result, this protect IC U1 preferentially adopts AP3843CP type integrated chip to realize.
As mentioned above, just the present invention can be realized preferably.
Claims (9)
1. the virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection, it is by fingerprint capturer, be arranged on the control chip HV of fingerprint capturer inside, the finger scan circuit be connected with this control chip HV, the image acquisition units be connected with finger scan circuit, the imaging lens be connected with this image acquisition units, be arranged on the asymmetric trigger circuit of emitter-base bandgap grading manifold type between finger scan circuit and the tie point of image acquisition units, the beam excitation formula logic amplifying circuit be connected with control chip HV, and the virtual protection emitter-base bandgap grading manifold type amplifying circuit be serially connected between beam excitation formula logic amplifying circuit and the asymmetric circuit of emitter-base bandgap grading manifold type forms, the asymmetric trigger circuit of described emitter-base bandgap grading manifold type are then by the asymmetric circuit of emitter-base bandgap grading manifold type, and the passive π type filtering circuit be connected with its output terminal forms, it is characterized in that, between beam excitation formula logic amplifying circuit and control chip HV, be also serially connected with constant current protection circuit, described constant current protection circuit is by protect IC U1, triode Q7, triode Q8, be serially connected in the diode D8 between the COMP pin of protect IC U1 and VREF pin, P pole is connected with the RT pin of protect IC U1, the diode D9 that N pole is then connected with the FB pin of protect IC U1 after resistance R27, one end is connected with the CS pin of protect IC U1, the resistance R28 of other end ground connection, one end is connected with the DVR pin of protect IC U1, the resistance R29 that the other end is then connected with the base stage of triode Q7, one end is connected with the collector of triode Q7, the resistance R31 that the other end is then connected with the collector of triode Q8 after resistance R32, one end is connected with the emitter of triode Q8, the resistance R30 of other end ground connection, and positive pole is connected with the emitter of triode Q8, the polar capacitor C15 that negative pole is then connected with the CS1 pin of control chip HV forms, the N pole of described diode D9 is connected with beam excitation formula logic amplifying circuit, the base stage of triode Q8 is connected with the tie point of resistance R31 with resistance R32, and the grounded emitter of triode Q7, the VREF pin of described protect IC U1 is connected with its VCC pin, its GND pin ground connection.
2. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 1, it is characterized in that, described beam excitation formula logic amplifying circuit is by power amplifier P3, Sheffer stroke gate IC1, Sheffer stroke gate IC2, Sheffer stroke gate IC3, negative pole is connected with the in-phase end of power amplifier P3, the polar capacitor C8 of positive pole ground connection after optical diode D3, one end is connected with the positive pole of polar capacitor C8, the resistance R25 of other end ground connection after diode D4, positive pole is connected with the tie point of diode D4 with resistance R25, the polar capacitor C10 of minus earth, one end is connected with the negative input of Sheffer stroke gate IC1, the resistance R26 that the other end is connected with the in-phase end of power amplifier P3, be serially connected in the resistance R14 between the end of oppisite phase of power amplifier P3 and output terminal, one end is connected with the output terminal of Sheffer stroke gate IC1, the resistance R16 that the other end is connected with the negative input of Sheffer stroke gate IC3, positive pole is connected with the output terminal of Sheffer stroke gate IC2, the electric capacity C9 that negative pole is connected with the negative input of Sheffer stroke gate IC3, and one end is connected with the positive pole of polar capacitor C10, the resistance R15 that the other end is connected with the negative input of Sheffer stroke gate IC2 forms, the electrode input end of described Sheffer stroke gate IC1 is connected with the end of oppisite phase of power amplifier P3, and its output terminal is connected with the electrode input end of Sheffer stroke gate IC2, and the electrode input end of Sheffer stroke gate IC3 is connected with the output terminal of power amplifier P3, the N pole of the output terminal of described Sheffer stroke gate IC3 then diode D9 is connected, described virtual protection emitter-base bandgap grading manifold type amplifying circuit is primarily of triode Q5, triode Q6, power amplifier P4, power amplifier P5, be serially connected in the resistance R18 between the end of oppisite phase of power amplifier P4 and output terminal, be serially connected in the polar capacitor C13 between the in-phase end of power amplifier P5 and output terminal, be serially connected in the resistance R17 between the in-phase end of power amplifier P4 and the collector of triode Q5, be serially connected in the resistance R19 between the collector of triode Q5 and the base stage of triode Q6, the electric capacity C12 be in parallel with resistance R19, negative pole is connected with the in-phase end of power amplifier P4, the polar capacitor C11 that positive pole is connected with the emitter of triode Q5 after resistance R20, be serially connected in the resistance R21 between the base stage of triode Q6 and the positive pole of polar capacitor C11, positive pole is connected with the emitter of triode Q6, negative pole is in turn through electric capacity C14 that voltage stabilizing diode D5 is connected with the output terminal of power amplifier P4 after resistance R22, P pole is connected with the output terminal of power amplifier P5, the diode D6 that N pole is connected with the tie point of resistance R22 with voltage stabilizing diode D5 after resistance R23 through resistance R24, and P pole is connected with the negative pole of electric capacity C14, the voltage stabilizing diode D7 that N pole is connected with the tie point of resistance R24 with diode D6 forms, the base stage of described triode Q5 is connected with the positive pole of polar capacitor C11, and its emitter is connected with the emitter of triode Q6, and its collector is connected with the end of oppisite phase of power amplifier P4, the collector of triode Q6 is connected with the end of oppisite phase of power amplifier P5, and the in-phase end of power amplifier P5 is connected with the output terminal of power amplifier P4, the described positive pole of polar capacitor C11 is connected with the negative input of Sheffer stroke gate IC3, and resistance R24 is then connected with the asymmetric circuit of emitter-base bandgap grading manifold type with the tie point of resistance R23.
3. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 2, it is characterized in that, described emitter-base bandgap grading manifold type Asymmetric Electric route triode Q1, triode Q2, triode Q3, be serially connected in the first-level filtering wave circuit between the emitter of triode Q2 and the base stage of triode Q3, be serially connected in the resistance R7 between the collector of triode Q3 and the collector of diode Q2, be serially connected in the resistance R3 between the collector of triode Q1 and the collector of triode Q2, be serially connected in the secondary filter circuit between the emitter of triode Q1 and passive π type filtering circuit, be serially connected in three grades of filtering circuits between the base stage of triode Q1 and passive π type filtering circuit, and the resistance R2 be serially connected between the base stage of triode Q1 and passive π type filtering circuit and the resistance R6 be serially connected between the base stage of triode Q3 and passive π type filtering circuit forms, the base stage of described triode Q2 is connected with the collector of triode Q1, and its collector is connected with passive π type filtering circuit, the emitter of described triode Q2 and the equal ground connection of emitter of triode Q3, described resistance R24 is then connected with three grades of filtering circuits with the tie point of resistance R23.
4. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 3, it is characterized in that, described passive π type filtered electrical routing capacitance C1, electric capacity C2, and the resistance R8 be serially connected between the positive pole of electric capacity C1 and the positive pole of electric capacity C2 forms; The collector of described triode Q2 is then connected with the positive pole of electric capacity C2.
5. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 4, it is characterized in that, described finger scan circuit is connected with the GATE pin of main control chip HV by base stage, collector is connected with the CS pin of main control chip HV after the primary coil L1 of transformer T1 emitter is then successively through the triode Q4 that resistance R9 is connected with the CS pin of main control chip HV after resistance R10, and two backup each other and the secondary link I be connected with LED respectively and secondary link II composition;
Described secondary link I to be connected with the Same Name of Ends of the secondary coil L2 of transformer T1 the diode D1 that P pole is then connected with the non-same polarity of secondary coil L2 after resistance R12 by N pole, and form with the electric capacity C6 that resistance R12 is in parallel, and the two ends of this electric capacity C6 are then connected with the both positive and negative polarity of LED respectively; Meanwhile, the positive pole of electric capacity C6 is connected with the positive pole of electric capacity C1, and its negative pole is connected with the negative pole of electric capacity C1;
Described secondary link II to be connected with the Same Name of Ends of the secondary coil L3 of transformer T1 the diode D2 that P pole is then connected with the non-same polarity of secondary coil L3 after resistance R13 by N pole, and form with the electric capacity C7 that resistance R13 is in parallel, and the two ends of this electric capacity C7 are connected with the both positive and negative polarity of LED respectively; Meanwhile, the positive pole of electric capacity C7 is connected with the positive pole of electric capacity C1, and its negative pole is then connected with the negative pole of electric capacity C1.
6. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 5, it is characterized in that, described electric capacity C1, electric capacity C2 are patch capacitor.
7. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 6, it is characterized in that, described first-level filtering wave circuit, secondary filter circuit and three grades of filtering circuits are RC filtering circuit.
8. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 7, is characterized in that, described control chip HV adopts 9910B type integrated chip.
9. a kind of virtual protection emitter-base bandgap grading manifold type fingerprint recognition system based on constant current protection according to claim 8, it is characterized in that, described protect IC U1 is AP3843CP type integrated chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510317214.6A CN104899570A (en) | 2014-11-28 | 2015-06-10 | Logic protecting emitter coupled fingerprint identification system based on constant current protection |
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| CN201410708152.7A CN104408425A (en) | 2014-11-28 | 2014-11-28 | Logic protection emitter coupling type fingerprint recognizing system |
| CN2014107081527 | 2014-11-28 | ||
| CN201510317214.6A CN104899570A (en) | 2014-11-28 | 2015-06-10 | Logic protecting emitter coupled fingerprint identification system based on constant current protection |
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| CN201510317214.6A Withdrawn CN104899570A (en) | 2014-11-28 | 2015-06-10 | Logic protecting emitter coupled fingerprint identification system based on constant current protection |
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| CN104683659A (en) * | 2015-03-31 | 2015-06-03 | 宁波摩米创新工场电子科技有限公司 | Audion common emitter amplifying circuit-based high-precision image processing system |
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| CN104408425A (en) | 2015-03-11 |
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