CN106298516B - The preparation method and power device of power device - Google Patents
The preparation method and power device of power device Download PDFInfo
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- CN106298516B CN106298516B CN201510237053.XA CN201510237053A CN106298516B CN 106298516 B CN106298516 B CN 106298516B CN 201510237053 A CN201510237053 A CN 201510237053A CN 106298516 B CN106298516 B CN 106298516B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7817—Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device
- H01L29/7818—Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention proposes a kind of preparation methods of power device and a kind of power device, wherein the preparation method includes: to form photoresist layer on the oxide layer protective layer for being prepared with diode and power cell；Remove the photoresist layer on the oxide layer protective layer of the active area of the power cell, and retain the diode electrostatic protection area the oxide layer protective layer on the photoresist layer, to complete the preparation process of the power device.According to the technical solution of the present invention; by forming photoresist layer on the oxide layer protective layer in the electrostatic protection area of diode; the corner for avoiding the oxide layer protective layer in electrostatic protection area during preparing power device is etched; metal silicide is formed so as to avoid on the polysilicon base layer structure of diode; and then ensure that the function of the electrostatic protection of diode pair power device, it further ensure that the reliability of power device.
Description
Technical field
The present invention relates to technical field of semiconductors, preparation method and a kind of function in particular to a kind of power device
Rate device.
Background technique
Currently, power device is widely used in the fields such as radar, radio and television, base station, for example, power device is that radio frequency is horizontal
To DMOS device (RF LDMOS, Radio-Frequency Laterally-Diffused-
Metal-Oxide-Semiconductor), in addition, in order to reduce the grid resistance of power device and promote frequency, it will usually
When making metal suicide structure layer on the silicon gate structure of power device, and preparing metal suicide structure layer, generally use certainly
Alignment Process.Specifically, in the related art, anti-reflection coating (ARC, Anti-Reflective-Coating) is coated on
Relatively thin using the coating of eminence on the oxide layer protective layer of power device, the thicker feature of the coating of lower is carved by dry back
Technique by the top of the silicon gate structure of power device anti-reflection coating and oxide layer protective layer etch away, and retain silicon gate structure two
The antireflection figure layer and oxide layer protective layer of side, so that the top of silicon gate structure is exposed, convenient for production metal suicide structure
Layer.
But if (such as antistatic protection diode, i.e. ESD diode, ESD are integrated diode in power device
Electro-Static Discharge, Electro-static Driven Comb), then the scheme for preparing power device in the related technology just has scarce
Point, specifically, since diode is generally all made in grid on same polysilicon base layer structure, and the polycrystalline silicon base layer of diode
There cannot be metal silicide generation in structure, otherwise will cause shorted diode, so that diode loses to power device
Defencive function.As depicted in figs. 1 and 2, after being coated with anti-reflection coating, the polysilicon base layer structure of diode is wider, more
Anti-reflection coating on crystal silicon base layer structure can be thicker, but the corner at the top of polysilicon base layer structure, anti-reflective coating
Layer is thus easy to be etched away in Hui Kezhong, then also etched away the oxide layer protective layer of corner, in this way than relatively thin
In the subsequent technique for forming metal suicide structure layer, the corner of polysilicon base layer structure will generate metal silication
Object, so that shorted diode be caused to fail.
Therefore, how to avoid oxide layer protective layer during preparing power device due to diode from being etched and lead
Cause forms metal silicide on the polysilicon base layer structure of diode, so that diode be avoided to cause short circuit, becomes and urgently solves
Certainly the problem of.
Summary of the invention
The present invention is based on the above problems, proposes a kind of preparation method of new power device, can effectively keep away
The corner for having exempted from the oxide layer protective layer in electrostatic protection area during preparing power device is etched, so as to avoid
Metal silicide is formed on the polysilicon base layer structure of diode, and then ensure that the electrostatic protection of diode pair power device
Function further ensure that the reliability of power device.
In view of this, an aspect of of the present present invention proposes a kind of preparation method of power device, comprising: be prepared with two poles
Photoresist layer is formed on the oxide layer protective layer of pipe and power cell；The oxide layer for removing the active area of the power cell is protected
The photoresist layer on sheath, and retain the diode electrostatic protection area the oxide layer protective layer on the photoresist
Layer, to complete the preparation process of the power device.
In the technical scheme, by forming photoresist layer on the oxide layer protective layer in the electrostatic protection area of diode, from
And make photoresist layer that there is protective effect to the oxide layer protective layer in electrostatic protection area, it avoids during preparing power device
The corner of the oxide layer protective layer in electrostatic protection area is etched, so that making the oxide layer protective layer in electrostatic protection area still has
The effect of polysilicon base layer structure in protection diode, that is, avoid and generate metal silicide on polysilicon base layer structure,
And then it avoids and ensure that the electrostatic of diode pair power device is anti-since the metal silicide of generation leads to shorted diode
The function of shield, and then ensure that the reliability of power device.
In the above-mentioned technical solutions, it is preferable that before forming the photoresist layer, comprising the following specific steps successively existing
Epitaxial layer and sinker area are formed in substrate, wherein the side of the sinker area is anti-as the electrostatic for preparing the diode
Area is protected, the other side of the sinker area is as the active area for preparing the power cell.
In the technical scheme, by forming epitaxial layer and sinker area on base, the basic knot of power device is completed
The preparation of structure, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that after forming the sinker area, comprising the following specific steps described
Field oxide is formed on the epitaxial layer in electrostatic protection area；Gate oxide is formed on the epitaxial layer of the active area.
In the technical scheme, by forming field oxide and gate oxide, the basic structure of power device is completed
Preparation, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that after forming the gate oxide, comprising the following specific steps in institute
It states and forms polysilicon layer on field oxide and the gate oxide；Processing is patterned to the polysilicon layer, described
Electrostatic protection area forms polysilicon base layer structure, and forms silicon gate structure in the active area.
In the technical scheme, by forming polysilicon base layer structure and silicon gate structure, the basic of power device is completed
The preparation of structure, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that after forming the silicon gate structure, comprising the following specific steps in shape
Body area, drift region, source region, drain region and p-type heavy doping ion area are sequentially formed at the active area of the silicon gate structure.
In the technical scheme, it by forming body area, drift region, source region, drain region and p-type heavy doping ion area, completes
The preparation of the basic structure of power device, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that the photoresist layer is formed, comprising the following specific steps forming the p-type
On the silicon gate structure of the active area in heavy doping ion area and the polysilicon base layer structure in the electrostatic protection area
It is upper to form the oxide layer protective layer, to form the photoresist layer on the oxide layer protective layer.
In the technical scheme, by forming oxide layer protective layer, for protecting polysilicon base layer structure and silicon gate structure,
To complete the preparation of the basic structure of power device, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that the photoresist layer is removed, comprising the following specific steps having described in the removal
Anti-reflection coating is formed on the oxide layer protective layer of the photoresist layer of source region；Remove the Si-gate knot of the active area
The oxide layer protective layer at the top of the anti-reflection coating and the silicon gate structure at the top of structure, to retain the silicon gate structure
The oxide layer protective layer of two sides；Remove the photoresist layer in the electrostatic protection area, and the institute of the removal active area
State anti-reflection coating；Alloying Treatment is carried out to the silicon gate structure of the oxide layer protective layer at removal top, to be formed
Metal suicide structure layer.
In the technical scheme, by forming photoresist layer in the electrostatic protection area of diode, therefore, in removal silicon gate structure
When the anti-reflection coating and oxide layer protective layer at top, the photoresist layer in electrostatic protection area can be to avoid the oxide layer in electrostatic protection area
Protective layer is etched, to make the oxide layer protective layer in electrostatic protection area with the polysilicon base layer structure in protection diode
Effect, that is, avoid and generate metal silicide on polysilicon base layer structure, and then avoid the metal silicide due to generation
Lead to shorted diode, that is, ensure that the function of the electrostatic protection of diode pair power device, and then ensure that power device
Reliability.
In the above-mentioned technical solutions, it is preferable that the light of the active area is removed by exposure technology and developing process
Resistance layer.
In the technical scheme, the photoresist layer of active area is removed, by exposure technology and developing process so as to have
Anti-reflection coating is formed on the oxide layer protective layer of source region to form metal suicide structure layer, completes the basic of power device
The preparation of structure, to ensure that the reliability for preparing power device.
Another aspect of the present invention proposes a kind of power device, using the power as described in any of the above-described technical solution
The preparation method of device is prepared.
In the technical scheme, by forming photoresist layer on the oxide layer protective layer in the electrostatic protection area of diode, from
And make photoresist layer that there is protective effect to the oxide layer protective layer in electrostatic protection area, it avoids during preparing power device
The corner of the oxide layer protective layer in electrostatic protection area is etched, so that making the oxide layer protective layer in electrostatic protection area still has
The effect of polysilicon base layer structure in protection diode, that is, avoid and generate metal silicide on polysilicon base layer structure,
And then it avoids and ensure that the electrostatic of diode pair power device is anti-since the metal silicide of generation leads to shorted diode
The function of shield, and then ensure that the reliability of power device.
In the above-mentioned technical solutions, it is preferable that the thickness of the photoresist layer is between 10000 angstroms to 13000 angstroms.
According to the technical solution of the present invention, pass through the oxide layer protective layer in the electrostatic protection area of the diode in power device
Upper formation photoresist layer, the corner for avoiding the oxide layer protective layer in electrostatic protection area during preparing power device is carved
Erosion avoids due to forming metal silicide on the polysilicon base layer structure of diode and leads to shorted diode, thus
It ensure that the function of the electrostatic protection of diode pair power device, and then ensure that the reliability of power device.
Detailed description of the invention
Figures 1 and 2 show that the structural schematic diagram of power device during the preparation process in the related technology；
Fig. 3 shows the flow diagram of the preparation method of power device according to an embodiment of the invention；
Fig. 4 to Figure 15 shows the principle signal of the preparation method of power device according to an embodiment of the invention
Figure.
Specific embodiment
It is with reference to the accompanying drawing and specific real in order to be more clearly understood that the above objects, features and advantages of the present invention
Applying mode, the present invention is further described in detail.It should be noted that in the absence of conflict, the implementation of the application
Feature in example and embodiment can be combined with each other.
In the following description, numerous specific details are set forth in order to facilitate a full understanding of the present invention, still, the present invention may be used also
To be implemented using other than the one described here other modes, therefore, protection scope of the present invention is not by described below
Specific embodiment limitation.
Fig. 3 shows the flow diagram of the preparation method of power device according to an embodiment of the invention.
As shown in figure 3, the preparation method of power device according to an embodiment of the invention, comprising:
Step 302, photoresist layer is formed on the oxide layer protective layer for being prepared with diode and power cell；
Step 304, the photoresist layer on the oxide layer protective layer of the active area of the power cell is removed, and is protected
The photoresist layer on the oxide layer protective layer in the electrostatic protection area of the diode is stayed, to complete the power device
Preparation process.
In the technical scheme, by forming photoresist layer on the oxide layer protective layer in the electrostatic protection area of diode, from
And make photoresist layer that there is protective effect to the oxide layer protective layer in electrostatic protection area, it avoids during preparing power device
The corner of the oxide layer protective layer in electrostatic protection area is etched, so that making the oxide layer protective layer in electrostatic protection area still has
The effect of polysilicon base layer structure in protection diode, that is, avoid and generate metal silicide on polysilicon base layer structure,
And then it avoids and ensure that the electrostatic of diode pair power device is anti-since the metal silicide of generation leads to shorted diode
The function of shield, and then ensure that the reliability of power device.
In the above-mentioned technical solutions, it is preferable that before forming the photoresist layer, comprising the following specific steps
Step 3011, epitaxial layer and sinker area is successively formed on the substrate, wherein the side of the sinker area is as preparation
The electrostatic protection area of the diode, the other side of the sinker area is as preparing the described active of the power cell
Area.
In the technical scheme, by forming epitaxial layer and sinker area on base, the basic knot of power device is completed
The preparation of structure, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that after forming the sinker area, comprising the following specific steps
Step 3012, field oxide is formed on the epitaxial layer in the electrostatic protection area；
Step 3013, gate oxide is formed on the epitaxial layer of the active area.
In the technical scheme, by forming field oxide and gate oxide, the basic structure of power device is completed
Preparation, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that after forming the gate oxide, comprising the following specific steps
Step 3014, polysilicon layer is formed on the field oxide and the gate oxide；
Step 3015, processing is patterned to the polysilicon layer, to form polycrystalline silicon substrate in the electrostatic protection area
Layer structure, and silicon gate structure is formed in the active area.
In the technical scheme, by forming polysilicon base layer structure and silicon gate structure, the basic of power device is completed
The preparation of structure, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that after forming the silicon gate structure, comprising the following specific steps
Step 3016, body area, drift region, source region, drain region are sequentially formed in the active area for forming the silicon gate structure
With p-type heavy doping ion area.
In the technical scheme, it by forming body area, drift region, source region, drain region and p-type heavy doping ion area, completes
The preparation of the basic structure of power device, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that the photoresist layer is formed, comprising the following specific steps
Step 3021, on the silicon gate structure of the active area for forming p-type heavy doping ion area and described
The oxide layer protective layer is formed on the polysilicon base layer structure in electrostatic protection area, with the shape on the oxide layer protective layer
At the photoresist layer.
In the technical scheme, by forming oxide layer protective layer, for protecting polysilicon base layer structure and silicon gate structure,
To complete the preparation of the basic structure of power device, to ensure that the reliability for preparing power device.
In the above-mentioned technical solutions, it is preferable that the photoresist layer is removed, comprising the following specific steps
Step 3041, anti-reflective coating is formed on the oxide layer protective layer of the photoresist layer for removing the active area
Layer；
Step 3042, the anti-reflection coating at the top of the silicon gate structure of the active area and the Si-gate knot are removed
The oxide layer protective layer at the top of structure, to retain the oxide layer protective layer of the silicon gate structure two sides；
Step 3043, the photoresist layer in the electrostatic protection area, and the anti-reflective of the removal active area are removed
Penetrate coating；
Step 3044, Alloying Treatment is carried out to the silicon gate structure of the oxide layer protective layer at removal top, with
Form metal suicide structure layer.
In the technical scheme, by forming photoresist layer in the electrostatic protection area of diode, therefore, in removal silicon gate structure
When the anti-reflection coating and oxide layer protective layer at top, the photoresist layer in electrostatic protection area can be to avoid the oxide layer in electrostatic protection area
Protective layer is etched, to make the oxide layer protective layer in electrostatic protection area with the polysilicon base layer structure in protection diode
Effect, that is, avoid and generate metal silicide on polysilicon base layer structure, and then avoid the metal silicide due to generation
Lead to shorted diode, that is, ensure that the function of the electrostatic protection of diode pair power device, and then ensure that power device
Reliability.
In the above-mentioned technical solutions, it is preferable that the light of the active area is removed by exposure technology and developing process
Resistance layer.
In the technical scheme, the photoresist layer of active area is removed, by exposure technology and developing process so as to have
Anti-reflection coating is formed on the oxide layer protective layer of source region to form metal suicide structure layer, completes the basic of power device
The preparation of structure, to ensure that the reliability for preparing power device.
Another aspect of the present invention proposes a kind of power device, using the power as described in any of the above-described technical solution
The preparation method of device is prepared.
In the technical scheme, by forming photoresist layer on the oxide layer protective layer in the electrostatic protection area of diode, from
And make photoresist layer that there is protective effect to the oxide layer protective layer in electrostatic protection area, it avoids during preparing power device
The corner of the oxide layer protective layer in electrostatic protection area is etched, so that making the oxide layer protective layer in electrostatic protection area still has
The effect of polysilicon base layer structure in protection diode, that is, avoid and generate metal silicide on polysilicon base layer structure,
And then it avoids and ensure that the electrostatic of diode pair power device is anti-since the metal silicide of generation leads to shorted diode
The function of shield, and then ensure that the reliability of power device.
In the above-mentioned technical solutions, it is preferable that the thickness of the photoresist layer is between 10000 angstroms to 13000 angstroms.
Fig. 4 to Figure 15 shows the principle signal of the preparation method of power device according to an embodiment of the invention
Figure.
Wherein, corresponding relationship of the Fig. 4 into Figure 15 between appended drawing reference and component names are as follows:
101 oxide layer protective layers, 102 photoresist layers, 103 substrates, 104 epitaxial layers, 105 sinker areas, 106 field oxides, 107
Gate oxide, 108 polysilicon base layer structures, 109 silicon gate structures, 110 body areas, 111 drift regions, 112 source regions, 113 drain regions, 114P
Type heavy doping ion area, 115 anti-reflection coating, 116 metal suicide structure layers.
Below in conjunction with the preparation of the power device of Fig. 4 to Figure 15 one embodiment that the present invention will be described in detail.
As shown in figure 4, sinker area 105 is formed, comprising the following specific steps providing the silicon substrate for having epitaxial layer 104
Then bottom 103 defines sinker area 105, and drives in sinker area 105.
As shown in figure 5, field oxide 106 is formed, comprising the following specific steps defining the side of sinker area 105 as system
The electrostatic protection area of standby diode, and the other side of sinker area 105 is as the active area 112 for preparing power cell, the work of use
Skill is that LOCOS (Local-Oxidation-of-Silicon, local oxidation of silicon) grows field oxide on active area 112
106, specifically, one layer of pad oxide is grown on epitaxial layer 104, thickness is between 200 angstroms~600 angstroms, then redeposition one
Layer silicon nitride, thickness is between 1000 angstroms~3000 angstroms, then by lithography and etching, by the silicon nitride etch in electrostatic protection area
Fall, that is, retain active area 112 silicon nitride, then grow field oxide 106, thickness between 6000 angstroms~30000 angstroms, due to
Active area 112 has the presence of silicon nitride without growing field oxide 106, next just removes silicon nitride with hot phosphoric acid solution,
Pad oxide is removed with hydrofluoric acid solution.
As shown in fig. 6, forming gate oxide 107, polysilicon base layer structure 108 and silicon gate structure 109, including in detail below
Step: growth gate oxide 107, and polysilicon layer is formed on field oxide 106 and gate oxide 107, and to polysilicon layer
Lithography and etching is carried out, to form corresponding polysilicon base layer structure 108 in electrostatic protection area, and in the formation of active area 112
Silicon gate structure 109, wherein the thickness of gate oxide 107 between 100 angstroms~300 angstroms, the thickness of polysilicon layer 2000 angstroms~
Between 4000 angstroms.
As shown in fig. 7, form body area 110, comprising the following specific steps with photoetching and injection technology, carry out body area 110 from
Son injection, does high temperature and drives in, later to form body area 110.
As shown in figure 8, forming drift region 111, source region 112, drain region 113 and p-type heavy doping ion area 114, including following
Specific steps: using photoetching and injection technology, carries out 111 ion of drift region, source and drain ion and the injection of p-type heavy doping ion respectively,
To form drift region 111, source region 112, drain region 113 and p-type heavy doping ion area 114.
As shown in figure 9, oxide layer protective layer 101 is formed, comprising the following specific steps the oxide layer protection of one layer thin of growth
Layer 101, for protecting 108 surface of polysilicon base layer structure and side wall, and the two sides of protection silicon gate structure 109, it is preferable that oxygen
The thickness for changing layer protective layer 101 is between 300 angstroms~400 angstroms.
As shown in Figure 10, photoresist layer 102 is formed, comprising the following specific steps being coated with one layer on oxide layer protective layer 101
The photoresist layer 102 of planarization, it is preferable that the thickness of photoresist layer 102 is between 10000 angstroms~13000 angstroms.
As shown in figure 11, the photoresist layer 102 of active area 112 is removed, comprising the following specific steps by exposure technology and showing
Shadow technique all removes the photoresist layer 102 of active area 112, only retains the photoresist layer 102 in the electrostatic protection area of diode, excellent
Selection of land, the exposure energy of exposure technology between 120ms~160ms, the developing time of developing process be in 30 seconds~60 seconds it
Between.
As shown in figure 12, anti-reflection coating 115 is formed, comprising the following specific steps one layer of anti-reflection coating 115 of coating
(ARC, Anti-Reflective-Coating), it is preferable that the thickness of anti-reflection coating 115 be in 800 angstroms~1200 angstroms it
Between, and anti-reflection coating 115 is liquid, and after the completion of being coated with anti-reflection coating 115, since the step of silicon gate structure 109 is higher,
So the anti-reflection coating 115 at the top of silicon gate structure 109 be it is very thin, spend generally between 30 angstroms~300 angstroms, and
Still there is the anti-reflection coating 115 on the 1000 Izods right side in active area 112.
As shown in figure 13, the anti-reflection coating 115 and oxide layer protective layer 101 at 109 top of removal silicon gate structure, including with
Lower specific steps: it preferably, is protected using anti-reflection coating 115 and oxide layer of the dry back carving technology to 109 top of silicon gate structure
Sheath 101 performs etching, and the gas of etching is lithium two carbon (C2F6) and argon gas (Ar), by 109 top of silicon gate structure
Just all etching is completely target for anti-reflection coating 115 and oxide layer protective layer 101, in addition, during performing etching,
There is photoresist since the two sides of silicon gate structure 109 have around the protection and polysilicon base layer structure 108 of anti-reflection coating 115
The protection of layer 102, therefore the oxide layer protective layer 101 in these regions would not be etched away.
As shown in figure 14, the anti-reflection coating 115 of the photoresist layer 102 and active area 112 in removal electrostatic protection area, including with
Lower specific steps: the photoresist layer 102 in removal electrostatic protection area and the anti-reflection coating 115 of active area 112, it is preferable that use sulphur
The mixed solution of acid and hydrogen peroxide removes removing photoresistance layer 102 and anti-reflection coating 115.
As shown in figure 15, metal suicide structure layer 116 is formed, comprising the following specific steps using Salicide (from right
Metalloid silicide) technique is to the progress Alloying Treatment of silicon gate structure 109, to form metal suicide structure layer 116, main work
Skill is as follows:
1 > deposits one layer of metal, which can be titanium (Ti) perhaps cobalt (Co) or nickel (Ni)；
2 > first time rapid thermal annealings, the silicon and metal allowed on silicon gate structure 109 react, and form the metallic silicon of 49 phases
Compound, meanwhile, other regions are because have the covering of oxide layer protective layer 101, in the process, due to oxide layer protective layer
101 will not react with metal, so the silicon under oxide layer protective layer 101 will not react with metal；
The mixed liquor of the mixed liquor or ammonium hydroxide and hydrogen peroxide of 3 > sulfuric acid and hydrogen peroxide, removes removing oxide layer protective layer 101
Upper nonreactive metal；
4 > first time rapid thermal annealings make the metal silicide of 49 phases be converted into the lower 54 phase metal silicide of resistance,
To form metal suicide structure layer 116, to reduce the resistance of grid polycrystalline silicon, to complete power device metal oxide power
The preparation of device.
The technical scheme of the present invention has been explained in detail above with reference to the attached drawings, it is contemplated that how what is proposed in the related technology avoids
Oxide layer protective layer during preparing power device due to diode is etched and leads to the polycrystalline silicon substrate in diode
Metal silicide is formed in layer structure, so that diode be avoided to cause the technical problem of short circuit, therefore, the invention proposes one kind
The preparation method of new power device and a kind of power device pass through the oxidation in the electrostatic protection area of the diode in power device
Photoresist layer is formed on layer protective layer, avoids turning for the oxide layer protective layer in electrostatic protection area during preparing power device
It is etched at angle, so as to avoid metal silicide is formed on the polysilicon base layer structure of diode, and then ensure that two poles
Pipe further ensure that the reliability of power device to the function of the electrostatic protection of power device.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (6)
1. a kind of preparation method of power device characterized by comprising
Photoresist layer is formed on the oxide layer protective layer for being prepared with diode and power cell；
The photoresist layer on the oxide layer protective layer of the active area of the power cell is removed, and retains the diode
Electrostatic protection area the oxide layer protective layer on the photoresist layer；
Before forming the photoresist layer, comprising the following specific steps
Epitaxial layer and sinker area is successively formed on the substrate,
Wherein, the side of the sinker area is as the electrostatic protection area for preparing the diode, the sinker area it is another
Side is as the active area for preparing the power cell；
After forming the sinker area, comprising the following specific steps
Field oxide is formed on the epitaxial layer in the electrostatic protection area；
Gate oxide is formed on the epitaxial layer of the active area；
After forming the gate oxide, comprising the following specific steps
Polysilicon layer is formed on the field oxide and the gate oxide；
Processing is patterned to the polysilicon layer, to form polysilicon base layer structure, Yi Ji in the electrostatic protection area
The active area forms silicon gate structure；
The photoresist layer is removed, comprising the following specific steps
Anti-reflection coating is formed on the oxide layer protective layer of the photoresist layer for removing the active area；
Remove the anti-reflection coating at the top of the silicon gate structure of the active area and described at the top of the silicon gate structure
Oxide layer protective layer, to retain the oxide layer protective layer of the silicon gate structure two sides；
Remove the photoresist layer in the electrostatic protection area, and the anti-reflection coating of the removal active area；
Alloying Treatment is carried out to the silicon gate structure of the oxide layer protective layer at removal top, to form metal silicide
Structure sheaf.
2. the preparation method of power device according to claim 1, which is characterized in that formed the silicon gate structure it
Afterwards, comprising the following specific steps
The active area for forming the silicon gate structure sequentially form body area, drift region, source region, drain region and p-type heavy doping from
Sub-district.
3. the preparation method of power device according to claim 2, which is characterized in that form the photoresist layer, including with
Lower specific steps:
Institute on the silicon gate structure of the active area for forming p-type heavy doping ion area with the electrostatic protection area
It states and forms the oxide layer protective layer on polysilicon base layer structure, to form the photoresist layer on the oxide layer protective layer.
4. the preparation method of power device according to any one of claim 1 to 3, which is characterized in that by exposing work
Skill and developing process remove the photoresist layer of the active area.
5. a kind of power device, which is characterized in that using the preparation of power device according to any one of claims 1 to 4
Method is prepared.
6. power device according to claim 5, which is characterized in that the thickness of the photoresist layer is in 10000 angstroms extremely
Between 13000 angstroms.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1591860A (en) * | 2003-09-01 | 2005-03-09 | 上海宏力半导体制造有限公司 | Method for mfg. electrostatic discharge protector by deep amicron process |
| CN101741073A (en) * | 2008-11-04 | 2010-06-16 | 旺宏电子股份有限公司 | Structures for electrostatic discharge protection |
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| US7592673B2 (en) * | 2006-03-31 | 2009-09-22 | Freescale Semiconductor, Inc. | ESD protection circuit with isolated diode element and method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1591860A (en) * | 2003-09-01 | 2005-03-09 | 上海宏力半导体制造有限公司 | Method for mfg. electrostatic discharge protector by deep amicron process |
| CN101741073A (en) * | 2008-11-04 | 2010-06-16 | 旺宏电子股份有限公司 | Structures for electrostatic discharge protection |
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