CN106206422B - The method for reducing the growth of metal hardmask Damascus integration etching defect - Google Patents
The method for reducing the growth of metal hardmask Damascus integration etching defect Download PDFInfo
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- CN106206422B CN106206422B CN201610694050.3A CN201610694050A CN106206422B CN 106206422 B CN106206422 B CN 106206422B CN 201610694050 A CN201610694050 A CN 201610694050A CN 106206422 B CN106206422 B CN 106206422B
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Abstract
The present invention provides a kind of methods of reduction metal hardmask Damascus integration etching defect growth, comprising: executes metal hardmask Damascus integration etching processing；Second step: the polymer generated in crystal column surface etching process is washed with etching apparatus；Third step: depositing one layer of more stable polymer in crystal column surface with etching apparatus, generates the polymer for stopping etching defect to stop the device surface on wafer and air to react.
Description
Technical field
The present invention relates to field of semiconductor manufacture, it is more particularly related to which a kind of reduction metal hardmask is big
The method and lacked using reduction metal hardmask Damascus integration etching that Ma Shige integration etching defect is grown
Fall into the manufacturing method for integrated curcuit of the method for growth.
Background technique
With the reduction of dimensions of semiconductor devices, in 65nm and technology below, metal hardmask damascene
Leather integration etching often will appear the defect phenomenon for stopping etching.The main reason for leading to this defect is in etching process
The fluorine-containing polymer for being difficult to take away can be generated, fluorine-containing polymer can lead to fluorine harm with metal hardmask reaction.This
The reaction equation of process are as follows:
4F+H2O->4HF+O2；HF+TiO->TiOFH.
And the fluorine meeting barrier metal deposition being precipitated on metal hardmask finally will appear metallic circuit and can not be connected,
Main reflection mechanism is shown referring to Fig.1, and actual circuit displaing micro picture is as shown in Figure 2.
In general, exist while integration etching process techniques in metal hardmask Damascus reach its maturity
Some problems below:
1) integration etching in metal hardmask Damascus often will appear the defect phenomenon for stopping etching, can finally go out
Existing metallic circuit can not be connected；
2) metal hardmask Damascus integration etching wafer position more up stops etching defect phenomenon more serious；
3) metal hardmask Damascus integration etching wafer standing time before wet etching longer blocking etching
Defect phenomenon degree is more serious.
Summary of the invention
The technical problem to be solved by the present invention is to for drawbacks described above exists in the prior art, providing one kind be can reduce
The method of metal hardmask Damascus integration etching defect growth.
In order to achieve the above technical purposes, according to the present invention, a kind of reduction metal hardmask Damascus one is provided
The method of body etching defect growth, comprising:
First step: metal hardmask Damascus integration etching processing is executed；
Second step: the polymer generated in crystal column surface etching process is washed；
Third step: depositing one layer of more stable polymer in crystal column surface, with stop device surface on wafer with
Air, which reacts, generates the polymer of blocking etching defect.
Preferably, the method for reducing the growth of metal hardmask Damascus integration etching defect further include: build
Vertical scavenging period, sedimentation time relational model corresponding with critical size.
Preferably, according to the relational model of foundation, the scavenging period of second step is selected.
Preferably, according to the relational model of foundation, the sedimentation time of third step is selected.
Preferably, the chemical reaction that the cleaning of second step generates are as follows:
N2+CxFy→CN↓+NFx↑
N2+H2+CxFy→CN↓+CHFx↑+NFy↑
C-O(CO2/CO)+CxFy→COF↑+CO2↑+CO↑。
Preferably, the chemical reaction that the deposition of third step generates are as follows:
N2+CO→CN↓+O2↑。
Preferably, second step washes the polymer generated in crystal column surface etching process with etching apparatus；And
Third step deposits one layer of more stable polymer in crystal column surface with etching apparatus to stop the device surface on wafer
It reacts with air and generates the polymer for stopping etching defect.
In order to achieve the above technical purposes, according to the present invention, it additionally provides a kind of big using the reduction metal hardmask
The manufacturing method for integrated curcuit of the method for Ma Shige integration etching defect growth.
Detailed description of the invention
In conjunction with attached drawing, and by reference to following detailed description, it will more easily have more complete understanding to the present invention
And its adjoint advantage and feature is more easily to understand, in which:
Fig. 1 schematically shows metal hardmask Damascus integration etch polymers mechanism of production.
Fig. 2 schematically shows the micrographs that defect can not be connected in metallic circuit.
Fig. 3 schematically shows reduction metal hardmask Damascus integration according to the preferred embodiment of the invention
The flow chart of the method for etching defect growth.
Fig. 4 schematically shows reduction metal hardmask Damascus integrations according to the preferred embodiment of the invention
It is deposited under the method for etching defect growth and stablizes polymer schematic diagram.
It should be noted that attached drawing is not intended to limit the present invention for illustrating the present invention.Note that indicating that the attached drawing of structure can
It can be not necessarily drawn to scale.Also, in attached drawing, same or similar element indicates same or similar label.
Specific embodiment
In order to keep the contents of the present invention more clear and understandable, combined with specific embodiments below with attached drawing in of the invention
Appearance is described in detail.
The present invention passes through the last step originally of entire etching process in etching the integration of metal hardmask Damascus
Cleaning step resolve into two steps, be first to wash the polymer generated in crystal column surface etching process respectively, then in wafer
Surface deposits one layer of more stable polymer, so that there is no volatilizations to ask simultaneously with air exclusion by the device in wafer
Topic, prevents device surface and air reacts and generates the polymer of blocking etching defect.
Fig. 3 schematically shows reduction metal hardmask Damascus integration according to the preferred embodiment of the invention
The flow chart of the method for etching defect growth.
As shown in figure 3, reduction metal hardmask Damascus integration etching according to the preferred embodiment of the invention lacks
The method for falling into growth includes the following step successively executed:
First step S1: metal hardmask Damascus integration etching processing is executed；For example, can be in prior art
In process, metal hardmask Damascus integration etching processing is executed；
Second step S2: the polymer generated in crystal column surface etching process is washed with etching apparatus；
For example, the chemical reaction that the cleaning of second step generates are as follows:
N2+CxFy→CN↓+NFx↑
N2+H2+CxFy→CN↓+CHFx↑+NFy↑
C-O(CO2/CO)+CxFy→COF↑+CO2↑+CO↑。
Third step S3: one layer of more stable polymer is deposited in crystal column surface with etching apparatus, to stop wafer
On device surface and air react generate stop etching defect polymer；
For example, the chemical reaction that the deposition of third step generates are as follows:
N2+CO→CN↓+O2↑。
Preferably, scavenging period, sedimentation time relational model corresponding with critical size be can establish；
Thus preferably, according to the relational model of foundation, suitable scavenging period and sedimentation time are selected, thus in difference
Critical size under realize the isolation of device surface and air in wafer, so that preventing reaction from generating stops the poly- of etching defect
Close object.
Fig. 4 schematically shows reduction metal hardmask Damascus integrations according to the preferred embodiment of the invention
It is deposited under the method for etching defect growth and stablizes polymer schematic diagram.As can be seen that the present invention is by first cleaning the side deposited afterwards
Method obstructs fluorine-containing organic matter and reacts with the water in air；Moreover, because effective barrier, to solve metal hardmask
The phenomenon that integration etching wafer position in Damascus more up stops etching defect more serious；Further, since effective barrier,
It may wait for the time before wet etching to extend metal hardmask Damascus integration etching wafer.
According to another preferred embodiment of the invention, it additionally provides a kind of using the reduction metal hardmask Damascus
The manufacturing method for integrated curcuit of the method for integrated etching defect growth.
In addition, it should be noted that, unless stated otherwise or point out, the otherwise term " first " in specification, "
Two ", the descriptions such as " third " are used only for distinguishing various components, element, the step etc. in specification, each without being intended to indicate that
Component, element, the logical relation between step or ordinal relation etc..
It is understood that although the present invention has been disclosed in the preferred embodiments as above, above-described embodiment not to
Limit the present invention.For any person skilled in the art, without departing from the scope of the technical proposal of the invention,
Many possible changes and modifications all are made to technical solution of the present invention using the technology contents of the disclosure above, or are revised as
With the equivalent embodiment of variation.Therefore, anything that does not depart from the technical scheme of the invention are right according to the technical essence of the invention
Any simple modifications, equivalents, and modifications made for any of the above embodiments still fall within the range of technical solution of the present invention protection
It is interior.
Claims (7)
1. a kind of method for reducing the growth of metal hardmask Damascus integration etching defect, characterized by comprising:
First step: metal hardmask Damascus integration etching processing is executed；
Second step: washing the polymer generated in crystal column surface etching process, cleans the chemical reaction of generation are as follows:
N2+CxFy→CN↓+NFx↑
N2+H2+CxFy→CN↓+CHFx↑+NFy↑
C-O(CO2/CO)+CxFy→COF↑+CO2↑+CO↑；
Third step: one layer of more stable polymer is deposited in crystal column surface, to stop the device surface and air on wafer
React the polymer for generating and stopping etching defect.
2. the method according to claim 1 for reducing the growth of metal hardmask Damascus integration etching defect,
It is characterized in that further include: establish scavenging period, sedimentation time relational model corresponding with critical size.
3. the method according to claim 2 for reducing the growth of metal hardmask Damascus integration etching defect,
It is characterized in that, according to the relational model of foundation, selects the scavenging period of second step.
4. the method according to claim 2 for reducing the growth of metal hardmask Damascus integration etching defect,
It is characterized in that, according to the relational model of foundation, selects the sedimentation time of third step.
5. the method according to claim 1 or 2 for reducing the growth of metal hardmask Damascus integration etching defect,
It is characterized in that, the chemical reaction that the deposition of third step generates are as follows:
N2+CO→CN↓+O2↑。
6. the method according to claim 1 or 2 for reducing the growth of metal hardmask Damascus integration etching defect,
It is characterized in that, second step washes the polymer generated in crystal column surface etching process with etching apparatus；And third
Step deposits one layer of more stable polymer in crystal column surface to stop the device surface and sky on wafer with etching apparatus
Gas, which reacts, generates the polymer of blocking etching defect.
7. a kind of lacked using reduction metal hardmask Damascus integration according to one of claims 1 to 6, etching
Fall into the manufacturing method for integrated curcuit of the method for growth.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060077657A (en) * | 2004-12-30 | 2006-07-05 | 동부일렉트로닉스 주식회사 | Method for forming copper wiring of semiconductor device using damascene |
| CN101325172A (en) * | 2007-06-15 | 2008-12-17 | 台湾积体电路制造股份有限公司 | Method for fabricating low-dielectric constant dielectric medium and copper wire |
| CN103377913A (en) * | 2012-04-18 | 2013-10-30 | 中芯国际集成电路制造(上海)有限公司 | Method of forming opening |
| CN105745740A (en) * | 2013-09-17 | 2016-07-06 | 应用材料公司 | Methods for stabilizing an interface post etch to minimize queue time issues before next processing step |
-
2016
- 2016-08-19 CN CN201610694050.3A patent/CN106206422B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060077657A (en) * | 2004-12-30 | 2006-07-05 | 동부일렉트로닉스 주식회사 | Method for forming copper wiring of semiconductor device using damascene |
| CN101325172A (en) * | 2007-06-15 | 2008-12-17 | 台湾积体电路制造股份有限公司 | Method for fabricating low-dielectric constant dielectric medium and copper wire |
| CN103377913A (en) * | 2012-04-18 | 2013-10-30 | 中芯国际集成电路制造(上海)有限公司 | Method of forming opening |
| CN105745740A (en) * | 2013-09-17 | 2016-07-06 | 应用材料公司 | Methods for stabilizing an interface post etch to minimize queue time issues before next processing step |
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| CN106206422A (en) | 2016-12-07 |
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