CN106199378B - A kind of circuit board netlist rapid extracting method - Google Patents
A kind of circuit board netlist rapid extracting method Download PDFInfo
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- CN106199378B CN106199378B CN201610487934.1A CN201610487934A CN106199378B CN 106199378 B CN106199378 B CN 106199378B CN 201610487934 A CN201610487934 A CN 201610487934A CN 106199378 B CN106199378 B CN 106199378B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2815—Functional tests, e.g. boundary scans, using the normal I/O contacts
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2812—Checking for open circuits or shorts, e.g. solder bridges; Testing conductivity, resistivity or impedance
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The present invention relates to a kind of method of circuit board netlist information rapidly extracting, include the following steps: 1, determine test point on circuit-under-test plate, obtains test piont mark and coordinate information；2, all test points on circuit-under-test plate are roughly divided into multiple networks using network node analytic approach；3, continuity testing is carried out to test point in each network respectively；4, control test piont mark, extracts Board Under Test netlist information.The present invention extracts circuit board connection relation information by contact circuit board surface solder joint, will not damage to circuit-under-test plate.Meanwhile after the completion of netlist information extracting program is write, test spot net can be automatically performed using flying needle In-circiut tester and is divided and the test of the connectivity of each network, high degree of automation, to overcome deficiency in the prior art.
Description
Technical field
The present invention relates to robot dynamical system technical fields, specifically a kind of circuit board netlist rapidly extracting side
Method.
Background technique
On-board circuitry plate is the main component of electronic product on various machines, and the quality of performance affects the matter of electronic product
Amount.Circuit board netlist information is the important evidence of circuit board repair, due to being limited by property right protection etc., partial circuit expanded metals table
Loss of learning causes obstacle to electronic product guarantee on machine.Currently, " shovelling plate software " is the main of circuit board Netlist Extraction field
Realization rate.
The method that " shovelling plate software " carries out Netlist Extraction is: under the auxiliary of " shovelling plate " software, passing through image processing techniques
Circuit board trace image is handled, then using circuit board material object as reference, extracts circuit board netlist information.But this method needs
Grinding process is carried out to obtain clearly PCB trace image to circuit board by some destructive means, this is just to circuit
Plate causes expendable destruction.In addition, all circuit board netlist information of this method is required by artificial referring to bruting process
The PCB trace image of middle acquisition extracts, and the degree of automation is not high.
Flying needle In-circiut tester mainly uses Technology of In-circuit Test, which is that a kind of computer of circuit board is automatic
Measuring technology, it is contacted using probe with node to be measured, then by programming Control, constitutes test circuit in internal system,
Then it measures.It not only can detecte the on-off of line using flying needle In-circiut tester, it can also be to single on circuit board
Component carries out a series of measurement.Currently, flying needle In-circiut tester is mainly used in the detection of circuit board, Board Under Test is being imported
Under the premise of netlist information, Board Under Test is tested in the form of verifying netlist, but the equipment is not yet applied to circuit
The extraction of expanded metals table information.
Summary of the invention
Defect in view of the above technology, the present invention propose a kind of circuit board netlist rapid extracting method.
A kind of circuit board netlist rapid extracting method, comprising the following steps:
(1) it removes coating: the three-proofing coating of circuit board surface being polished using sand blowing machine and is removed；If being equipped on circuit board
Bga device also needs to remove bga device, and tin plating on the pad of bga device；
(2) it determines test point: Board Under Test is fixed on the test section guide rail of flying needle In-circiut tester, it is online using flying needle
Tester positive and negative are fixed on the camera on traveling probe and take pictures to circuit-under-test plate material object, obtain circuit-under-test plate
Positive and negative image information；
(3) setting test piont mark: successively naming each test point, for convenience of the extraction of last netlist information, name
According to the principle of " device label/pin number "；
(4) it obtains test point coordinate: successively obtaining each test point in the circuit board image of positive and negative relative to Board Under Test
Coordinate information (xn, yn)；Two test points, via hole or mechanical hole on Board Under Test on selection diagonal line are as a reference point,
Reference point is obtained relative to the coordinate (xref, yref) of Board Under Test and relative to the coordinate of flying needle In-circiut tester test section
After (Xref, Yref), test points all in Board Under Test are converted into the coordinate (Xn, Yn) relative to test section, wherein Xn=xn+
Xref-xref, Yn=yn+Yref-yref；The component on circuit-under-test plate is observed, the collection for selecting a known pin to define
At chip, the corresponding test point of GND foot of the integrated chip is selected as GND point；In the offer of flying needle In-circiut tester for two
In the application software of secondary exploitation, records the title of each test point and the coordinate relative to flying needle In-circiut tester test section is believed
Breath, and the test point of above-mentioned selection is labeled as GND point；
(5) all test points are divided into multiple networks: in the answering for secondary development that flying needle In-circiut tester provides
With in software, setting applies signal source forcing by two probes between test point and GND point；The spy of flying needle In-circiut tester
The crown traverses all test points, and apply pumping signal according to the coordinate information of each test point automatically, while probe can adopt go back to institute
Select the response signal of test point；The mapping table an of test point and its corresponding response signal can be established in application software, it is relatively more every
The response signal of a test point will assign identical network name with the test point of same response signal in the mapping table；In quilt
A test point is chosen in all test points of slowdown monitoring circuit plate, the coordinate position recorded by step (4), by a probe
It is moved to selected test point, another probe is moved to the test point that step (4) is chosen to be GND；Utilize flying needle In-circiut tester
Transmission semiotic function, apply ac voltage signal between test point and GND point, to form access；It is surveyed online using flying needle
The acquisition semiotic function for trying instrument, by the response signal for the probe back production point being placed in selected test point, i.e. the access
Current signal, and in flying needle In-circiut tester, establish the mapping table of test piont mark and the response signal；Then, it chooses
Probe is moved at selected test point by next test point, and the probe being placed on GND point is motionless；Flying needle is repeated to survey online
The above-mentioned test job of instrument is tried, the response signal of test point where repeating back production probe, and will test piont mark and response signal
Corresponding relationship be added in the mapping table of foundation, until the last one test point of circuit-under-test plate, obtain including circuit-under-test
The mapping table of the contrast relationship of all test piont marks and its response signal in plate；By the network of first test point in mapping table
Name is named as Net1；The response signal for reading second test point, by this signal compared with the response signal of first test point,
The network name of second test point is equally then named as Net1 if they are the same, it is if different that the network name of second test point is new
It builds as Net2；In the same way, the response signal for reading third test point, compared with the first two test point, if with first
The response signal of test point is identical, then the network name of third test point is named as Net1, similarly, if with second test point
It is identical, then it is named as Net2, if being different from, creates entitled Net3；And so on, it will be mapped by whether response signal is identical
All test points are named as different network names in table, and record in the mapping table；
(6) connectivity of test point is tested in identical network: the mapping table obtained according to step (5) surveys flying needle online
The probe of examination instrument is moved in the test point with identical network name；It is tested using the connectivity of flying needle In-circiut tester, judgement
Whether two test points that probe is contacted are connected: if being connected, maintaining legacy network name constant；If not identical, mapping
One of test point is renamed into a new network name in table；Probe is according to each in test point coordinate information and mapping table
The network name of test point examines obtained in step (5) after traversing all test points according to the method for above-mentioned connectivity test
Whether mapping table is correct, and modifies to wrong place；
(7) network information is extracted: the mapping table being stored in flying needle In-circiut tester secondary development software is exported；According to
Retrieval to network name in mapping table obtains the test point with identical network name, i.e. connected component's feet, is recorded in symbol
It closes and nets in tabular document；After the completion of being arranged to all-network name, obtain including component's feets all on circuit-under-test plate
The document of connection relationship；Using the basic function of flying needle In-circiut tester, i.e. circuit board detecting function, on circuit-under-test plate
The parameter value of the basic devices such as resistance, capacitor, inductance measures, and component label and parameter value corresponding relationship are added to
In document；Component label and device type corresponding relationship are added in document by the integrated chip on circuit-under-test plate；This article
Shelves are the complete netlist information of circuit-under-test plate.
The beneficial effects of the present invention are:
(1) contact surface solder joint mapping circuit plate connection relation information is used, circuit-under-test plate will not be damaged；
(2) it is combined using network node analytic approach and connectivity test, does not need to own on all circuit-under-test plates
Component's feet carries out connectivity two-by-two and tests, and shortens netlist time of withdrawing information；
(3) flying needle In-circiut tester function is expanded, PCB Online testing technology is applied to circuit board netlist information
It extracts；
(4) characteristic that can be traversed automatically by the coordinate position of setting for utilizing flying needle Online Transaction Processing improves automatic
Change degree.
Detailed description of the invention
Present invention will be further explained below with reference to the attached drawings and examples.
Fig. 1 is operating procedure flow chart of the invention.
Specific embodiment
In order to be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, below it is right
The present invention is further described.
As shown in Figure 1, a kind of circuit board netlist rapid extracting method, comprising the following steps:
(1) it removes coating: the three-proofing coating of circuit board surface being polished using sand blowing machine and is removed；If being equipped on circuit board
Bga device also needs to remove bga device, and tin plating on the pad of bga device；
(2) it determines test point: Board Under Test is fixed on the test section guide rail of flying needle In-circiut tester, it is online using flying needle
Tester positive and negative are fixed on the camera on traveling probe and take pictures to circuit-under-test plate material object, obtain circuit-under-test plate
Positive and negative image information；
(3) setting test piont mark: successively each test point is named, names the original according to " device label/pin number "
Then；
(4) it obtains test point coordinate: successively obtaining each test point in the circuit board image of positive and negative relative to Board Under Test
Coordinate information (xn, yn)；Two test points, via hole or mechanical hole on Board Under Test on selection diagonal line are as a reference point,
Reference point is obtained relative to the coordinate (xref, yref) of Board Under Test and relative to the coordinate of flying needle In-circiut tester test section
After (Xref, Yref), test points all in Board Under Test are converted into the coordinate (Xn, Yn) relative to test section, wherein Xn=xn+
Xref-xref, Yn=yn+Yref-yref；The component on circuit-under-test plate is observed, the collection for selecting a known pin to define
At chip, the corresponding test point of GND foot of the integrated chip is selected as GND point；In the offer of flying needle In-circiut tester for two
In the application software of secondary exploitation, records the title of each test point and the coordinate relative to flying needle In-circiut tester test section is believed
Breath, and the test point of above-mentioned selection is labeled as GND point；
(5) all test points are divided into multiple networks: in the answering for secondary development that flying needle In-circiut tester provides
With in software, setting applies signal source forcing by two probes between test point and GND point；The spy of flying needle In-circiut tester
The crown traverses all test points, and apply pumping signal according to the coordinate information of each test point automatically, while probe can adopt go back to institute
Select the response signal of test point；The mapping table an of test point and its corresponding response signal can be established in application software, it is relatively more every
The response signal of a test point will assign identical network name with the test point of same response signal in the mapping table；In quilt
A test point is chosen in all test points of slowdown monitoring circuit plate, the coordinate position recorded by step (4), by a probe
It is moved to selected test point, another probe is moved to the test point that step (4) is chosen to be GND；Utilize flying needle In-circiut tester
Transmission semiotic function, apply ac voltage signal between test point and GND point；Believed using the acquisition of flying needle In-circiut tester
Number function, by the response signal for the probe back production point being placed in selected test point, the i.e. current signal of the access, and
In flying needle In-circiut tester, the mapping table of test piont mark and the response signal is established；Then, next test point is chosen,
Probe is moved at selected test point, the probe being placed on GND point is motionless；Repeat the above-mentioned test of flying needle In-circiut tester
Work, the response signal of test point where repeating back production probe, and the corresponding relationship for testing piont mark and response signal is added
Into the mapping table of foundation, until the last one test point of circuit-under-test plate, obtain including all test points in circuit-under-test plate
The mapping table of the contrast relationship of label and its response signal；The network name of first test point in mapping table is named as Net1；
The response signal for reading second test point, by this signal compared with the response signal of first test point, if they are the same then by
The network name of two test points is equally named as Net1, creates the network name of second test point for Net2 if different；It presses
Same method reads the response signal of third test point, compared with the first two test point, if the response with first test point
Signal is identical, then the network name of third test point is named as Net1, similarly, if identical as second test point, names
Entitled Net3 is created if being different from for Net2；And so on, it is whether identical by surveys all in mapping table by response signal
Pilot is named as different network names, and records in the mapping table；
(6) connectivity of test point is tested in identical network: the mapping table obtained according to step (5) surveys flying needle online
The probe of examination instrument is moved in the test point with identical network name；It is tested using the connectivity of flying needle In-circiut tester, judgement
Whether two test points that probe is contacted are connected: if being connected, maintaining legacy network name constant；If not identical, mapping
One of test point is renamed into a new network name in table；Probe is according to each in test point coordinate information and mapping table
The network name of test point examines obtained in step (5) after traversing all test points according to the method for above-mentioned connectivity test
Whether mapping table is correct, and modifies to wrong place；
(7) network information is extracted: the mapping table being stored in flying needle In-circiut tester secondary development software is exported；According to
Retrieval to network name in mapping table obtains the test point with identical network name, i.e. connected component's feet, is recorded in symbol
It closes and nets in tabular document；After the completion of being arranged to all-network name, obtain including component's feets all on circuit-under-test plate
The document of connection relationship；Using the basic function of flying needle In-circiut tester, i.e. circuit board detecting function, on circuit-under-test plate
The parameter value of the basic devices such as resistance, capacitor, inductance measures, and component label and parameter value corresponding relationship are added to
In document；Component label and device type corresponding relationship are added in document by the integrated chip on circuit-under-test plate；This article
Shelves are the complete netlist information of circuit-under-test plate.
The basic principles, main features and advantages of the present invention have been shown and described above.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and what is described in the above embodiment and the description is only the present invention
Principle, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these variation and
Improvement is both fallen in claimed invention.The claimed scope of the invention is by appended claims and its equivalent circle
It is fixed.
Claims (2)
1. a kind of circuit board netlist rapid extracting method, it is characterised in that: the following steps are included:
(1) it removes coating: the three-proofing coating of circuit-under-test plate surface being polished using sand blowing machine and is removed；If being installed on circuit-under-test plate
There is bga device, also need to remove bga device, and is tin plating on the pad of bga device；
(2) it determines test point: circuit-under-test plate is fixed on the test section guide rail of flying needle In-circiut tester, it is online using flying needle
Tester positive and negative are fixed on the camera on traveling probe and take pictures to circuit-under-test plate material object, obtain circuit-under-test plate
Positive and negative image information；
(3) setting test piont mark: successively each test point is named；
(4) it obtains test point coordinate: successively obtaining seat of each test point relative to Board Under Test in the circuit board image of positive and negative
It marks information (xn, yn)；Two test points, via hole or mechanical hole on Board Under Test on selection diagonal line are as a reference point, obtain
Coordinate (xref, yref) of the reference point relative to Board Under Test and the coordinate relative to flying needle In-circiut tester test section (Xref,
Yref after), test points all in Board Under Test are converted into the coordinate (Xn, Yn) relative to test section, wherein Xn=xn+Xref-
Xref, Yn=yn+Yref-yref；The component on circuit-under-test plate is observed, the integrated core for selecting a known pin to define
The corresponding test point of GND foot of the integrated chip is selected as GND point by piece；It is opened what flying needle In-circiut tester provided for secondary
In the application software of hair, the title of each test point and the coordinate information relative to flying needle In-circiut tester test section are recorded,
And the test point of above-mentioned selection is labeled as GND point；
(5) all test points are divided into multiple networks: in the offer of flying needle In-circiut tester for secondary development using soft
In part, setting applies signal source forcing by two probes between test point and GND point；The probe root of flying needle In-circiut tester
According to the coordinate information of each test point, all test points are traversed automatically, and apply pumping signal, while probe can adopt back selected survey
The response signal of pilot；The mapping table an of test point and its corresponding response signal, more each survey can be established in application software
The response signal of pilot will assign identical network name, the above process with the test point of same response signal in the mapping table
It is specific to execute process are as follows: a test point to be chosen in all test points of circuit-under-test plate, the point recorded by step (4)
A piece probe is moved to selected test point by coordinate position, and another probe is moved to the test point that step (4) is chosen to be GND；
Using the transmission semiotic function of flying needle In-circiut tester, apply ac voltage signal between test point and GND point, it is logical to be formed
Road；Using the acquisition semiotic function of flying needle In-circiut tester, by the sound for the probe back production point being placed in selected test point
Induction signal, the i.e. current signal of the access, and in flying needle In-circiut tester, establish test piont mark and the response signal
Mapping table；Then, next test point is chosen, probe is moved at selected test point, is placed on probe on GND point not
It is dynamic；The above-mentioned test job of flying needle In-circiut tester is repeated, the response signal of test point where repeating back production probe, and will test
Piont mark and the corresponding relationship of response signal are added in the mapping table of foundation, until the last one test point of circuit-under-test plate,
It obtains including all mapping tables for testing piont marks with the contrast relationships of its response signal in circuit-under-test plate；By in mapping table
The network name of one test point is named as Net1；The response signal for reading second test point tests this signal and first
The response signal of point compares, and the network name of second test point is equally then named as Net1 if they are the same, by second if different
The network name of a test point creates as Net2；In the same way, the response signal for reading third test point is tested with the first two
Point compares, if identical as the response signal of first test point, the network name of third test point is named as Net1, together
Reason, if identical as second test point, is named as Net2, if being different from, creates entitled Net3；And so on, it presses aloud
Whether induction signal is identical to be named as different network names for test points all in mapping table, and records in the mapping table；
(6) connectivity of test point is tested in identical network: the mapping table obtained according to step (5), by flying needle In-circiut tester
Probe be moved in the test point with identical network name；It is tested using the connectivity of flying needle In-circiut tester, judges probe
Whether two test points contacted are connected: if being connected, maintaining legacy network name constant；If not identical, in the mapping table
One of test point is renamed into a new network name；Probe is respectively tested according in test point coordinate information and mapping table
The network name of point after traversing all test points according to the method for above-mentioned connectivity test, is examined and is mapped obtained in step (5)
Whether table is correct, and modifies to wrong place；
(7) network information is extracted: the mapping table being stored in flying needle In-circiut tester secondary development software is exported；According to mapping
The retrieval of network name in firing table obtains the test point with identical network name, i.e. connected component's feet, is recorded in and meets net
In tabular document；After the completion of being arranged to all-network name, obtains and connected including component's feets all on circuit-under-test plate
The document of relationship；Using the basic function of flying needle In-circiut tester, i.e. circuit board detecting function, to the basis on circuit-under-test plate
The parameter value of component measures, and the basic device includes resistance, capacitor, inductance, by component label and parameter value
Corresponding relationship is added in document；Integrated chip on circuit-under-test plate adds component label and device type corresponding relationship
It is added in document；The document is the complete netlist information of circuit-under-test plate.
2. a kind of circuit board netlist rapid extracting method according to claim 1, it is characterised in that: in step (3), be
Facilitate the extraction of last netlist information, names the principle according to " device label/pin number ".
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106707142A (en) * | 2017-03-07 | 2017-05-24 | 济南浪潮高新科技投资发展有限公司 | Method for inspecting electrical connection information of PIN devices in PCB (Printed Circuit Board) |
| CN109255161B (en) * | 2018-08-17 | 2023-01-31 | 国营芜湖机械厂 | Method for generating NOD netlist file from NET netlist file |
| CN111141954B (en) * | 2020-01-02 | 2022-05-06 | 北京半导体专用设备研究所（中国电子科技集团公司第四十五研究所） | Test file generation method and device of resistor network and electronic equipment |
| CN111220830A (en) * | 2020-01-02 | 2020-06-02 | 北京半导体专用设备研究所（中国电子科技集团公司第四十五研究所） | Electrical index testing method and device for multiple elements and electronic equipment |
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| US5485081A (en) * | 1990-10-30 | 1996-01-16 | Electronic Packaging Co. | Test point reduction system for a printed circuit board test system |
| CN1783055A (en) * | 2004-11-29 | 2006-06-07 | 华为技术有限公司 | Automatic designing method for ICT test conversion PCB |
| CN101191808A (en) * | 2006-12-01 | 2008-06-04 | 英业达股份有限公司 | Circuit board test point similarities and differences seeking system and its method |
| CN102567152A (en) * | 2010-12-27 | 2012-07-11 | 佛山市顺德区顺达电脑厂有限公司 | Automatic point-sorting system for on-line test device and method thereof |
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