CN106169441B - 改善bito断裂的阵列基板及其制作方法与液晶显示面板 - Google Patents
改善bito断裂的阵列基板及其制作方法与液晶显示面板 Download PDFInfo
- Publication number
- CN106169441B CN106169441B CN201610700925.6A CN201610700925A CN106169441B CN 106169441 B CN106169441 B CN 106169441B CN 201610700925 A CN201610700925 A CN 201610700925A CN 106169441 B CN106169441 B CN 106169441B
- Authority
- CN
- China
- Prior art keywords
- layer
- common electrode
- array substrate
- organic film
- improving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 43
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 21
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 10
- 239000010408 film Substances 0.000 claims abstract description 54
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 30
- 239000010409 thin film Substances 0.000 claims abstract description 23
- 230000002209 hydrophobic effect Effects 0.000 claims abstract description 22
- 238000002161 passivation Methods 0.000 claims abstract description 16
- 239000010410 layer Substances 0.000 claims description 87
- 238000000034 method Methods 0.000 claims description 18
- 229920005591 polysilicon Polymers 0.000 claims description 18
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 10
- 230000001681 protective effect Effects 0.000 claims description 10
- 238000005336 cracking Methods 0.000 claims description 6
- 239000011229 interlayer Substances 0.000 claims description 5
- RQIPKMUHKBASFK-UHFFFAOYSA-N [O-2].[Zn+2].[Ge+2].[In+3] Chemical compound [O-2].[Zn+2].[Ge+2].[In+3] RQIPKMUHKBASFK-UHFFFAOYSA-N 0.000 claims description 2
- -1 aluminum tin oxide Chemical compound 0.000 claims description 2
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 4
- 239000011368 organic material Substances 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
Abstract
本发明公开了一种改善BITO断裂的阵列基板的制作方法,包括:在基板上制作形成低温多晶硅薄膜晶体管;在所述低温多晶硅薄膜晶体管上表面形成有机膜层;在所述有机膜层上制备公共电极;其中,在所述有机膜层上制备公共电极步骤之前先对所述有机膜层疏水处理。本发明还公开了一种改善BITO断裂的阵列基板及液晶显示面板。通过在阵列基板的有机膜层上制备公共电极步骤之前先对有机膜层疏水处理,降低了有机膜层界面处透明公共电极的蚀刻速率,避免了钝化层断裂造成的BITO异常。
Description
技术领域
本发明涉及基板制作技术领域,尤其涉及一种改善BITO断裂的阵列基板及其制作方法与液晶显示面板。
背景技术
低温多晶硅技术LTPS(Low Temperature Poly-silicon)是为了解决单晶硅的缺点开发而来,最初是日本北美的技术企业为了降低笔记本电脑显示屏的能耗,令笔记本电脑显得更薄更轻而研发的技术。具有LTPS技术基板的液晶显示器具有高分辨率、反应速度快、高亮度、高开口率等优点,加上由于此工艺的液晶显示器的硅结晶排列较a-Si有次序,使得电子移动率相对高100倍以上,可以将外围驱动电路同时制作在玻璃基板上,达到系统整合的目标、节省空间及驱动IC的成本。同时,由于驱动IC线路直接制作于面板上,可以减少组件的对外接点,增加可靠度、维护更简单、缩短组装制程时间及降低EMI特性,进而减少应用系统设计时程及扩大设计自由度。
在目前的LTPS工艺制作流程中,首先于玻璃基板上制作TFT(Thin FilmTransistor,即薄膜晶体管),然后覆盖一层有机材料层,然后进行BITO(Back side Indiumtin oxide,即彩色滤光片背镀氧化铟锡)制程,但有机材料层为亲水性有机材料,导致BITO蚀刻时靠近有机材料层界面处蚀刻速率较快,蚀刻后确认BITO出现断裂异常,钝化层覆盖后在BITO爬坡处出现钝化层断裂,造成公共电极与像素电极短路,导致产品性能异常。
发明内容
鉴于现有技术存在的不足,本发明提供了一种改善BITO断裂的阵列基板及其制作方法与液晶显示面板,可以避免BITO出现断裂异常影响产品性能。
为了实现上述的目的,本发明采用了如下的技术方案:
一种改善BITO断裂的阵列基板的制作方法,包括:
在基板上制作形成低温多晶硅薄膜晶体管;
在所述低温多晶硅薄膜晶体管上表面形成有机膜层;
在所述有机膜层上制备公共电极;
其中,在所述有机膜层上制备公共电极步骤之前先对所述有机膜层疏水处理。
作为其中一种实施方式,所述对所述有机膜层疏水处理步骤为采用真空制程在所述有机膜层上覆盖一层疏水性保护膜。
作为其中一种实施方式,所述制作形成低温多晶硅薄膜晶体管的步骤包括依次在所述基板上制作遮光层、缓冲层、多晶硅层、栅极绝缘层、栅极、层间绝缘层和源/漏极。
作为其中一种实施方式,所述疏水性保护膜为有机氧化物。
作为其中一种实施方式,钝化层形成在所述公共电极上表面,所述公共电极上的沟道壁形成有倒角。
本发明的另一目的在于提供一种改善BITO断裂的阵列基板,包括低温多晶硅薄膜晶体管、所述低温多晶硅薄膜晶体管上的有机膜层、公共电极和钝化层,所述有机膜层上与所述公共电极相对的表面经疏水处理。
作为其中一种实施方式,所述有机膜层与所述公共电极之间设有疏水性保护膜。
作为其中一种实施方式,所述疏水性保护膜为有机氧化物。
作为其中一种实施方式,所述公共电极上的沟道壁形成有倒角。
本发明的又一目的在于提供一种液晶显示面板,包括上述的一种改善BITO断裂的阵列基板的制作方法制作的阵列基板。
本发明通过在阵列基板的有机膜层上制备公共电极步骤之前先对有机膜层疏水处理,降低了有机膜层界面处透明公共电极的蚀刻速率,避免了钝化层断裂造成的BITO异常。
附图说明
图1为本发明实施例的阵列基板制作方法示意图。
图2为本发明实施例的阵列基板的结构示意图。
图3为本发明实施例的阵列基板的低温多晶硅薄膜晶体管的结构示意图。
图4为本发明实施例在低温多晶硅薄膜晶体管上制作有机膜层的工艺示意图。
图5为本发明实施例对有机膜层疏水处理的工艺示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
参阅图1~图5,本发明实施例的可以改善BITO断裂的阵列基板的制作方法,包括:
S01、在基板1上制作形成低温多晶硅薄膜晶体管10(如图3);
S02、在低温多晶硅薄膜晶体管10上表面形成有机膜层20(如图4);
S03、对有机膜层20疏水处理(如图5);
S04、在有机膜层20上制备公共电极30;
S05、在公共电极上制备钝化层40和像素电极50。
由于在有机膜层20上制备公共电极30步骤之前先对有机膜层20疏水处理,降低了有机膜层20表面的BITO的蚀刻速率,蚀刻精度得以保证,不会出现钝化层断裂的现象。
优选地,本实施例对有机膜层20疏水处理步骤为采用真空制程在有机膜层20上覆盖一层疏水性保护膜,该疏水性保护膜可以是有机氧化物。
另外,制作形成低温多晶硅薄膜晶体管10的步骤包括依次在基板1上制作遮光层B、缓冲层11、多晶硅层S、栅极绝缘层12、栅极G、层间绝缘层13和源/漏极A。钝化层40形成在公共电极30的上表面,公共电极30上的沟道壁形成有倒角,可以方便钝化层40形成。
遮光层B与多晶硅层S相对设置,以使遮光层对低温多晶硅薄膜晶体管的沟道进行遮光,从而防止低温多晶硅薄膜晶体管因光照而产生漏电流。
低温多晶硅薄膜晶体管10中,首先对在玻璃基板1上沉积一层金属层,通过对该金属层进行图形化处理除去多余部分,形成遮光层B,然后在基板1和遮光层B上形成缓冲层11,缓冲层11形成在基板1上并覆盖遮光层B;多晶硅层S形成在缓冲层11上,然后在多晶硅层S上生长源/漏极A和覆盖一层栅极绝缘层12、在栅极绝缘层12上形成栅极G,最后在栅极G上覆盖形成层间绝缘层13。
其中,钝化层40的材料为氮化硅或氧化硅,公共电极30和像素电极50为透明导电层沉积后进行图形化处理后得到,二者的材料可以选自为铟锡氧化物、铟锌氧化物、铝锡氧化物、铝锌氧化物、铟锗锌氧化物中的一种或多种,缓冲层11、栅极绝缘层12、层间绝缘层13为绝缘材料制成,如氮化硅、氧化硅或者二者的组合,栅极G由导电金属制成,如铬、镍等。
如图2,本发明实施例的阵列基板包括低温多晶硅薄膜晶体管10、低温多晶硅薄膜晶体管10上的有机膜层20、公共电极30、钝化层40和像素电极50,有机膜层20上与公共电极30相对的表面经疏水处理,公共电极30上的沟道壁形成有倒角。多晶硅层S与源极、漏极A电连接,像素电极50形成在钝化层40、有机膜层20形成的沟槽中,并接触漏极A。
可以理解的是,本发明的上述改善BITO断裂的阵列基板的制作方法制作的阵列基板可广泛应用在各种液晶显示面板中。通过在阵列基板的有机膜层上制备公共电极步骤之前先对有机膜层疏水处理,降低了有机膜层界面处透明公共电极的蚀刻速率,避免了钝化层断裂造成的BITO异常。
以上所述仅是本申请的具体实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本申请原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本申请的保护范围。
Claims (10)
1.一种改善彩色滤光片背镀氧化铟锡断裂的阵列基板的制作方法,其特征在于,包括:
在基板(1)上制作形成低温多晶硅薄膜晶体管(10);
在所述低温多晶硅薄膜晶体管(10)上表面形成有机膜层(20);
在所述有机膜层(20)上制备公共电极(30);
其中,在所述有机膜层(20)上制备公共电极(30)步骤之前先对所述有机膜层(20)疏水处理;所述公共电极(30)的材料选自为铟锡氧化物,或由铟锌氧化物、铝锡氧化物、铝锌氧化物、铟锗锌氧化物中的至少一种与铟锡氧化物组成。
2.根据权利要求1所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板的制作方法,其特征在于,所述对所述有机膜层(20)疏水处理步骤为采用真空制程在所述有机膜层(20)上覆盖一层疏水性保护膜。
3.根据权利要求2所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板的制作方法,其特征在于,所述制作形成低温多晶硅薄膜晶体管(10)的步骤包括依次在所述基板(1)上制作遮光层(B)、缓冲层(11)、多晶硅层(S)、栅极绝缘层(12)、栅极(G)、层间绝缘层(13)和源/漏极(A)。
4.根据权利要求2或3所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板的制作方法,其特征在于,所述疏水性保护膜为有机氧化物。
5.根据权利要求1所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板的制作方法,其特征在于,钝化层(40)形成在所述公共电极(30)上表面,所述公共电极(30)上的沟道壁形成有倒角。
6.一种改善彩色滤光片背镀氧化铟锡断裂的阵列基板,其特征在于,包括低温多晶硅薄膜晶体管(10)、所述低温多晶硅薄膜晶体管(10)上的有机膜层(20)、公共电极(30)和钝化层(40),所述有机膜层(20)上与所述公共电极(30)相对的表面经疏水处理。
7.根据权利要求6所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板,其特征在于,所述有机膜层(20)与所述公共电极(30)之间设有疏水性保护膜。
8.根据权利要求7所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板,其特征在于,所述疏水性保护膜为有机氧化物。
9.根据权利要求6所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板,其特征在于,所述公共电极(30)上的沟道壁形成有倒角。
10.一种液晶显示面板,其特征在于,包括权利要求1-5任一所述的改善彩色滤光片背镀氧化铟锡断裂的阵列基板的制作方法制作的阵列基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610700925.6A CN106169441B (zh) | 2016-08-22 | 2016-08-22 | 改善bito断裂的阵列基板及其制作方法与液晶显示面板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610700925.6A CN106169441B (zh) | 2016-08-22 | 2016-08-22 | 改善bito断裂的阵列基板及其制作方法与液晶显示面板 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106169441A CN106169441A (zh) | 2016-11-30 |
CN106169441B true CN106169441B (zh) | 2020-06-09 |
Family
ID=57375886
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610700925.6A Active CN106169441B (zh) | 2016-08-22 | 2016-08-22 | 改善bito断裂的阵列基板及其制作方法与液晶显示面板 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106169441B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107275344B (zh) * | 2017-06-28 | 2019-12-31 | 武汉华星光电技术有限公司 | 低温多晶硅阵列基板及其制作方法 |
CN109212854B (zh) | 2018-08-29 | 2021-06-01 | 武汉华星光电技术有限公司 | 一种ltps阵列基板的制造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1508613A (zh) * | 2002-12-18 | 2004-06-30 | Lg.������Lcd����˾ | 液晶显示设备及其制造方法 |
CN100367501C (zh) * | 2004-05-31 | 2008-02-06 | 松下电器产业株式会社 | 半导体集成电路 |
CN104203573A (zh) * | 2012-01-19 | 2014-12-10 | 优志旺电机株式会社 | 工件的贴合方法及触摸面板 |
-
2016
- 2016-08-22 CN CN201610700925.6A patent/CN106169441B/zh active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1508613A (zh) * | 2002-12-18 | 2004-06-30 | Lg.������Lcd����˾ | 液晶显示设备及其制造方法 |
CN100367501C (zh) * | 2004-05-31 | 2008-02-06 | 松下电器产业株式会社 | 半导体集成电路 |
CN104203573A (zh) * | 2012-01-19 | 2014-12-10 | 优志旺电机株式会社 | 工件的贴合方法及触摸面板 |
Also Published As
Publication number | Publication date |
---|---|
CN106169441A (zh) | 2016-11-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107424957B (zh) | 柔性tft基板的制作方法 | |
US10013124B2 (en) | Array substrate, touch screen, touch display device, and fabrication method thereof | |
US9728403B2 (en) | Array substrate and manufacturing method thereof | |
US9891488B2 (en) | Array substrate and manufacture method thereof | |
US20160126258A1 (en) | Low temperature poly-silicon array substrate and forming method thereof | |
US9947754B1 (en) | Manufacturing method of array substrate and LCD panel | |
CN104966501B (zh) | 用于窄边框lcd的goa电路结构 | |
KR102089244B1 (ko) | 더블 게이트형 박막 트랜지스터 및 이를 포함하는 유기 발광 다이오드 표시장치 | |
GB2530223B (en) | Method for manufacturing thin-film transistor array substrate | |
US20210126022A1 (en) | Array substrate and method for manufacturing same | |
US11664392B2 (en) | Flexible array substrate, manufacturing method thereof and display device | |
CN106098699A (zh) | 一种阵列基板、其制作方法、显示面板及其制作方法 | |
CN104485333A (zh) | 一种ltps阵列基板 | |
TWI590423B (zh) | 顯示裝置 | |
GB2561117A (en) | Array substrate used in liquid crystal panel and method for manufacturing same | |
US20200251501A1 (en) | Thin film transistor, manufacturing method thereof, array substrate and display device | |
CN104733456A (zh) | 一种阵列基板及其制备方法、显示装置 | |
CN107799466A (zh) | Tft基板及其制作方法 | |
US9240424B2 (en) | Thin film transistor array substrate and producing method thereof | |
CN106169441B (zh) | 改善bito断裂的阵列基板及其制作方法与液晶显示面板 | |
US10068924B2 (en) | Display panel and display apparatus | |
CN105679705A (zh) | 阵列基板的制作方法 | |
CN106611764B (zh) | 显示设备 | |
CN1259731C (zh) | 低温多晶硅薄膜晶体管的制作方法 | |
CN108962957B (zh) | 显示基板及其制造方法、显示装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |